diff --git a/arch/risc-v/src/common/riscv_exception_common.S b/arch/risc-v/src/common/riscv_exception_common.S index 53cad309aa..4d5665ac2d 100644 --- a/arch/risc-v/src/common/riscv_exception_common.S +++ b/arch/risc-v/src/common/riscv_exception_common.S @@ -107,16 +107,16 @@ exception_common: #if CONFIG_ARCH_INTERRUPTSTACK > 15 /* Load mhartid (cpuid) */ - csrr s0, mhartid + csrr s0, mhartid /* Switch to interrupt stack */ #if IRQ_NSTACKS > 1 - li t0, (CONFIG_ARCH_INTERRUPTSTACK & ~15) - mul t0, s0, t0 - la s0, g_intstacktop - sub sp, s0, t0 + li t0, (CONFIG_ARCH_INTERRUPTSTACK & ~15) + mul t0, s0, t0 + la s0, g_intstacktop + sub sp, s0, t0 #else - la sp, g_intstacktop + la sp, g_intstacktop #endif /* Call interrupt handler in C */ diff --git a/arch/risc-v/src/common/riscv_schedulesigaction.c b/arch/risc-v/src/common/riscv_schedulesigaction.c index 7eced99961..e8c5eab946 100644 --- a/arch/risc-v/src/common/riscv_schedulesigaction.c +++ b/arch/risc-v/src/common/riscv_schedulesigaction.c @@ -353,9 +353,9 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) CURRENT_REGS[REG_EPC] = (uintptr_t)riscv_sigdeliver; int_ctx = CURRENT_REGS[REG_INT_CTX]; - int_ctx &= ~MSTATUS_MPIE; + int_ctx &= ~MSTATUS_MPIE; #ifndef CONFIG_BUILD_FLAT - int_ctx |= MSTATUS_MPPM; + int_ctx |= MSTATUS_MPPM; #endif CURRENT_REGS[REG_INT_CTX] = int_ctx; @@ -426,12 +426,12 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * here. */ - tcb->xcp.regs[REG_EPC] = (uintptr_t)riscv_sigdeliver; + tcb->xcp.regs[REG_EPC] = (uintptr_t)riscv_sigdeliver; - int_ctx = tcb->xcp.regs[REG_INT_CTX]; - int_ctx &= ~MSTATUS_MPIE; + int_ctx = tcb->xcp.regs[REG_INT_CTX]; + int_ctx &= ~MSTATUS_MPIE; - tcb->xcp.regs[REG_INT_CTX] = int_ctx; + tcb->xcp.regs[REG_INT_CTX] = int_ctx; } } }