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More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic

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This commit is contained in:
Gregory Nutt 2014-08-16 15:04:09 -06:00
parent 928952bec6
commit 057af36c1d
16 changed files with 112 additions and 87 deletions
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5
arch/arm/src/sama5/sam_emaca.c
View file

@ -385,7 +385,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac);
static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac);
#endif
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg);
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
#endif
/* PHY Initialization */
@ -1848,8 +1848,9 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
****************************************************************************/
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg)
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
{
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
int ret;
switch (cmd)

17
arch/arm/src/sama5/sam_emacb.c
View file

@ -344,7 +344,7 @@ struct sam_emacattr_s
{
/* Basic hardware information */
#ifdef CONFIG_NETDEV_PHY_IOCTL
#if defined(CONFIG_ARCH_PHY_INTERRUPT) && defined(CONFIG_NETDEV_PHY_IOCTL)
FAR const char *intf; /* Network interface name, e.g., "eth0" */
#endif
uint32_t base; /* EMAC Register base address */
@ -497,7 +497,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac);
static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac);
#endif
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg);
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
#endif
/* PHY Initialization */
@ -607,8 +607,8 @@ static const struct sam_emacattr_s g_emac0_attr =
{
/* Basic hardware information */
#ifdef CONFIG_NETDEV_PHY_IOCTL
.intf = SAMA5_EMAC0_DEVNAME;
#if defined(CONFIG_ARCH_PHY_INTERRUPT) && defined(CONFIG_NETDEV_PHY_IOCTL)
.intf = SAMA5_EMAC0_DEVNAME,
#endif
.base = SAM_EMAC0_VBASE,
.handler = sam_emac0_interrupt,
@ -678,8 +678,8 @@ static const struct sam_emacattr_s g_emac1_attr =
{
/* Basic hardware information */
#ifdef CONFIG_NETDEV_PHY_IOCTL
.intf = SAMA5_EMAC1_DEVNAME;
#if defined(CONFIG_ARCH_PHY_INTERRUPT) && defined(CONFIG_NETDEV_PHY_IOCTL)
.intf = SAMA5_EMAC1_DEVNAME,
#endif
.base = SAM_EMAC1_VBASE,
.handler = sam_emac1_interrupt,
@ -2234,8 +2234,9 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
****************************************************************************/
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg)
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
{
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
int ret;
switch (cmd)
@ -2244,7 +2245,7 @@ static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg)
case SIOCMIINOTIFY: /* Set up for PHY event notifications */
{
struct mii_iotcl_notify_s *req = (struct mii_iotcl_notify_s *)((uintptr_t)arg);
ret = phy_notify_subscribe(dev0->intf, req->pid, req->signo, req->arg);
ret = phy_notify_subscribe(priv->attr->intf, req->pid, req->signo, req->arg);
}
break;
#endif

5
arch/arm/src/sama5/sam_gmac.c
View file

@ -310,7 +310,7 @@ static int sam_addmac(struct net_driver_s *dev, const uint8_t *mac);
static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac);
#endif
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg);
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg);
#endif
/* PHY Initialization */
@ -1803,8 +1803,9 @@ static int sam_rmmac(struct net_driver_s *dev, const uint8_t *mac)
****************************************************************************/
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int sam_ioctl(struct net_driver_s *dev, int cmd, void *arg)
static int sam_ioctl(struct net_driver_s *dev, int cmd, long arg)
{
struct sam_emac_s *priv = (struct sam_emac_s *)dev->d_private;
int ret;
switch (cmd)

4
arch/arm/src/stm32/stm32_eth.c
View file

@ -659,7 +659,7 @@ static int stm32_addmac(struct net_driver_s *dev, FAR const uint8_t *mac);
static int stm32_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac);
#endif
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int stm32_ioctl(struct net_driver_s *dev, int cmd, void *arg);
static int stm32_ioctl(struct net_driver_s *dev, int cmd, long arg);
#endif
/* Descriptor Initialization */
@ -2509,7 +2509,7 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv)
****************************************************************************/
#ifdef CONFIG_NETDEV_PHY_IOCTL
static int stm32_ioctl(struct net_driver_s *dev, int cmd, void *arg)
static int stm32_ioctl(struct net_driver_s *dev, int cmd, long arg)
{
int ret;

31
configs/sama5d3-xplained/src/sam_ethernet.c
View file

@ -41,6 +41,7 @@
#include <string.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
@ -48,6 +49,8 @@
#include "sam_pio.h"
#include "sam_ethernet.h"
#include "sama5d3-xplained.h"
#ifdef HAVE_NETWORK
/************************************************************************************
@ -59,11 +62,11 @@
#endif
#ifdef CONFIG_SAMA5_EMAC_ISETH0
# SAMA5_EMAC_DEVNAME "eth0"
# SAMA5_GMAC_DEVNAME "eth1"
# define SAMA5_EMAC_DEVNAME "eth0"
# define SAMA5_GMAC_DEVNAME "eth1"
#else
# SAMA5_GMAC_DEVNAME "eth0"
# SAMA5_EMAC_DEVNAME "eth1"
# define SAMA5_GMAC_DEVNAME "eth0"
# define SAMA5_EMAC_DEVNAME "eth1"
#endif
/************************************************************************************
@ -72,10 +75,10 @@
#ifdef CONFIG_SAMA5_PIOE_IRQ
#ifdef CONFIG_SAMA5_EMACA
static xcpt g_emac_handler;
static xcpt_t g_emac_handler;
#endif
#ifdef CONFIG_SAMA5_GMAC
static xcpt g_gmac_handler;
static xcpt_t g_gmac_handler;
#endif
#endif
@ -97,7 +100,7 @@ static xcpt g_gmac_handler;
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA4_EMACA
#ifdef CONFIG_SAMA5_EMACA
/* Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
@ -120,7 +123,7 @@ void weak_function sam_netinitialize(void)
sam_configpio(PIO_INT_ETH1);
#endif
#ifdef CONFIG_SAMA4_GMAC
#ifdef CONFIG_SAMA5_GMAC
/* Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL
@ -191,10 +194,10 @@ void weak_function sam_netinitialize(void)
****************************************************************************/
#ifdef CONFIG_SAMA5_PIOE_IRQ
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler)
{
irqstate_t flags;
xcpt_t *handler;
xcpt_t *phandler;
xcpt_t oldhandler;
pio_pinset_t pinset;
int irq;
@ -204,7 +207,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_EMACA
if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0)
{
handler = &g_emac_handler;
phandler = &g_emac_handler;
pinset = PIO_INT_ETH1;
irq = IRQ_INT_ETH1;
}
@ -213,7 +216,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_GMAC
if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0)
{
handler = &g_gmac_handler;
phandler = &g_gmac_handler;
pinset = PIO_INT_ETH0;
irq = IRQ_INT_ETH0;
}
@ -232,8 +235,8 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
/* Get the old button interrupt handler and save the new one */
oldhandler = *handler;
*handler = handler;
oldhandler = *phandler;
*phandler = handler;
/* Configure the interrupt */

4
configs/sama5d3-xplained/src/sama5d3-xplained.h
View file

@ -418,7 +418,7 @@
/* Ethernet */
#ifdef CONFIG_SAMA4_EMACA
#ifdef CONFIG_SAMA5_EMACA
/* ETH1: Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
@ -444,7 +444,7 @@
#endif
#ifdef CONFIG_SAMA4_GMAC
#ifdef CONFIG_SAMA5_GMAC
/* ETH0: Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL

31
configs/sama5d3x-ek/src/sam_ethernet.c
View file

@ -41,6 +41,7 @@
#include <string.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
@ -48,6 +49,8 @@
#include "sam_pio.h"
#include "sam_ethernet.h"
#include "sama5d3x-ek.h"
#ifdef HAVE_NETWORK
/************************************************************************************
@ -59,11 +62,11 @@
#endif
#ifdef CONFIG_SAMA5_EMAC_ISETH0
# SAMA5_EMAC_DEVNAME "eth0"
# SAMA5_GMAC_DEVNAME "eth1"
# define SAMA5_EMAC_DEVNAME "eth0"
# define SAMA5_GMAC_DEVNAME "eth1"
#else
# SAMA5_GMAC_DEVNAME "eth0"
# SAMA5_EMAC_DEVNAME "eth1"
# define SAMA5_GMAC_DEVNAME "eth0"
# define SAMA5_EMAC_DEVNAME "eth1"
#endif
/************************************************************************************
@ -72,10 +75,10 @@
#ifdef CONFIG_SAMA5_PIOE_IRQ
#ifdef CONFIG_SAMA5_EMACA
static xcpt g_emac_handler;
static xcpt_t g_emac_handler;
#endif
#ifdef CONFIG_SAMA5_GMAC
static xcpt g_gmac_handler;
static xcpt_t g_gmac_handler;
#endif
#endif
@ -97,7 +100,7 @@ static xcpt g_gmac_handler;
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA4_EMACA
#ifdef CONFIG_SAMA5_EMACA
/* Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
@ -120,7 +123,7 @@ void weak_function sam_netinitialize(void)
sam_configpio(PIO_INT_ETH1);
#endif
#ifdef CONFIG_SAMA4_GMAC
#ifdef CONFIG_SAMA5_GMAC
/* Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL
@ -191,10 +194,10 @@ void weak_function sam_netinitialize(void)
****************************************************************************/
#ifdef CONFIG_SAMA5_PIOE_IRQ
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler)
{
irqstate_t flags;
xcpt_t *handler;
xcpt_t *phandler;
xcpt_t oldhandler;
pio_pinset_t pinset;
int irq;
@ -204,7 +207,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_EMACA
if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0)
{
handler = &g_emac_handler;
phandler = &g_emac_handler;
pinset = PIO_INT_ETH1;
irq = IRQ_INT_ETH1;
}
@ -213,7 +216,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_GMAC
if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0)
{
handler = &g_gmac_handler;
phandler = &g_gmac_handler;
pinset = PIO_INT_ETH0;
irq = IRQ_INT_ETH0;
}
@ -232,8 +235,8 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
/* Get the old button interrupt handler and save the new one */
oldhandler = *handler;
*handler = handler;
oldhandler = *phandler;
*phandler = handler;
/* Configure the interrupt */

4
configs/sama5d3x-ek/src/sama5d3x-ek.h
View file

@ -545,7 +545,7 @@
/* Ethernet */
#ifdef CONFIG_SAMA4_EMACA
#ifdef CONFIG_SAMA5_EMACA
/* ETH1: Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
@ -571,7 +571,7 @@
#endif
#ifdef CONFIG_SAMA4_GMAC
#ifdef CONFIG_SAMA5_GMAC
/* ETH0: Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL

31
configs/sama5d4-ek/src/sam_ethernet.c
View file

@ -41,6 +41,7 @@
#include <string.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
@ -48,6 +49,8 @@
#include "sam_pio.h"
#include "sam_ethernet.h"
#include "sama5d4-ek.h"
#ifdef HAVE_NETWORK
/************************************************************************************
@ -59,11 +62,11 @@
#endif
#ifdef CONFIG_SAMA5_EMAC0_ISETH0
# SAMA5_EMAC0_DEVNAME "eth0"
# SAMA5_EMAC1_DEVNAME "eth1"
# define SAMA5_EMAC0_DEVNAME "eth0"
# define SAMA5_EMAC1_DEVNAME "eth1"
#else
# SAMA5_EMAC0_DEVNAME "eth1"
# SAMA5_EMAC1_DEVNAME "eth0"
# define SAMA5_EMAC0_DEVNAME "eth1"
# define SAMA5_EMAC1_DEVNAME "eth0"
#endif
/************************************************************************************
@ -72,10 +75,10 @@
#ifdef CONFIG_SAMA5_PIOE_IRQ
#ifdef CONFIG_SAMA5_EMAC0
static xcpt g_emac0_handler;
static xcpt_t g_emac0_handler;
#endif
#ifdef CONFIG_SAMA5_EMAC1
static xcpt g_emac1_handler;
static xcpt_t g_emac1_handler;
#endif
#endif
@ -97,11 +100,11 @@ static xcpt g_emac1_handler;
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA4_EMAC0
#ifdef CONFIG_SAMA5_EMAC0
sam_configpio(PIO_INT_ETH0);
#endif
#ifdef CONFIG_SAMA4_EMAC1
#ifdef CONFIG_SAMA5_EMAC1
sam_configpio(PIO_INT_ETH1);
#endif
}
@ -160,10 +163,10 @@ void weak_function sam_netinitialize(void)
****************************************************************************/
#ifdef CONFIG_SAMA5_PIOE_IRQ
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler)
{
irqstate_t flags;
xcpt_t *handler;
xcpt_t *phandler;
xcpt_t oldhandler;
pio_pinset_t pinset;
int irq;
@ -173,7 +176,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_EMAC0
if (strcmp(intf, SAMA5_EMAC0_DEVNAME) == 0)
{
handler = &g_emac0_handler;
phandler = &g_emac0_handler;
pinset = PIO_INT_ETH0;
irq = IRQ_INT_ETH0;
}
@ -182,7 +185,7 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
#ifdef CONFIG_SAMA5_EMAC1
if (strcmp(intf, SAMA5_EMAC1_DEVNAME) == 0)
{
handler = &g_emac1_handler;
phandler = &g_emac1_handler;
pinset = PIO_INT_ETH1;
irq = IRQ_INT_ETH1;
}
@ -201,8 +204,8 @@ xcpt_t arch_phy_irq(FAR const char *intf, xcpt_t handler);
/* Get the old button interrupt handler and save the new one */
oldhandler = *handler;
*handler = handler;
oldhandler = *phandler;
*phandler = handler;
/* Configure the interrupt */

2
configs/sama5d4-ek/src/sam_hsmci.c
View file

@ -33,7 +33,7 @@
*
****************************************************************************/
/* The SAMA4D4-EK provides a two SD memory card slots: (1) a full size SD
/* The SAMA5D4-EK provides a two SD memory card slots: (1) a full size SD
* card slot (J10), and (2) a microSD memory card slot (J11).
*
* The full size SD card slot connects via HSMCI0. The card detect discrete

2
configs/sama5d4-ek/src/sam_nandflash.c
View file

@ -4,7 +4,7 @@
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Most of this file derives from Atmel sample code for the SAMA4D4-EK
* Most of this file derives from Atmel sample code for the SAMA5D4-EK
* board. That sample code has licensing that is compatible with the NuttX
* modified BSD license:
*

2
configs/sama5d4-ek/src/sam_spi.c
View file

@ -89,7 +89,7 @@
* Name: sam_spiinitialize
*
* Description:
* Called to configure SPI chip select PIO pins for the SAMA4D4-EK board.
* Called to configure SPI chip select PIO pins for the SAMA5D4-EK board.
*
************************************************************************************/

2
configs/sama5d4-ek/src/sam_usb.c
View file

@ -197,7 +197,7 @@ static int ehci_waiter(int argc, char *argv[])
*
* Description:
* Called from sam_usbinitialize very early in inialization to setup USB-related
* GPIO pins for the SAMA4D4-EK board.
* GPIO pins for the SAMA5D4-EK board.
*
* USB Ports
* The SAMA5D4 series-MB features three USB communication ports:

18
configs/sama5d4-ek/src/sama5d4-ek.h
View file

@ -540,7 +540,7 @@
#define MXT_I2C_ADDRESS 0x4c
/* HSMCI Card Slots *****************************************************************/
/* The SAMA4D4-EK provides a two SD memory card slots: (1) a full size SD
/* The SAMA5D4-EK provides a two SD memory card slots: (1) a full size SD
* card slot (J10), and (2) a microSD memory card slot (J11).
*
* The full size SD card slot connects via HSMCI0. The card detect discrete
@ -597,7 +597,7 @@
PIO_PORT_PIOE | PIO_PIN15)
/* USB Ports ************************************************************************/
/* The SAMA4D4-EK features three USB communication ports:
/* The SAMA5D4-EK features three USB communication ports:
*
* * Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with
* USB Device High Speed Micro AB connector, J1
@ -685,7 +685,7 @@
/* Ethernet */
#ifdef CONFIG_SAMA4_EMACB
#ifdef CONFIG_SAMA5_EMACB
/* ETH0/1: Ethernet 10/100 (EMAC) Ports
*
* Networking support via the can be added to NSH by selecting the following
@ -747,13 +747,13 @@
* - LCD_ETH1_CONFIG = 1 & LCD_DETECT# =0: LCD 5v enable
*/
#ifdef CONFIG_SAMA4_EMAC0
#ifdef CONFIG_SAMA5_EMAC0
# define PIO_INT_ETH0 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN1)
# define IRQ_INT_ETH0 SAM_IRQ_PE1
#endif
#ifdef CONFIG_SAMA4_EMAC1
#ifdef CONFIG_SAMA5_EMAC1
# define PIO_INT_ETH1 (PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
PIO_INT_BOTHEDGES | PIO_PORT_PIOE | PIO_PIN2)
# define IRQ_INT_ETH1 SAM_IRQ_PE2
@ -844,7 +844,7 @@
* Name: sam_spiinitialize
*
* Description:
* Called to configure SPI chip select PIO pins for the SAMA4D4-EK board.
* Called to configure SPI chip select PIO pins for the SAMA5D4-EK board.
*
************************************************************************************/
@ -858,7 +858,7 @@ void weak_function sam_spiinitialize(void);
* Description:
* Configures DDR2 (MT47H128M16RT 128MB or, optionally, MT47H64M16HR)
*
* Per the SAMA4D4-EK User guide: "Two SDRAM/DDR2 used as main system memory.
* Per the SAMA5D4-EK User guide: "Two SDRAM/DDR2 used as main system memory.
* MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks, the board provides up to 2 Gb on-
* board, soldered DDR2 SDRAM. The memory bus is 32 bits wide and operates with
* up to 166 MHz."
@ -870,7 +870,7 @@ void weak_function sam_spiinitialize(void);
* Column address A[9:0] (1K)
* Bank address BA[2:0] a(24,25) (8)
*
* This logic was taken from Atmel sample code for the SAMA4D4-EK.
* This logic was taken from Atmel sample code for the SAMA5D4-EK.
*
* Input Parameters:
* devtype - Either DDRAM_MT47H128M16RT or DDRAM_MT47H64M16HR
@ -999,7 +999,7 @@ bool sam_writeprotected(int slotno);
*
* Description:
* Called from sam_usbinitialize very early in inialization to setup USB-related
* PIO pins for the SAMA4D4-EK board.
* PIO pins for the SAMA5D4-EK board.
*
************************************************************************************/

2
include/net/if.h
View file

@ -138,7 +138,7 @@ struct ifreq
int ifru_count; /* Number of devices */
int ifru_mtu; /* MTU size */
uint8_t ifru_flags; /* Interface flags */
struct mii_iotcl_notify_s llfru_mii_notify; /* PHY event notification */
struct mii_iotcl_notify_s ifru_mii_notify; /* PHY event notification */
struct mii_ioctl_data_s ifru_mii_data; /* MII request data */
} ifr_ifru;
};

15
net/netdev/netdev_ioctl.c
View file

@ -425,6 +425,19 @@ static int netdev_ifrioctl(FAR struct socket *psock, int cmd,
#endif
#ifdef CONFIG_NETDEV_PHY_IOCTL
#ifdef CONFIG_ARCH_PHY_INTERRUPT
case SIOCMIINOTIFY: /* Set up for PHY event notifications */
{
dev = netdev_ifrdev(req);
if (dev && dev->d_ioctl)
{
struct mii_iotcl_notify_s *notify = &req->ifr_ifru.ifru_mii_notify;
ret = dev->d_ioctl(dev, cmd, ((long)(uintptr_t)notify));
}
}
break;
#endif
case SIOCGMIIPHY: /* Get address of MII PHY in use */
case SIOCGMIIREG: /* Get MII register via MDIO */
case SIOCSMIIREG: /* Set MII register via MDIO */
@ -433,7 +446,7 @@ static int netdev_ifrioctl(FAR struct socket *psock, int cmd,
if (dev && dev->d_ioctl)
{
struct mii_ioctl_data_s *mii_data = &req->ifr_ifru.ifru_mii_data;
ret = dev->d_ioctl(dev, cmd, ((long)(uintptr_t)mii_data);
ret = dev->d_ioctl(dev, cmd, ((long)(uintptr_t)mii_data));
}
}
break;