Adds the simulated QSPI (N25Q) flash to the simulation and modify sim up_spiflash.c to enable it to run with different MTD drivers based on config options (currently m25p, sst26 and w25).
This commit is contained in:
Ken Pettit
Gregory Nutt
parent
f222d37aa7
commit
148cf1ac22
5 changed files with 320 additions and 53 deletions
134
arch/sim/Kconfig
134
arch/sim/Kconfig
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@ -245,20 +245,6 @@ config SIM_SPIFLASH_128M
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endchoice
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config SIM_SPIFLASH_MANUFACTURER
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hex "Hex ID of the FLASH manufacturer code"
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default 0x20
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depends on SIM_SPIFLASH
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---help---
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Allows the simulated FLASH Manufacturer ID to be set.
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config SIM_SPIFLASH_MEMORY_TYPE
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hex "Hex ID of the FLASH Memory Type code"
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default 0x20
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depends on SIM_SPIFLASH
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---help---
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Allows the simulated FLASH Memory Type code to be set.
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config SIM_SPIFLASH_SECTORSIZE
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int "FLASH Sector Erase Size"
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default 65536
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@ -277,6 +263,51 @@ config SIM_SPIFLASH_SUBSECTORSIZE
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Sets the smaller sub-sector erase size supported by the
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FLASH emulation
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config SIM_SPIFLASH_M25P
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bool "Enable M25Pxx FLASH"
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depends on MTD_M25P
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---help---
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Enables simulation of an M25P type FLASH
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config SIM_SPIFLASH_SST26
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bool "Enable SST26 FLASH"
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depends on MTD_SST26
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---help---
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Enables simulation of an SST26 type FLASH
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config SIM_SPIFLASH_W25
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bool "Enable W25 FLASH"
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depends on MTD_W25
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---help---
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Enables simulation of a W25 type FLASH
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config SIM_SPIFLASH_CUSTOM
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bool "Enable Emulation of a Custom Manufacturer / ID FLASH"
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depends on SIM_SPIFLASH
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---help---
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Enables simulation of FLASH with a custom Manufacturer, ID and Capacity
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config SIM_SPIFLASH_MANUFACTURER
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hex "Hex ID of the FLASH manufacturer code"
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default 0x20
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depends on SIM_SPIFLASH_CUSTOM
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---help---
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Allows the simulated FLASH Manufacturer ID to be set.
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config SIM_SPIFLASH_MEMORY_TYPE
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hex "Hex ID of the FLASH Memory Type code"
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default 0x20
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depends on SIM_SPIFLASH_CUSTOM
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---help---
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Allows the simulated FLASH Memory Type code to be set.
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config SIM_SPIFLASH_CAPACITY
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hex "Hex ID of the FLASH capacity code"
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default 0x14
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depends on SIM_SPIFLASH_CUSTOM
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---help---
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Allows the simulated FLASH Memory Capacity code to be set.
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config SIM_SPIFLASH_PAGESIZE
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int "FLASH Write / Program Page Size"
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default 256
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@ -289,4 +320,79 @@ config SIM_SPIFLASH_PAGESIZE
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"wrap" causing the initial data sent to be overwritten.
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This is consistent with standard SPI FLASH operation.
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config SIM_QSPIFLASH
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bool "Simulated QSPI FLASH with SMARTFS"
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default n
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select FS_SMARTFS
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select MTD_SMART
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---help---
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Adds a simulated QSPI FLASH that responds to N25QXXX style
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commands on the QSPI bus.
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choice
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prompt "Simulated QSPI FLASH Size"
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default SIM_QSPIFLASH_1M
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depends on SIM_QSPIFLASH
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config SIM_QSPIFLASH_1M
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bool "1 MBit (128K Byte)"
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config SIM_QSPIFLASH_8M
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bool "8 MBit (1M Byte)"
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config SIM_QSPIFLASH_32M
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bool "32 MBit (4M Byte)"
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config SIM_QSPIFLASH_64M
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bool "64 MBit (8M Byte)"
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config SIM_QSPIFLASH_128M
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bool "128 MBit (16M Byte)"
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endchoice
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config SIM_QSPIFLASH_MANUFACTURER
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hex "Hex ID of the FLASH manufacturer code"
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default 0x20
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depends on SIM_QSPIFLASH
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---help---
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Allows the simulated FLASH Manufacturer ID to be set.
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config SIM_QSPIFLASH_MEMORY_TYPE
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hex "Hex ID of the FLASH Memory Type code"
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default 0xba
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depends on SIM_QSPIFLASH
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---help---
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Allows the simulated FLASH Memory Type code to be set.
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config SIM_QSPIFLASH_SECTORSIZE
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int "FLASH Sector Erase Size"
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default 65536
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depends on SIM_QSPIFLASH
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---help---
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Sets the large sector erase size that the part simulates.
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This driver simulates QSPI devices that have both a large
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sector erase as well as a "sub-sector" (per the datasheet)
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erase size (typically 4K bytes).
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config SIM_QSPIFLASH_SUBSECTORSIZE
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int "FLASH Sub-Sector Erase Size"
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default 4096
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depends on SIM_QSPIFLASH
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---help---
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Sets the smaller sub-sector erase size supported by the
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FLASH emulation
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config SIM_QSPIFLASH_PAGESIZE
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int "FLASH Write / Program Page Size"
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default 256
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depends on SIM_QSPIFLASH
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---help---
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Sets the size of a page program operation. The page size
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represents the maximum number of bytes that can be sent
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for a program operation. If more bytes than this are
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sent on a single Page Program, then the address will
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"wrap" causing the initial data sent to be overwritten.
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This is consistent with standard SPI FLASH operation.
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endif
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@ -57,7 +57,7 @@ CSRCS = up_initialize.c up_idle.c up_interruptcontext.c up_initialstate.c
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CSRCS += up_createstack.c up_usestack.c up_releasestack.c up_stackframe.c
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CSRCS += up_unblocktask.c up_blocktask.c up_releasepending.c
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CSRCS += up_reprioritizertr.c up_exit.c up_schedulesigaction.c up_spiflash.c
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CSRCS += up_allocateheap.c up_devconsole.c
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CSRCS += up_allocateheap.c up_devconsole.c up_qspiflash.c
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HOSTSRCS = up_hostusleep.c
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@ -71,32 +71,86 @@
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*
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****************************************************************************/
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#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH)
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#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH))
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static void up_init_smartfs(void)
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{
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FAR struct mtd_dev_s *mtd;
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int minor = 0;
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#if defined(CONFIG_MTD_M25P) || defined(CONFIG_MTD_W25) || defined(CONFIG_MTD_SST26)
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FAR struct spi_dev_s *spi;
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#endif
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#ifdef CONFIG_MTD_N25QXXX
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FAR struct qspi_dev_s *qspi;
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#endif
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#ifdef CONFIG_SIM_SPIFLASH
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#ifdef CONFIG_MTD_M25P
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/* Initialize a simulated SPI FLASH block device m25p MTD driver */
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spi = up_spiflashinitialize();
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mtd = m25p_initialize(spi);
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spi = up_spiflashinitialize("m25p");
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if (spi != NULL)
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{
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mtd = m25p_initialize(spi);
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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smart_initialize(0, mtd, NULL);
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if (mtd != NULL)
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{
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smart_initialize(minor++, mtd, "_m25p");
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}
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}
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#endif
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#ifdef CONFIG_MTD_SST26
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/* Initialize a simulated SPI FLASH block device sst26 MTD driver */
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spi = up_spiflashinitialize("sst26");
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if (spi != NULL)
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{
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mtd = sst26_initialize_spi(spi);
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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if (mtd != NULL)
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{
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smart_initialize(minor++, mtd, "_sst26");
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}
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}
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#endif
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#ifdef CONFIG_MTD_W25
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/* Initialize a simulated SPI FLASH block device m25p MTD driver */
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/* Initialize a simulated SPI FLASH block device w25 MTD driver */
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spi = up_spiflashinitialize();
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mtd = w25_initialize(spi);
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spi = up_spiflashinitialize("w25");
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if (spi != NULL)
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{
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mtd = w25_initialize(spi);
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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smart_initialize(0, mtd, NULL);
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if (mtd != NULL)
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{
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smart_initialize(minor++, mtd, "_w25");
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}
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}
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#endif
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#endif /* CONFIG_SIM_SPIFLASH */
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#if defined(CONFIG_MTD_N25QXXX) && defined(CONFIG_SIM_QSPIFLASH)
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/* Initialize a simulated SPI FLASH block device n25qxxx MTD driver */
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qspi = up_qspiflashinitialize();
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if (qspi != NULL)
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{
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mtd = n25qxxx_initialize(qspi, 0);
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/* Now initialize a SMART Flash block device and bind it to the MTD device */
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if (mtd != NULL)
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{
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smart_initialize(minor++, mtd, "_n25q");
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}
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}
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#endif
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}
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#endif
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@ -238,7 +292,7 @@ void up_initialize(void)
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(void)telnet_initialize();
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#endif
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#if defined(CONFIG_FS_SMARTFS) && defined(CONFIG_SIM_SPIFLASH)
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#if defined(CONFIG_FS_SMARTFS) && (defined(CONFIG_SIM_SPIFLASH) || defined(CONFIG_SIM_QSPIFLASH))
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up_init_smartfs();
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#endif
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}
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@ -336,7 +336,12 @@ void netdriver_loop(void);
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#ifdef CONFIG_SIM_SPIFLASH
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struct spi_dev_s;
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struct spi_dev_s *up_spiflashinitialize(void);
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struct spi_dev_s *up_spiflashinitialize(FAR const char *name);
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#endif
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#ifdef CONFIG_SIM_QSPIFLASH
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struct qspi_dev_s;
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struct qspi_dev_s *up_qspiflashinitialize(void);
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#endif
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#endif /* __ASSEMBLY__ */
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@ -1,7 +1,7 @@
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/************************************************************************************
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* arch/sim/src/up_spiflash.c
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*
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* Copyright (C) 2014 Ken Pettit. All rights reserved.
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* Copyright (C) 2014, 2016 Ken Pettit. All rights reserved.
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* Author: Ken Pettit <pettitkd@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -63,33 +63,37 @@
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/* Define the FLASH SIZE in bytes */
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#ifdef CONFIG_SIM_SPIFLASH_1M
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# define CONFIG_SPIFLASH_SIZE (128 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x11
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# define CONFIG_SPIFLASH_SIZE (128 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x11
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#ifndef CONFIG_SIM_SPIFLASH_SECTORSIZE
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# define CONFIG_SIM_SPIFLASH_SECTORSIZE 2048
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# define CONFIG_SIM_SPIFLASH_SECTORSIZE 2048
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#endif
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_8M
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# define CONFIG_SPIFLASH_SIZE (1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x14
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# define CONFIG_SPIFLASH_SIZE (1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY_SST26 0x3F
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# define CONFIG_SPIFLASH_CAPACITY 0x14
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_32M
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# define CONFIG_SPIFLASH_SIZE (4 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x16
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# define CONFIG_SPIFLASH_SIZE (4 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY_SST26 0x42
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# define CONFIG_SPIFLASH_CAPACITY 0x16
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_64M
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# define CONFIG_SPIFLASH_SIZE (8 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x17
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# define CONFIG_SPIFLASH_SIZE (8 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY_SST26 0x43
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# define CONFIG_SPIFLASH_CAPACITY 0x17
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_128M
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# define CONFIG_SPIFLASH_SIZE (16 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY 0x18
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# define CONFIG_SPIFLASH_SIZE (16 * 1024 * 1024)
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# define CONFIG_SPIFLASH_CAPACITY_SST26 0x44
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# define CONFIG_SPIFLASH_CAPACITY 0x18
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#endif
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#ifndef CONFIG_SIM_SPIFLASH_MANUFACTURER
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@ -169,14 +173,18 @@
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struct sim_spiflashdev_s
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{
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struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
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uint32_t selected; /* SPIn base address */
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int wren;
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int state;
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uint16_t read_data;
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uint8_t last_cmd;
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unsigned long address;
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unsigned char data[CONFIG_SPIFLASH_SIZE];
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struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
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uint32_t selected; /* SPIn base address */
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FAR char * name; /* Name of the flash type (m25p, w25, etc.) */
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int wren;
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int state;
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uint16_t read_data;
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uint8_t last_cmd;
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uint8_t capacity;
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uint8_t manuf;
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uint8_t type;
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unsigned long address;
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unsigned char data[CONFIG_SPIFLASH_SIZE];
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};
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/************************************************************************************
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@ -236,9 +244,72 @@ static const struct spi_ops_s g_spiops =
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.registercallback = 0,
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};
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struct sim_spiflashdev_s g_spidev =
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#ifdef CONFIG_SIM_SPIFLASH_M25P
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struct sim_spiflashdev_s g_spidev_m25p =
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{
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.spidev = { &g_spiops },
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.name = "m25p",
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.manuf = 0x20,
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.type = 0x20,
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.capacity = CONFIG_SPIFLASH_CAPACITY
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};
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_SST26
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struct sim_spiflashdev_s g_spidev_sst26 =
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{
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.spidev = { &g_spiops },
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.name = "sst26",
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.manuf = 0xBF,
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#ifdef CONFIG_SST26_MEMORY_TYPE
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.type = CONFIG_SST26_MEMORY_TYPE,
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#else
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.type = 0x25,
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#endif
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.capacity = CONFIG_SPIFLASH_CAPACITY_SST26
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};
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_W25
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struct sim_spiflashdev_s g_spidev_w25 =
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{
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.spidev = { &g_spiops },
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.name = "w25",
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.manuf = 0xef,
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.type = 0x30,
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.capacity = CONFIG_SPIFLASH_CAPACITY
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};
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_CUSTOM
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struct sim_spiflashdev_s g_spidev_custom =
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{
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.spidev = { &g_spiops },
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.name = "custom",
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.manuf = CONFIG_SIM_SPIFLASH_MANUFACTURER,
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.type = CONFIG_SIM_SPIFLASH_MEMORY_TYPE,
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.capacity = CONFIG_SIM_SPIFLASH_CAPACITY
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};
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#endif
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struct sim_spiflashdev_s *gp_spidev[] =
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{
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#ifdef CONFIG_SIM_SPIFLASH_M25P
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&g_spidev_m25p,
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_SST26
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&g_spidev_sst26,
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_W25
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&g_spidev_w25,
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#endif
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#ifdef CONFIG_SIM_SPIFLASH_CUSTOM
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&g_spidev_custom,
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#endif
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// Null termination pointer at end of list
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NULL
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};
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/************************************************************************************
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@ -662,17 +733,17 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data
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/* Read ID States */
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case SPIFLASH_STATE_RDID1:
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priv->read_data = CONFIG_SIM_SPIFLASH_MANUFACTURER;
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priv->read_data = priv->manuf; //CONFIG_SIM_SPIFLASH_MANUFACTURER;
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priv->state = SPIFLASH_STATE_RDID2;
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break;
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case SPIFLASH_STATE_RDID2:
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priv->read_data = CONFIG_SIM_SPIFLASH_MEMORY_TYPE;
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priv->read_data = priv->type; //CONFIG_SIM_SPIFLASH_MEMORY_TYPE;
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priv->state = SPIFLASH_STATE_RDID3;
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break;
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case SPIFLASH_STATE_RDID3:
|
||||
priv->read_data = CONFIG_SPIFLASH_CAPACITY;
|
||||
priv->read_data = priv->capacity; //CONFIG_SPIFLASH_CAPACITY;
|
||||
priv->state = SPIFLASH_STATE_IDLE;
|
||||
break;
|
||||
|
||||
|
|
@ -834,13 +905,44 @@ static uint16_t spiflash_readword(FAR struct sim_spiflashdev_s *priv)
|
|||
*
|
||||
************************************************************************************/
|
||||
|
||||
FAR struct spi_dev_s *up_spiflashinitialize()
|
||||
FAR struct spi_dev_s *up_spiflashinitialize(FAR const char *name)
|
||||
{
|
||||
FAR struct sim_spiflashdev_s *priv = NULL;
|
||||
int x;
|
||||
|
||||
irqstate_t flags = enter_critical_section();
|
||||
|
||||
priv = &g_spidev;
|
||||
/* Loop through all supported flash devices */
|
||||
|
||||
/* Default to custom FLASH if not specified */
|
||||
|
||||
if (name == NULL)
|
||||
{
|
||||
name = "custom";
|
||||
}
|
||||
|
||||
for (x = 0; gp_spidev[x] != NULL; x++)
|
||||
{
|
||||
/* Search for the specified flash by name */
|
||||
|
||||
if (strcmp(name, gp_spidev[x]->name) == 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Test if flash device found */
|
||||
|
||||
if (gp_spidev[x] == NULL)
|
||||
{
|
||||
/* Specified device not supported */
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Configure the selected flash device */
|
||||
|
||||
priv = gp_spidev[x];
|
||||
priv->selected = 0;
|
||||
priv->wren = 0;
|
||||
priv->address = 0;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue