From 1f745e534b99762cd782fb3e7012f692dda6ea99 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 11 Sep 2015 18:42:49 -0600 Subject: [PATCH] SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device --- arch/arm/src/sama5/chip/sam_flexcom_usart.h | 354 ++++++++++---------- arch/arm/src/sama5/chip/sam_pinmap.h | 2 +- arch/arm/src/sama5/sam_flexcom_serial.c | 42 ++- arch/arm/src/sama5/sam_lowputc.c | 47 +-- arch/arm/src/sama5/sam_pck.c | 7 +- 5 files changed, 240 insertions(+), 212 deletions(-) diff --git a/arch/arm/src/sama5/chip/sam_flexcom_usart.h b/arch/arm/src/sama5/chip/sam_flexcom_usart.h index 5ab893622c..6331e06fb6 100644 --- a/arch/arm/src/sama5/chip/sam_flexcom_usart.h +++ b/arch/arm/src/sama5/chip/sam_flexcom_usart.h @@ -50,207 +50,195 @@ * Pre-processor Definitions ************************************************************************************************/ -/* USART offset *********************************************************************************/ - -#define SAM_FLEXUS_OFFSET 0x0200 /* 0x0200-0x03ff: Flexcom USART register offset */ - /* USART register offsets ***********************************************************************/ -#define SAM_FLEXUS_CR_OFFSET 0x0000 /* USART Control Register */ -#define SAM_FLEXUS_MR_OFFSET 0x0004 /* USART Mode Register */ -#define SAM_FLEXUS_IER_OFFSET 0x0008 /* USART Interrupt Enable Register */ -#define SAM_FLEXUS_IDR_OFFSET 0x000c /* USART Interrupt Disable Register */ -#define SAM_FLEXUS_IMR_OFFSET 0x0010 /* USART Interrupt Mask Register */ -#define SAM_FLEXUS_CSR_OFFSET 0x0014 /* USART Channel Status Register */ -#define SAM_FLEXUS_RHR_OFFSET 0x0018 /* USART Receive Holding Register */ -#define SAM_FLEXUS_THR_OFFSET 0x001c /* USART Transmit Holding Register */ -#define SAM_FLEXUS_BRGR_OFFSET 0x0020 /* USART Baud Rate Generator Register */ -#define SAM_FLEXUS_RTOR_OFFSET 0x0024 /* USART Receiver Time-out Register */ -#define SAM_FLEXUS_TTGR_OFFSET 0x0028 /* USART Transmitter Timeguard Register */ - /* 0x002c-0x003c: Reserved */ -#define SAM_FLEXUS_FIDI_OFFSET 0x0040 /* USART FI DI Ratio Register */ -#define SAM_FLEXUS_NER_OFFSET 0x0044 /* USART Number of Errors Register */ - /* 0x0048: Reserved (FLEXUS) */ -#define SAM_FLEXUS_IF_OFFSET 0x004c /* USART IrDA Filter Register */ -#define SAM_FLEXUS_MAN_OFFSET 0x0050 /* USART Manchester Configuration Register */ -#define SAM_FLEXUS_LINMR_OFFSET 0x0054 /* USART LIN Mode Register */ -#define SAM_FLEXUS_LINIR_OFFSET 0x0058 /* USART LIN Identifier Register */ -#define SAM_FLEXUS_LINBRR_OFFSET 0x005c /* USART LIN Baud Rate Register */ - /* 0x0060-0x008c: Reserved (FLEXUS) */ -#define SAM_FLEXUS_CMPR_OFFSET 0x0090 /* USART Comparison Register */ -#define SAM_FLEXUS_FMR_OFFSET 0x00a0 /* USART FIFO Mode Register */ -#define SAM_FLEXUS_FLR_OFFSET 0x00a4 /* USART FIFO Level Register */ -#define SAM_FLEXUS_FIER_OFFSET 0x00a8 /* USART FIFO Interrupt Enable Register */ -#define SAM_FLEXUS_FIDR_OFFSET 0x00ac /* USART FIFO Interrupt Disable Register */ -#define SAM_FLEXUS_FIMR_OFFSET 0x00b0 /* USART FIFO Interrupt Mask Register */ -#define SAM_FLEXUS_FESR_OFFSET 0x00b4 /* USART FIFO Event Status Register */ - /* 0x00b8-0x00e: Reserved */ -#define SAM_FLEXUS_WPMR_OFFSET 0x00e4 /* Write Protect Mode Register (4) */ -#define SAM_FLEXUS_WPSR_OFFSET 0x00e8 /* Write Protect Status Register (4) */ - /* 0x00ec-0x00fc: Reserved (USART) */ - -/* USART base addresses *************************************************************************/ - -#define SAM_FLEXUS0_VBASE (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_OFFSET) -#define SAM_FLEXUS1_VBASE (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_OFFSET) -#define SAM_FLEXUS2_VBASE (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_OFFSET) -#define SAM_FLEXUS3_VBASE (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_OFFSET) -#define SAM_FLEXUS4_VBASE (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_OFFSET) +#define SAM_FLEXUS_CR_OFFSET 0x0200 /* USART Control Register */ +#define SAM_FLEXUS_MR_OFFSET 0x0204 /* USART Mode Register */ +#define SAM_FLEXUS_IER_OFFSET 0x0208 /* USART Interrupt Enable Register */ +#define SAM_FLEXUS_IDR_OFFSET 0x020c /* USART Interrupt Disable Register */ +#define SAM_FLEXUS_IMR_OFFSET 0x0210 /* USART Interrupt Mask Register */ +#define SAM_FLEXUS_CSR_OFFSET 0x0214 /* USART Channel Status Register */ +#define SAM_FLEXUS_RHR_OFFSET 0x0218 /* USART Receive Holding Register */ +#define SAM_FLEXUS_THR_OFFSET 0x021c /* USART Transmit Holding Register */ +#define SAM_FLEXUS_BRGR_OFFSET 0x0220 /* USART Baud Rate Generator Register */ +#define SAM_FLEXUS_RTOR_OFFSET 0x0224 /* USART Receiver Time-out Register */ +#define SAM_FLEXUS_TTGR_OFFSET 0x0228 /* USART Transmitter Timeguard Register */ + /* 0x022c-0x023c: Reserved */ +#define SAM_FLEXUS_FIDI_OFFSET 0x0240 /* USART FI DI Ratio Register */ +#define SAM_FLEXUS_NER_OFFSET 0x0244 /* USART Number of Errors Register */ + /* 0x0248: Reserved (FLEXUS) */ +#define SAM_FLEXUS_IF_OFFSET 0x024c /* USART IrDA Filter Register */ +#define SAM_FLEXUS_MAN_OFFSET 0x0250 /* USART Manchester Configuration Register */ +#define SAM_FLEXUS_LINMR_OFFSET 0x0254 /* USART LIN Mode Register */ +#define SAM_FLEXUS_LINIR_OFFSET 0x0258 /* USART LIN Identifier Register */ +#define SAM_FLEXUS_LINBRR_OFFSET 0x025c /* USART LIN Baud Rate Register */ + /* 0x0260-0x028c: Reserved (FLEXUS) */ +#define SAM_FLEXUS_CMPR_OFFSET 0x0290 /* USART Comparison Register */ +#define SAM_FLEXUS_FMR_OFFSET 0x02a0 /* USART FIFO Mode Register */ +#define SAM_FLEXUS_FLR_OFFSET 0x02a4 /* USART FIFO Level Register */ +#define SAM_FLEXUS_FIER_OFFSET 0x02a8 /* USART FIFO Interrupt Enable Register */ +#define SAM_FLEXUS_FIDR_OFFSET 0x02ac /* USART FIFO Interrupt Disable Register */ +#define SAM_FLEXUS_FIMR_OFFSET 0x02b0 /* USART FIFO Interrupt Mask Register */ +#define SAM_FLEXUS_FESR_OFFSET 0x02b4 /* USART FIFO Event Status Register */ + /* 0x02b8-0x02e: Reserved */ +#define SAM_FLEXUS_WPMR_OFFSET 0x02e4 /* Write Protect Mode Register (4) */ +#define SAM_FLEXUS_WPSR_OFFSET 0x02e8 /* Write Protect Status Register (4) */ + /* 0x02ec-0x02fc: Reserved (USART) */ /* USART register adresses ***********************************************************************/ #ifdef CONFIG_SAMA5_HAVE_FLEXCOM0 -# define SAM_FLEXUS0_CR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_CR_OFFSET) -# define SAM_FLEXUS0_MR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_MR_OFFSET) -# define SAM_FLEXUS0_IER (SAM_FLEXUS0_VBASE+SAM_FLEXUS_IER_OFFSET) -# define SAM_FLEXUS0_IDR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_IDR_OFFSET) -# define SAM_FLEXUS0_IMR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_IMR_OFFSET) -# define SAM_FLEXUS0_CSR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_CSR_OFFSET) -# define SAM_FLEXUS0_RHR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_RHR_OFFSET) -# define SAM_FLEXUS0_THR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_THR_OFFSET) -# define SAM_FLEXUS0_BRGR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_BRGR_OFFSET) -# define SAM_FLEXUS0_RTOR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_RTOR_OFFSET) -# define SAM_FLEXUS0_TTGR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_TTGR_OFFSET) -# define SAM_FLEXUS0_FIDI (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FIDI_OFFSET) -# define SAM_FLEXUS0_NER (SAM_FLEXUS0_VBASE+SAM_FLEXUS_NER_OFFSET) -# define SAM_FLEXUS0_IF (SAM_FLEXUS0_VBASE+SAM_FLEXUS_IF_OFFSET) -# define SAM_FLEXUS0_MAN (SAM_FLEXUS0_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS0_LINMR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_LINMR_OFFSET) -# define SAM_FLEXUS0_LINIR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_LINIR_OFFSET) -# define SAM_FLEXUS0_LINBRR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_LINBRR_OFFSET) -# define SAM_FLEXUS0_CMPR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_CMPR_OFFSET) -# define SAM_FLEXUS0_FMR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FMR_OFFSET) -# define SAM_FLEXUS0_FLR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FLR_OFFSET) -# define SAM_FLEXUS0_FIER (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FIER_OFFSET) -# define SAM_FLEXUS0_FIDR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FIDR_OFFSET) -# define SAM_FLEXUS0_FIMR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FIMR_OFFSET) -# define SAM_FLEXUS0_FESR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_FESR_OFFSET) -# define SAM_FLEXUS0_WPMR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_WPMR_OFFSET) -# define SAM_FLEXUS0_WPSR (SAM_FLEXUS0_VBASE+SAM_FLEXUS_WPSR_OFFSET) +# define SAM_FLEXUS0_CR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_CR_OFFSET) +# define SAM_FLEXUS0_MR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_MR_OFFSET) +# define SAM_FLEXUS0_IER (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_IER_OFFSET) +# define SAM_FLEXUS0_IDR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_IDR_OFFSET) +# define SAM_FLEXUS0_IMR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_IMR_OFFSET) +# define SAM_FLEXUS0_CSR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_CSR_OFFSET) +# define SAM_FLEXUS0_RHR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_RHR_OFFSET) +# define SAM_FLEXUS0_THR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_THR_OFFSET) +# define SAM_FLEXUS0_BRGR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_BRGR_OFFSET) +# define SAM_FLEXUS0_RTOR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_RTOR_OFFSET) +# define SAM_FLEXUS0_TTGR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_TTGR_OFFSET) +# define SAM_FLEXUS0_FIDI (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FIDI_OFFSET) +# define SAM_FLEXUS0_NER (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_NER_OFFSET) +# define SAM_FLEXUS0_IF (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_IF_OFFSET) +# define SAM_FLEXUS0_MAN (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS0_LINMR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_LINMR_OFFSET) +# define SAM_FLEXUS0_LINIR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_LINIR_OFFSET) +# define SAM_FLEXUS0_LINBRR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_LINBRR_OFFSET) +# define SAM_FLEXUS0_CMPR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_CMPR_OFFSET) +# define SAM_FLEXUS0_FMR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FMR_OFFSET) +# define SAM_FLEXUS0_FLR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FLR_OFFSET) +# define SAM_FLEXUS0_FIER (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FIER_OFFSET) +# define SAM_FLEXUS0_FIDR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FIDR_OFFSET) +# define SAM_FLEXUS0_FIMR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FIMR_OFFSET) +# define SAM_FLEXUS0_FESR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_FESR_OFFSET) +# define SAM_FLEXUS0_WPMR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_WPMR_OFFSET) +# define SAM_FLEXUS0_WPSR (SAM_FLEXCOM0_VBASE+SAM_FLEXUS_WPSR_OFFSET) #endif #ifdef CONFIG_SAMA5_HAVE_FLEXCOM1 -# define SAM_FLEXUS1_CR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_CR_OFFSET) -# define SAM_FLEXUS1_MR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_MR_OFFSET) -# define SAM_FLEXUS1_IER (SAM_FLEXUS1_VBASE+SAM_FLEXUS_IER_OFFSET) -# define SAM_FLEXUS1_IDR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_IDR_OFFSET) -# define SAM_FLEXUS1_IMR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_IMR_OFFSET) -# define SAM_FLEXUS1_CSR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_CSR_OFFSET) -# define SAM_FLEXUS1_RHR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_RHR_OFFSET) -# define SAM_FLEXUS1_THR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_THR_OFFSET) -# define SAM_FLEXUS1_BRGR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_BRGR_OFFSET) -# define SAM_FLEXUS1_RTOR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_RTOR_OFFSET) -# define SAM_FLEXUS1_TTGR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_TTGR_OFFSET) -# define SAM_FLEXUS1_FIDI (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FIDI_OFFSET) -# define SAM_FLEXUS1_NER (SAM_FLEXUS1_VBASE+SAM_FLEXUS_NER_OFFSET) -# define SAM_FLEXUS1_IF (SAM_FLEXUS1_VBASE+SAM_FLEXUS_IF_OFFSET) -# define SAM_FLEXUS1_MAN (SAM_FLEXUS1_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS1_MAN (SAM_FLEXUS1_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS1_LINMR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_LINMR_OFFSET) -# define SAM_FLEXUS1_LINIR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_LINIR_OFFSET) -# define SAM_FLEXUS1_LINBRR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_LINBRR_OFFSET) -# define SAM_FLEXUS1_CMPR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_CMPR_OFFSET) -# define SAM_FLEXUS1_FMR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FMR_OFFSET) -# define SAM_FLEXUS1_FLR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FLR_OFFSET) -# define SAM_FLEXUS1_FIER (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FIER_OFFSET) -# define SAM_FLEXUS1_FIDR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FIDR_OFFSET) -# define SAM_FLEXUS1_FIMR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FIMR_OFFSET) -# define SAM_FLEXUS1_FESR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_FESR_OFFSET) -# define SAM_FLEXUS1_WPMR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_WPMR_OFFSET) -# define SAM_FLEXUS1_WPSR (SAM_FLEXUS1_VBASE+SAM_FLEXUS_WPSR_OFFSET) +# define SAM_FLEXUS1_CR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_CR_OFFSET) +# define SAM_FLEXUS1_MR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_MR_OFFSET) +# define SAM_FLEXUS1_IER (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_IER_OFFSET) +# define SAM_FLEXUS1_IDR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_IDR_OFFSET) +# define SAM_FLEXUS1_IMR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_IMR_OFFSET) +# define SAM_FLEXUS1_CSR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_CSR_OFFSET) +# define SAM_FLEXUS1_RHR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_RHR_OFFSET) +# define SAM_FLEXUS1_THR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_THR_OFFSET) +# define SAM_FLEXUS1_BRGR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_BRGR_OFFSET) +# define SAM_FLEXUS1_RTOR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_RTOR_OFFSET) +# define SAM_FLEXUS1_TTGR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_TTGR_OFFSET) +# define SAM_FLEXUS1_FIDI (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FIDI_OFFSET) +# define SAM_FLEXUS1_NER (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_NER_OFFSET) +# define SAM_FLEXUS1_IF (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_IF_OFFSET) +# define SAM_FLEXUS1_MAN (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS1_MAN (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS1_LINMR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_LINMR_OFFSET) +# define SAM_FLEXUS1_LINIR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_LINIR_OFFSET) +# define SAM_FLEXUS1_LINBRR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_LINBRR_OFFSET) +# define SAM_FLEXUS1_CMPR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_CMPR_OFFSET) +# define SAM_FLEXUS1_FMR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FMR_OFFSET) +# define SAM_FLEXUS1_FLR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FLR_OFFSET) +# define SAM_FLEXUS1_FIER (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FIER_OFFSET) +# define SAM_FLEXUS1_FIDR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FIDR_OFFSET) +# define SAM_FLEXUS1_FIMR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FIMR_OFFSET) +# define SAM_FLEXUS1_FESR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_FESR_OFFSET) +# define SAM_FLEXUS1_WPMR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_WPMR_OFFSET) +# define SAM_FLEXUS1_WPSR (SAM_FLEXCOM1_VBASE+SAM_FLEXUS_WPSR_OFFSET) #endif #ifdef CONFIG_SAMA5_HAVE_FLEXCOM2 -# define SAM_FLEXUS2_CR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_CR_OFFSET) -# define SAM_FLEXUS2_MR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_MR_OFFSET) -# define SAM_FLEXUS2_IER (SAM_FLEXUS2_VBASE+SAM_FLEXUS_IER_OFFSET) -# define SAM_FLEXUS2_IDR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_IDR_OFFSET) -# define SAM_FLEXUS2_IMR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_IMR_OFFSET) -# define SAM_FLEXUS2_CSR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_CSR_OFFSET) -# define SAM_FLEXUS2_RHR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_RHR_OFFSET) -# define SAM_FLEXUS2_THR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_THR_OFFSET) -# define SAM_FLEXUS2_BRGR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_BRGR_OFFSET) -# define SAM_FLEXUS2_RTOR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_RTOR_OFFSET) -# define SAM_FLEXUS2_TTGR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_TTGR_OFFSET) -# define SAM_FLEXUS2_FIDI (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FIDI_OFFSET) -# define SAM_FLEXUS2_NER (SAM_FLEXUS2_VBASE+SAM_FLEXUS_NER_OFFSET) -# define SAM_FLEXUS2_IF (SAM_FLEXUS2_VBASE+SAM_FLEXUS_IF_OFFSET) -# define SAM_FLEXUS2_MAN (SAM_FLEXUS2_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS2_MAN (SAM_FLEXUS2_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS2_LINMR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_LINMR_OFFSET) -# define SAM_FLEXUS2_LINIR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_LINIR_OFFSET) -# define SAM_FLEXUS2_LINBRR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_LINBRR_OFFSET) -# define SAM_FLEXUS2_CMPR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_CMPR_OFFSET) -# define SAM_FLEXUS2_FMR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FMR_OFFSET) -# define SAM_FLEXUS2_FLR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FLR_OFFSET) -# define SAM_FLEXUS2_FIER (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FIER_OFFSET) -# define SAM_FLEXUS2_FIDR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FIDR_OFFSET) -# define SAM_FLEXUS2_FIMR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FIMR_OFFSET) -# define SAM_FLEXUS2_FESR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_FESR_OFFSET) -# define SAM_FLEXUS2_WPMR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_WPMR_OFFSET) -# define SAM_FLEXUS2_WPSR (SAM_FLEXUS2_VBASE+SAM_FLEXUS_WPSR_OFFSET) +# define SAM_FLEXUS2_CR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_CR_OFFSET) +# define SAM_FLEXUS2_MR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_MR_OFFSET) +# define SAM_FLEXUS2_IER (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_IER_OFFSET) +# define SAM_FLEXUS2_IDR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_IDR_OFFSET) +# define SAM_FLEXUS2_IMR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_IMR_OFFSET) +# define SAM_FLEXUS2_CSR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_CSR_OFFSET) +# define SAM_FLEXUS2_RHR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_RHR_OFFSET) +# define SAM_FLEXUS2_THR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_THR_OFFSET) +# define SAM_FLEXUS2_BRGR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_BRGR_OFFSET) +# define SAM_FLEXUS2_RTOR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_RTOR_OFFSET) +# define SAM_FLEXUS2_TTGR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_TTGR_OFFSET) +# define SAM_FLEXUS2_FIDI (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FIDI_OFFSET) +# define SAM_FLEXUS2_NER (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_NER_OFFSET) +# define SAM_FLEXUS2_IF (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_IF_OFFSET) +# define SAM_FLEXUS2_MAN (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS2_MAN (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS2_LINMR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_LINMR_OFFSET) +# define SAM_FLEXUS2_LINIR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_LINIR_OFFSET) +# define SAM_FLEXUS2_LINBRR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_LINBRR_OFFSET) +# define SAM_FLEXUS2_CMPR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_CMPR_OFFSET) +# define SAM_FLEXUS2_FMR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FMR_OFFSET) +# define SAM_FLEXUS2_FLR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FLR_OFFSET) +# define SAM_FLEXUS2_FIER (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FIER_OFFSET) +# define SAM_FLEXUS2_FIDR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FIDR_OFFSET) +# define SAM_FLEXUS2_FIMR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FIMR_OFFSET) +# define SAM_FLEXUS2_FESR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_FESR_OFFSET) +# define SAM_FLEXUS2_WPMR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_WPMR_OFFSET) +# define SAM_FLEXUS2_WPSR (SAM_FLEXCOM2_VBASE+SAM_FLEXUS_WPSR_OFFSET) #endif #ifdef CONFIG_SAMA5_HAVE_FLEXCOM3 -# define SAM_FLEXUS3_CR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_CR_OFFSET) -# define SAM_FLEXUS3_MR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_MR_OFFSET) -# define SAM_FLEXUS3_IER (SAM_FLEXUS3_VBASE+SAM_FLEXUS_IER_OFFSET) -# define SAM_FLEXUS3_IDR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_IDR_OFFSET) -# define SAM_FLEXUS3_IMR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_IMR_OFFSET) -# define SAM_FLEXUS3_CSR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_CSR_OFFSET) -# define SAM_FLEXUS3_RHR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_RHR_OFFSET) -# define SAM_FLEXUS3_THR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_THR_OFFSET) -# define SAM_FLEXUS3_BRGR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_BRGR_OFFSET) -# define SAM_FLEXUS3_RTOR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_RTOR_OFFSET) -# define SAM_FLEXUS3_TTGR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_TTGR_OFFSET) -# define SAM_FLEXUS3_FIDI (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FIDI_OFFSET) -# define SAM_FLEXUS3_NER (SAM_FLEXUS3_VBASE+SAM_FLEXUS_NER_OFFSET) -# define SAM_FLEXUS3_IF (SAM_FLEXUS3_VBASE+SAM_FLEXUS_IF_OFFSET) -# define SAM_FLEXUS3_MAN (SAM_FLEXUS3_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS3_MAN (SAM_FLEXUS3_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS3_LINMR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_LINMR_OFFSET) -# define SAM_FLEXUS3_LINIR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_LINIR_OFFSET) -# define SAM_FLEXUS3_LINBRR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_LINBRR_OFFSET) -# define SAM_FLEXUS3_CMPR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_CMPR_OFFSET) -# define SAM_FLEXUS3_FMR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FMR_OFFSET) -# define SAM_FLEXUS3_FLR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FLR_OFFSET) -# define SAM_FLEXUS3_FIER (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FIER_OFFSET) -# define SAM_FLEXUS3_FIDR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FIDR_OFFSET) -# define SAM_FLEXUS3_FIMR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FIMR_OFFSET) -# define SAM_FLEXUS3_FESR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_FESR_OFFSET) -# define SAM_FLEXUS3_WPMR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_WPMR_OFFSET) -# define SAM_FLEXUS3_WPSR (SAM_FLEXUS3_VBASE+SAM_FLEXUS_WPSR_OFFSET) +# define SAM_FLEXUS3_CR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_CR_OFFSET) +# define SAM_FLEXUS3_MR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_MR_OFFSET) +# define SAM_FLEXUS3_IER (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_IER_OFFSET) +# define SAM_FLEXUS3_IDR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_IDR_OFFSET) +# define SAM_FLEXUS3_IMR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_IMR_OFFSET) +# define SAM_FLEXUS3_CSR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_CSR_OFFSET) +# define SAM_FLEXUS3_RHR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_RHR_OFFSET) +# define SAM_FLEXUS3_THR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_THR_OFFSET) +# define SAM_FLEXUS3_BRGR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_BRGR_OFFSET) +# define SAM_FLEXUS3_RTOR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_RTOR_OFFSET) +# define SAM_FLEXUS3_TTGR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_TTGR_OFFSET) +# define SAM_FLEXUS3_FIDI (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FIDI_OFFSET) +# define SAM_FLEXUS3_NER (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_NER_OFFSET) +# define SAM_FLEXUS3_IF (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_IF_OFFSET) +# define SAM_FLEXUS3_MAN (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS3_MAN (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS3_LINMR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_LINMR_OFFSET) +# define SAM_FLEXUS3_LINIR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_LINIR_OFFSET) +# define SAM_FLEXUS3_LINBRR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_LINBRR_OFFSET) +# define SAM_FLEXUS3_CMPR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_CMPR_OFFSET) +# define SAM_FLEXUS3_FMR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FMR_OFFSET) +# define SAM_FLEXUS3_FLR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FLR_OFFSET) +# define SAM_FLEXUS3_FIER (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FIER_OFFSET) +# define SAM_FLEXUS3_FIDR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FIDR_OFFSET) +# define SAM_FLEXUS3_FIMR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FIMR_OFFSET) +# define SAM_FLEXUS3_FESR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_FESR_OFFSET) +# define SAM_FLEXUS3_WPMR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_WPMR_OFFSET) +# define SAM_FLEXUS3_WPSR (SAM_FLEXCOM3_VBASE+SAM_FLEXUS_WPSR_OFFSET) #endif #ifdef CONFIG_SAMA5_HAVE_FLEXCOM4 -# define SAM_FLEXUS4_CR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_CR_OFFSET) -# define SAM_FLEXUS4_MR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_MR_OFFSET) -# define SAM_FLEXUS4_IER (SAM_FLEXUS4_VBASE+SAM_FLEXUS_IER_OFFSET) -# define SAM_FLEXUS4_IDR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_IDR_OFFSET) -# define SAM_FLEXUS4_IMR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_IMR_OFFSET) -# define SAM_FLEXUS4_CSR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_CSR_OFFSET) -# define SAM_FLEXUS4_RHR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_RHR_OFFSET) -# define SAM_FLEXUS4_THR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_THR_OFFSET) -# define SAM_FLEXUS4_BRGR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_BRGR_OFFSET) -# define SAM_FLEXUS4_RTOR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_RTOR_OFFSET) -# define SAM_FLEXUS4_TTGR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_TTGR_OFFSET) -# define SAM_FLEXUS4_FIDI (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FIDI_OFFSET) -# define SAM_FLEXUS4_NER (SAM_FLEXUS4_VBASE+SAM_FLEXUS_NER_OFFSET) -# define SAM_FLEXUS4_IF (SAM_FLEXUS4_VBASE+SAM_FLEXUS_IF_OFFSET) -# define SAM_FLEXUS4_MAN (SAM_FLEXUS4_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS4_MAN (SAM_FLEXUS4_VBASE+SAM_FLEXUS_MAN_OFFSET) -# define SAM_FLEXUS4_LINMR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_LINMR_OFFSET) -# define SAM_FLEXUS4_LINIR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_LINIR_OFFSET) -# define SAM_FLEXUS4_LINBRR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_LINBRR_OFFSET) -# define SAM_FLEXUS4_CMPR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_CMPR_OFFSET) -# define SAM_FLEXUS4_FMR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FMR_OFFSET) -# define SAM_FLEXUS4_FLR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FLR_OFFSET) -# define SAM_FLEXUS4_FIER (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FIER_OFFSET) -# define SAM_FLEXUS4_FIDR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FIDR_OFFSET) -# define SAM_FLEXUS4_FIMR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FIMR_OFFSET) -# define SAM_FLEXUS4_FESR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_FESR_OFFSET) -# define SAM_FLEXUS4_WPMR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_WPMR_OFFSET) -# define SAM_FLEXUS4_WPSR (SAM_FLEXUS4_VBASE+SAM_FLEXUS_WPSR_OFFSET) +# define SAM_FLEXUS4_CR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_CR_OFFSET) +# define SAM_FLEXUS4_MR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_MR_OFFSET) +# define SAM_FLEXUS4_IER (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_IER_OFFSET) +# define SAM_FLEXUS4_IDR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_IDR_OFFSET) +# define SAM_FLEXUS4_IMR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_IMR_OFFSET) +# define SAM_FLEXUS4_CSR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_CSR_OFFSET) +# define SAM_FLEXUS4_RHR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_RHR_OFFSET) +# define SAM_FLEXUS4_THR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_THR_OFFSET) +# define SAM_FLEXUS4_BRGR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_BRGR_OFFSET) +# define SAM_FLEXUS4_RTOR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_RTOR_OFFSET) +# define SAM_FLEXUS4_TTGR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_TTGR_OFFSET) +# define SAM_FLEXUS4_FIDI (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FIDI_OFFSET) +# define SAM_FLEXUS4_NER (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_NER_OFFSET) +# define SAM_FLEXUS4_IF (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_IF_OFFSET) +# define SAM_FLEXUS4_MAN (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS4_MAN (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_MAN_OFFSET) +# define SAM_FLEXUS4_LINMR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_LINMR_OFFSET) +# define SAM_FLEXUS4_LINIR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_LINIR_OFFSET) +# define SAM_FLEXUS4_LINBRR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_LINBRR_OFFSET) +# define SAM_FLEXUS4_CMPR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_CMPR_OFFSET) +# define SAM_FLEXUS4_FMR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FMR_OFFSET) +# define SAM_FLEXUS4_FLR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FLR_OFFSET) +# define SAM_FLEXUS4_FIER (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FIER_OFFSET) +# define SAM_FLEXUS4_FIDR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FIDR_OFFSET) +# define SAM_FLEXUS4_FIMR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FIMR_OFFSET) +# define SAM_FLEXUS4_FESR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_FESR_OFFSET) +# define SAM_FLEXUS4_WPMR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_WPMR_OFFSET) +# define SAM_FLEXUS4_WPSR (SAM_FLEXCOM4_VBASE+SAM_FLEXUS_WPSR_OFFSET) #endif /* USART register bit definitions ****************************************************************/ diff --git a/arch/arm/src/sama5/chip/sam_pinmap.h b/arch/arm/src/sama5/chip/sam_pinmap.h index a6613e39ac..bc04679c19 100644 --- a/arch/arm/src/sama5/chip/sam_pinmap.h +++ b/arch/arm/src/sama5/chip/sam_pinmap.h @@ -44,7 +44,7 @@ #include #if defined(ATSAMA5D2) -# include "chip/sama5d3x_pinmap.h" +# include "chip/sama5d2x_pinmap.h" #elif defined(ATSAMA5D3) # include "chip/sama5d3x_pinmap.h" #elif defined(ATSAMA5D4) diff --git a/arch/arm/src/sama5/sam_flexcom_serial.c b/arch/arm/src/sama5/sam_flexcom_serial.c index 74f3e40944..899d3473d7 100644 --- a/arch/arm/src/sama5/sam_flexcom_serial.c +++ b/arch/arm/src/sama5/sam_flexcom_serial.c @@ -315,7 +315,7 @@ static char g_flexus4txbuffer[CONFIG_USART4_TXBUFSIZE]; static struct flexus_dev_s g_flexus0priv = { .handler = flexus0_interrupt, - .usartbase = SAM_FLEXUS0_VBASE, + .usartbase = SAM_FLEXCOM0_VBASE, .baud = CONFIG_USART0_BAUD, .irq = SAM_IRQ_FLEXCOM0, .parity = CONFIG_USART0_PARITY, @@ -349,7 +349,7 @@ static uart_dev_t g_flexus0port = static struct flexus_dev_s g_flexus1priv = { .handler = flexus1_interrupt, - .usartbase = SAM_FLEXUS1_VBASE, + .usartbase = SAM_FLEXCOM1_VBASE, .baud = CONFIG_USART1_BAUD, .irq = SAM_IRQ_FLEXCOM1, .parity = CONFIG_USART1_PARITY, @@ -383,7 +383,7 @@ static uart_dev_t g_flexus1port = static struct flexus_dev_s g_flexus2priv = { .handler = flexus2_interrupt, - .usartbase = SAM_FLEXUS2_VBASE, + .usartbase = SAM_FLEXCOM2_VBASE, .baud = CONFIG_USART2_BAUD, .irq = SAM_IRQ_FLEXCOM2, .parity = CONFIG_USART2_PARITY, @@ -417,7 +417,7 @@ static uart_dev_t g_flexus2port = static struct flexus_dev_s g_flexus3priv = { .handler = flexus3_interrupt, - .usartbase = SAM_FLEXUS3_VBASE, + .usartbase = SAM_FLEXCOM3_VBASE, .baud = CONFIG_USART3_BAUD, .irq = SAM_IRQ_FLEXCOM3, .parity = CONFIG_USART3_PARITY, @@ -451,7 +451,7 @@ static uart_dev_t g_flexus3port = static struct flexus_dev_s g_flexus4priv = { .handler = flexus4_interrupt, - .usartbase = SAM_FLEXUS4_VBASE, + .usartbase = SAM_FLEXCOM4_VBASE, .baud = CONFIG_USART4_BAUD, .irq = SAM_IRQ_FLEXCOM4, .parity = CONFIG_USART4_PARITY, @@ -1202,21 +1202,51 @@ void flexus_earlyserialinit(void) * sam_lowsetup */ - /* Disable all USARTS */ + /* Disable the USART */ #ifdef TTYFC0_DEV + /* Select USART mode for the Flexcom */ + + flexus_serialout(TTYFC0_DEV.priv, SAM_FLEX_MR_OFFSET, FLEX_MR_OPMODE_USART); + + /* Disable the USART */ + flexus_disableallints(TTYFC0_DEV.priv, NULL); #endif #ifdef TTYFC1_DEV + /* Select USART mode for the Flexcom */ + + flexus_serialout(TTYFC1_DEV.priv, SAM_FLEX_MR_OFFSET, FLEX_MR_OPMODE_USART); + + /* Disable the USART */ + flexus_disableallints(TTYFC1_DEV.priv, NULL); #endif #ifdef TTYFC2_DEV + /* Select USART mode for the Flexcom */ + + flexus_serialout(TTYFC2_DEV.priv, SAM_FLEX_MR_OFFSET, FLEX_MR_OPMODE_USART); + + /* Disable the USART */ + flexus_disableallints(TTYFC2_DEV.priv, NULL); #endif #ifdef TTYFC3_DEV + /* Select USART mode for the Flexcom */ + + flexus_serialout(TTYFC3_DEV.priv, SAM_FLEX_MR_OFFSET, FLEX_MR_OPMODE_USART); + + /* Disable the USART */ + flexus_disableallints(TTYFC3_DEV.priv, NULL); #endif #ifdef TTYFC4_DEV + /* Select USART mode for the Flexcom */ + + flexus_serialout(TTYFC4_DEV.priv, SAM_FLEX_MR_OFFSET, FLEX_MR_OPMODE_USART); + + /* Disable the USART */ + flexus_disableallints(TTYFC4_DEV.priv, NULL); #endif diff --git a/arch/arm/src/sama5/sam_lowputc.c b/arch/arm/src/sama5/sam_lowputc.c index 8d6e3644d8..98505d263e 100644 --- a/arch/arm/src/sama5/sam_lowputc.c +++ b/arch/arm/src/sama5/sam_lowputc.c @@ -42,7 +42,6 @@ #include #include -#include #include "up_internal.h" #include "up_arch.h" @@ -58,6 +57,8 @@ #include "chip/sam_dbgu.h" #include "chip/sam_pinmap.h" +#include + /************************************************************************** * Pre-processor Definitions **************************************************************************/ @@ -65,11 +66,11 @@ /* The UART/USART modules are driven by the peripheral clock (MCK or MCK2). */ #ifdef SAMA5_HAVE_FLEXCOM_CONSOLE -# define SAM_USART_CLOCK BOARD_FLEXCOM_FREQUENCY /* Frequency of the FLEXCOM clock */ -# define SAM_MR_USCLKS FLEXUS_MR_USCLKS_MCK /* Source = Main clock */ +# define SAM_USART_CLOCK BOARD_FLEXCOM_FREQUENCY /* Frequency of the FLEXCOM clock */ +# define SAM_MR_USCLKS FLEXUS_MR_USCLKS_MCK /* Source = Main clock */ #else -# define SAM_USART_CLOCK BOARD_USART_FREQUENCY /* Frequency of the USART clock */ -# define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */ +# define SAM_USART_CLOCK BOARD_USART_FREQUENCY /* Frequency of the USART clock */ +# define SAM_MR_USCLKS UART_MR_USCLKS_MCK /* Source = Main clock */ #endif /* Select USART parameters for the selected console */ @@ -119,9 +120,9 @@ # define SAM_CONSOLE_2STOP CONFIG_UART4_2STOP #elif defined(CONFIG_USART0_SERIAL_CONSOLE) # ifdef CONFIG_SAMA5_FLEXCOM0_USART -# define SAM_CONSOLE_VBASE SAM_FLEXUS0_VBASE +# define SAM_CONSOLE_VBASE SAM_FLEXCOM0_VBASE # else -# define SAM_CONSOLE_VBASE SAM_USART0_VBASE +# define SAM_CONSOLE_VBASE SAM_USART0_VBASE # endif # define SAM_CONSOLE_BAUD CONFIG_USART0_BAUD # define SAM_CONSOLE_BITS CONFIG_USART0_BITS @@ -129,9 +130,9 @@ # define SAM_CONSOLE_2STOP CONFIG_USART0_2STOP #elif defined(CONFIG_USART1_SERIAL_CONSOLE) # ifdef CONFIG_SAMA5_FLEXCOM1_USART -# define SAM_CONSOLE_VBASE SAM_FLEXUS1_VBASE +# define SAM_CONSOLE_VBASE SAM_FLEXCOM1_VBASE # else -# define SAM_CONSOLE_VBASE SAM_USART1_VBASE +# define SAM_CONSOLE_VBASE SAM_USART1_VBASE # endif # define SAM_CONSOLE_BAUD CONFIG_USART1_BAUD # define SAM_CONSOLE_BITS CONFIG_USART1_BITS @@ -139,9 +140,9 @@ # define SAM_CONSOLE_2STOP CONFIG_USART1_2STOP #elif defined(CONFIG_USART2_SERIAL_CONSOLE) # ifdef CONFIG_SAMA5_FLEXCOM2_USART -# define SAM_CONSOLE_VBASE SAM_FLEXUS2_VBASE +# define SAM_CONSOLE_VBASE SAM_FLEXCOM2_VBASE # else -# define SAM_CONSOLE_VBASE SAM_USART2_VBASE +# define SAM_CONSOLE_VBASE SAM_USART2_VBASE # endif # define SAM_CONSOLE_BAUD CONFIG_USART2_BAUD # define SAM_CONSOLE_BITS CONFIG_USART2_BITS @@ -149,9 +150,9 @@ # define SAM_CONSOLE_2STOP CONFIG_USART2_2STOP #elif defined(CONFIG_USART3_SERIAL_CONSOLE) # ifdef CONFIG_SAMA5_FLEXCOM3_USART -# define SAM_CONSOLE_VBASE SAM_FLEXUS3_VBASE +# define SAM_CONSOLE_VBASE SAM_FLEXCOM3_VBASE # else -# define SAM_CONSOLE_VBASE SAM_USART3_VBASE +# define SAM_CONSOLE_VBASE SAM_USART3_VBASE # endif # define SAM_CONSOLE_BAUD CONFIG_USART3_BAUD # define SAM_CONSOLE_BITS CONFIG_USART3_BITS @@ -159,9 +160,9 @@ # define SAM_CONSOLE_2STOP CONFIG_USART3_2STOP #elif defined(CONFIG_USART4_SERIAL_CONSOLE) # ifdef CONFIG_SAMA5_FLEXCOM4_USART -# define SAM_CONSOLE_VBASE SAM_FLEXUS4_VBASE +# define SAM_CONSOLE_VBASE SAM_FLEXCOM4_VBASE # else -# define SAM_CONSOLE_VBASE SAM_USART4_VBASE +# define SAM_CONSOLE_VBASE SAM_USART4_VBASE # endif # define SAM_CONSOLE_BAUD CONFIG_USART4_BAUD # define SAM_CONSOLE_BITS CONFIG_USART4_BITS @@ -499,7 +500,7 @@ void sam_lowsetup(void) * FLEXCOM_IO4 = RTS */ -#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_USART0) +#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_FLEXCOM0_USART) (void)sam_configpio(PIO_FLEXCOM0_IO0); (void)sam_configpio(PIO_FLEXCOM0_IO1); #ifdef CONFIG_USART0_OFLOWCONTROL @@ -510,7 +511,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_USART1) +#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_FLEXCOM1_USART) (void)sam_configpio(PIO_FLEXCOM1_IO0); (void)sam_configpio(PIO_FLEXCOM1_IO1); #ifdef CONFIG_USART1_OFLOWCONTROL @@ -521,7 +522,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_USART2) +#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_FLEXCOM2_USART) (void)sam_configpio(PIO_FLEXCOM2_IO0); (void)sam_configpio(PIO_FLEXCOM2_IO1); #ifdef CONFIG_USART2_OFLOWCONTROL @@ -532,7 +533,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_USART3) +#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_FLEXCOM3_USART) (void)sam_configpio(PIO_FLEXCOM3_IO0); (void)sam_configpio(PIO_FLEXCOM3_IO1); #ifdef CONFIG_USART3_OFLOWCONTROL @@ -543,9 +544,9 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_USART4) - (void)sam_configpio(PIO_FLEXCOM4_IO0); +#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_FLEXCOM4_USART) (void)sam_configpio(PIO_FLEXCOM4_IO0); + (void)sam_configpio(PIO_FLEXCOM4_IO1); #ifdef CONFIG_USART4_OFLOWCONTROL (void)sam_configpio(PIO_FLEXCOM4_IO3); #endif @@ -584,6 +585,10 @@ void sam_lowsetup(void) SAM_CONSOLE_VBASE + SAM_UART_CR_OFFSET); #elif defined(SAMA5_HAVE_FLEXCOM_CONSOLE) && !defined(SUPPRESS_CONSOLE_CONFIG) + /* Select USART mode for the Flexcom */ + + putreg32(FLEX_MR_OPMODE_USART, SAM_CONSOLE_VBASE + SAM_FLEX_MR_OFFSET); + /* Reset and disable receiver and transmitter */ putreg32((FLEXUS_CR_RSTRX | FLEXUS_CR_RSTTX | FLEXUS_CR_RXDIS | FLEXUS_CR_TXDIS), diff --git a/arch/arm/src/sama5/sam_pck.c b/arch/arm/src/sama5/sam_pck.c index 0457318294..f089c4381d 100644 --- a/arch/arm/src/sama5/sam_pck.c +++ b/arch/arm/src/sama5/sam_pck.c @@ -226,23 +226,29 @@ uint32_t sam_pck_configure(enum pckid_e pckid, enum pckid_clksrc_e clksrc, switch (pckid) { +#ifdef PIO_PMC_PCK0 case PCK0: putreg32(PMC_PCK0, SAM_PMC_SCDR); (void)sam_configpio(PIO_PMC_PCK0); putreg32(regval, SAM_PMC_PCK0); break; +#endif +#ifdef PIO_PMC_PCK1 case PCK1: putreg32(PMC_PCK1, SAM_PMC_SCDR); (void)sam_configpio(PIO_PMC_PCK1); putreg32(regval, SAM_PMC_PCK1); break; +#endif +#ifdef PIO_PMC_PCK2 case PCK2: putreg32(PMC_PCK2, SAM_PMC_SCDR); (void)sam_configpio(PIO_PMC_PCK2); putreg32(regval, SAM_PMC_PCK2); break; +#endif default: return -EINVAL; @@ -287,4 +293,3 @@ void sam_pck_enable(enum pckid_e pckid, bool enable) putreg32(regval, regaddr); } -