arm/armv7: update percpu task only for co-processor
fix smp crash on sabre-6quad/smp, regression from:
|commit 1e49cb4828
|Author: hujun5 <hujun5@xiaomi.com>
|Date: Thu Dec 5 16:58:17 2024 +0800
|
| armv7-a/armv7-r/armv8-r: percpu reg store this_task
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| This is continue work of https://github.com/apache/nuttx/pull/13726
|
| We can utilize percpu storage to hold information about the
| current running task. If we intend to implement this feature, we would
| need to define two macros that help us manage this percpu information
| effectively.
|
| up_this_task: This macro is designed to read the contents of the percpu
| register to retrieve information about the current
| running task.This allows us to quickly access
| task-specific data without having to disable interrupts,
| access global variables and obtain the current cpu index.
|
| up_update_task: This macro is responsible for updating the contents of
| the percpu register.It is typically called during
| initialization or when a context switch occurs to ensure
| that the percpu register reflects the information of the
| newly running task.
|
| Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: chao an <anchao.archer@bytedance.com>
This commit is contained in:
parent
196ce5918c
commit
20f45f907f
2 changed files with 16 additions and 16 deletions
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@ -58,14 +58,6 @@ void arm_enable_smp(int cpu)
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{
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uint32_t regval;
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/* We need to confirm that current_task has been initialized. */
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while (!current_task(this_cpu()));
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/* Init idle task to percpu reg */
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up_update_task(current_task(cpu));
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/* Handle actions unique to CPU0 which comes up first */
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if (cpu == 0)
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@ -112,6 +104,14 @@ void arm_enable_smp(int cpu)
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/* Wait for the SCU to be enabled by the primary processor -- should
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* not be necessary.
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*/
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/* We need to confirm that current_task has been initialized. */
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while (!current_task(this_cpu()));
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/* Init idle task to percpu reg */
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up_update_task(current_task(cpu));
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}
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/* Enable the data cache, set the SMP mode with ACTLR.SMP=1.
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@ -58,14 +58,6 @@ void arm_enable_smp(int cpu)
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{
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uint32_t regval;
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/* We need to confirm that current_task has been initialized. */
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while (!current_task(this_cpu()));
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/* Init idle task to percpu reg */
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up_update_task(current_task(cpu));
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/* Handle actions unique to CPU0 which comes up first */
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if (cpu == 0)
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@ -114,6 +106,14 @@ void arm_enable_smp(int cpu)
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/* Wait for the SCU to be enabled by the primary processor -- should
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* not be necessary.
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*/
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/* We need to confirm that current_task has been initialized. */
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while (!current_task(this_cpu()));
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/* Init idle task to percpu reg */
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up_update_task(current_task(cpu));
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}
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/* Enable the data cache, set the SMP mode with ACTLR.SMP=1.
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