From 23d35336adbcdbbf1731ceb7dce608839d732ec3 Mon Sep 17 00:00:00 2001 From: zhuyanlin Date: Mon, 23 May 2022 17:56:18 +0800 Subject: [PATCH] xtensa:esp32: enable cp processor of app core Signed-off-by: zhuyanlin --- arch/xtensa/src/esp32/esp32_cpustart.c | 4 ++++ arch/xtensa/src/esp32s3/esp32s3_cpustart.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c index 86fdb5334e..5ffd624833 100644 --- a/arch/xtensa/src/esp32/esp32_cpustart.c +++ b/arch/xtensa/src/esp32/esp32_cpustart.c @@ -196,6 +196,10 @@ void IRAM_ATTR xtensa_appcpu_start(void) up_irq_enable(); #endif +#if XCHAL_CP_NUM > 0 + xtensa_set_cpenable(CONFIG_XTENSA_CP_INITSET); +#endif + /* Then switch contexts. This instantiates the exception context of the * tcb at the head of the assigned task list. In this case, this should * be the CPUs NULL task. diff --git a/arch/xtensa/src/esp32s3/esp32s3_cpustart.c b/arch/xtensa/src/esp32s3/esp32s3_cpustart.c index ad0857f506..d4e5a45e8d 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_cpustart.c +++ b/arch/xtensa/src/esp32s3/esp32s3_cpustart.c @@ -164,6 +164,10 @@ void xtensa_appcpu_start(void) up_irq_enable(); #endif +#if XCHAL_CP_NUM > 0 + xtensa_set_cpenable(CONFIG_XTENSA_CP_INITSET); +#endif + /* Then switch contexts. This instantiates the exception context of the * tcb at the head of the assigned task list. In this case, this should * be the CPUs NULL task.