board/tricore: rename tc397 chip board name
"tc397" is a chip name which is not appropriate to act as a board name. the board supported here is actually "a2g-tc397-5v-tft". The correct definition is : tricore is arch name, tc3xx is arch family name, tc397 is chip name and the borad name is a2g-tc397-5v-tft
This commit is contained in:
wangchengdong
Xiang Xiao
parent
9b8c8bdd7b
commit
28206007e0
29 changed files with 360 additions and 188 deletions
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@ -1,14 +1,14 @@
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=================
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KIT_A2G_TC397_TFT
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A2G_TC397_5V_TFT
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=================
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This page file describes the contents of the build configurations available
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for the NuttX TriCore port.
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Infineon’s AURIX™- TC3xx `KIT_A2G_TC397_TFT <https://www.infineon.com/cms/en/product/evaluation-boards/kit_a2g_tc397_5v_tft>`__ Board
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Infineon’s AURIX™- TC3xx `A2G_TC397_5V_TFT <https://www.infineon.com/cms/en/product/evaluation-boards/kit_a2g_tc397_5v_tft>`__ Board
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=====================================================================================================================================
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This port should work on KIT_A2G_TC397_TFT with a proper CPU.
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This port should work on A2G_TC397_5V_TFT with a proper CPU.
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The mandatory CPU features are:
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* System Timer (STM)
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@ -26,17 +26,17 @@ Configurations
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Common Configuration Notes
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--------------------------
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1. Each Tricore TC397 configuration is maintained in a sub-directory
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1. Each A2G_TC397_5V_TFT configuration is maintained in a sub-directory
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and can be selected as follow::
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tools/configure.sh tc397:<subdir>
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tools/configure.sh a2g-tc397-5v-tft:<subdir>
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Where ``<subdir>`` is one of the configuration sub-directories described in
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the following paragraph.
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NuttX Shell::
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tools/configure.sh tc397:nsh
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tools/configure.sh a2g-tc397-5v-tft:nsh
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2. These configurations use the mconf-based configuration tool. To
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change a configurations using that tool, you should:
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@ -34,7 +34,7 @@ config ARCH_FAMILY
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config ARCH_CHIP
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string
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default "tc3xx" if ARCH_CHIP_TC397
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default "tc397" if ARCH_CHIP_TC397
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config ARCH_CHIP_TC397
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bool "AURIX Family TC397"
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@ -47,4 +47,7 @@ config ARCH_CHIP_TC397
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if ARCH_TC3XX
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source "arch/tricore/src/tc3xx/Kconfig"
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endif
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if ARCH_TC397
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source "arch/tricore/src/tc397/Kconfig"
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endif
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endif # ARCH_TRICORE
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@ -44,6 +44,10 @@
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#include <arch/chip/irq.h>
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#if defined(CONFIG_ARCH_TC3XX)
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# include <arch/tc3xx/irq.h>
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#endif
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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48
arch/tricore/include/tc397/chip.h
Normal file
48
arch/tricore/include/tc397/chip.h
Normal file
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@ -0,0 +1,48 @@
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/****************************************************************************
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* arch/tricore/include/tc397/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_TRICORE_INCLUDE_TC397_CHIP_H
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#define __ARCH_TRICORE_INCLUDE_TC397_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#endif /* __ARCH_TRICORE_INCLUDE_TC397_CHIP_H */
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69
arch/tricore/include/tc397/irq.h
Normal file
69
arch/tricore/include/tc397/irq.h
Normal file
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@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/tricore/include/tc397/irq.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_TRICORE_INCLUDE_TC397_IRQ_H
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#define __ARCH_TRICORE_INCLUDE_TC397_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_TRICORE_INCLUDE_TC397_IRQ_H */
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@ -19,7 +19,7 @@
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# the License.
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#
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# ##############################################################################
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add_subdirectory(${ARCH_SUBDIR})
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add_subdirectory(${NUTTX_CHIP_ABS_DIR} EXCLUDE_FROM_ALL exclude_chip)
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add_subdirectory(common)
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@ -25,6 +25,7 @@ include chip/Make.defs
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ifeq ($(CONFIG_ARCH_TC3XX),y)
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ARCH_SUBDIR = tc3xx
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include $(ARCH_SUBDIR)/Make.defs
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endif
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ARCH_SRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
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3
arch/tricore/src/tc397/.gitignore
vendored
Normal file
3
arch/tricore/src/tc397/.gitignore
vendored
Normal file
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@ -0,0 +1,3 @@
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/*_unpack
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/tc397
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/*tar.gz
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37
arch/tricore/src/tc397/CMakeLists.txt
Normal file
37
arch/tricore/src/tc397/CMakeLists.txt
Normal file
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@ -0,0 +1,37 @@
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# ##############################################################################
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# arch/tricore/src/tc3xx/CMakeLists.txt
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more contributor
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# license agreements. See the NOTICE file distributed with this work for
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# additional information regarding copyright ownership. The ASF licenses this
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# file to you under the Apache License, Version 2.0 (the "License"); you may not
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# use this file except in compliance with the License. You may obtain a copy of
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# the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations under
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# the License.
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#
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# ##############################################################################
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if(CONFIG_ARCH_CHIP_TC397)
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if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/tc397)
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FetchContent_Declare(
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tc397
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URL https://github.com/wangchdo/tc397_sdk/archive/refs/heads/master.tar.gz
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SOURCE_DIR ${CMAKE_CURRENT_LIST_DIR}/tc397 BINARY_DIR
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${CMAKE_BINARY_DIR}/arch/${CONFIG_ARCH}/src/${CONFIG_ARCH_CHIP}/tc397)
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FetchContent_GetProperties(tc397)
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if(NOT tc397_POPULATED)
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FetchContent_Populate(tc397)
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endif()
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endif()
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add_subdirectory(tc397)
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endif()
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@ -3,5 +3,3 @@
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_BOARD_TC397
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endif
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49
arch/tricore/src/tc397/Make.defs
Normal file
49
arch/tricore/src/tc397/Make.defs
Normal file
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@ -0,0 +1,49 @@
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############################################################################
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# arch/tricore/src/tc397/Make.defs
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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ifeq ($(CONFIG_ARCH_CHIP_TC397),y)
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-include tc397/tc397/Make.defs
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endif
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TC397_UNPACK = tc397
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TC397_COMMIT = master
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TC397_URL = https://github.com/wangchdo/tc397_sdk/archive/refs/heads
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TC397_TARBALL = tc397/$(TC397_UNPACK).tar.gz
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TC397_DIR = tc397_sdk-master
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$(TC397_TARBALL):
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$(call DOWNLOAD,$(TC397_URL),$(TC397_COMMIT).tar.gz,$(TC397_TARBALL))
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tc397/.tc397_unpack: $(TC397_TARBALL)
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$(Q) echo "Unpacking: TC397"
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$(Q) tar xzf $(TC397_TARBALL) -C tc397
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$(Q) mv tc397/$(TC397_DIR) tc397/$(TC397_UNPACK)
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$(Q) touch tc397/.tc397_unpack
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ifeq ($(wildcard tc397/$(TC397_UNPACK)/.git),)
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context:: tc397/.tc397_unpack
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distclean::
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$(call DELFILE, tc397/.tc397_unpack)
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$(call DELFILE, $(TC397_TARBALL))
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$(call DELDIR, tc397/$(TC397_UNPACK))
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endif
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/tricore/src/tc3xx/chip.h
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* arch/tricore/src/tc397/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -20,11 +20,11 @@
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*
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****************************************************************************/
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#ifndef __ARCH_TRICORE_SRC_TC3XX_CHIP_H
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#define __ARCH_TRICORE_SRC_TC3XX_CHIP_H
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#ifndef __ARCH_TRICORE_SRC_TC397_CHIP_H
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#define __ARCH_TRICORE_SRC_TC397_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#endif /* __ARCH_TRICORE_SRC_TC3XX_CHIP_H */
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#endif /* __ARCH_TRICORE_SRC_TC397_CHIP_H */
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@ -24,28 +24,10 @@ set(SRCS tc3xx_timerisr.c tc3xx_serial.c)
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target_sources(arch PRIVATE ${SRCS})
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if(CONFIG_ARCH_CHIP_TC397)
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if(NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/tc397)
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FetchContent_Declare(
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tc397
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URL https://github.com/anchao/tc397_sdk/archive/refs/heads/master.tar.gz
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SOURCE_DIR ${CMAKE_CURRENT_LIST_DIR}/tc397 BINARY_DIR
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${CMAKE_BINARY_DIR}/arch/${CONFIG_ARCH}/src/${CONFIG_ARCH_CHIP}/tc397)
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FetchContent_GetProperties(tc397)
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if(NOT tc397_POPULATED)
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FetchContent_Populate(tc397)
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endif()
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endif()
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add_subdirectory(tc397)
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if(CONFIG_TRICORE_TOOLCHAIN_TASKING)
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nuttx_add_kernel_library(c_fpu)
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target_sources(c_fpu PRIVATE tc3xx_libc.c)
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target_link_options(
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nuttx PRIVATE
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--library-directory=${CMAKE_BINARY_DIR}/arch/tricore/src/exclude_chip)
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endif()
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if(CONFIG_TRICORE_TOOLCHAIN_TASKING)
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nuttx_add_kernel_library(c_fpu)
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target_sources(c_fpu PRIVATE tc3xx_libc.c)
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target_link_options(
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nuttx PRIVATE
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--library-directory=${CMAKE_BINARY_DIR}/arch/tricore/src/exclude_chip)
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endif()
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@ -20,10 +20,6 @@
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#
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############################################################################
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ifeq ($(CONFIG_ARCH_CHIP_TC397),y)
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-include tc3xx/tc397/Make.defs
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endif
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CHIP_CSRCS += tc3xx_timerisr.c
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CHIP_CSRCS += tc3xx_serial.c
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@ -52,28 +48,3 @@ EXTRA_LIBS += libos$(LIBEXT)
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endif
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LIBPATHS += $(CURDIR)
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TC397_UNPACK = tc397
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TC397_COMMIT = master
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TC397_URL = https://github.com/anchao/tc397_sdk/archive/refs/heads
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TC397_TARBALL = tc3xx/$(TC397_UNPACK).tar.gz
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TC397_DIR = tc397_sdk-master
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$(TC397_TARBALL):
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$(call DOWNLOAD,$(TC397_URL),$(TC397_COMMIT).tar.gz,$(TC397_TARBALL))
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tc3xx/.tc397_unpack: $(TC397_TARBALL)
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$(Q) echo "Unpacking: TC397"
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$(Q) tar xzf $(TC397_TARBALL) -C tc3xx
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$(Q) mv tc3xx/$(TC397_DIR) tc3xx/$(TC397_UNPACK)
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$(Q) touch tc3xx/.tc397_unpack
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ifeq ($(wildcard tc3xx/$(TC397_UNPACK)/.git),)
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context:: .tc397_unpack
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distclean::
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$(call DELFILE, tc3xx/.tc397_unpack)
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$(call DELFILE, $(TC397_TARBALL))
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$(call DELDIR, tc3xx/$(TC397_UNPACK))
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endif
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@ -2331,7 +2331,7 @@ config ARCH_BOARD_SABRE_6QUAD
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This options selects support for NuttX on the NXP/Freescale Sabre
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board featuring the iMX 6Quad CPU.
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config ARCH_BOARD_TC397
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config ARCH_BOARD_A2G_TC397_5V_TFT
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bool "Infineon's AURIX TC397 board: KIT_A2G_TC397_5V_TFT"
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depends on ARCH_CHIP_TC397
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---help---
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@ -3724,7 +3724,7 @@ config ARCH_BOARD
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default "milkv_duos" if ARCH_BOARD_SG2000_MILKV_DUOS
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default "starpro64" if ARCH_BOARD_EIC7700X_STARPRO64
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default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
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default "tc397" if ARCH_BOARD_TC397
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default "a2g-tc397-5v-tft" if ARCH_BOARD_A2G_TC397_5V_TFT
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default "qemu-armv7a" if ARCH_BOARD_QEMU_ARMV7A
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default "qemu-armv7r" if ARCH_BOARD_QEMU_ARMV7R
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default "qemu-armv8a" if ARCH_BOARD_QEMU_ARMV8A
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@ -3939,8 +3939,8 @@ endif
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if ARCH_BOARD_SABRE_6QUAD
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source "boards/arm/imx6/sabre-6quad/Kconfig"
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endif
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if ARCH_BOARD_TC397
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source "boards/tricore/tc3xx/tc397/Kconfig"
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if ARCH_BOARD_A2G_TC397_5V_TFT
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source "boards/tricore/tc397/a2g-tc397-5v-tft/Kconfig"
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endif
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if ARCH_BOARD_MPS2_AN500
|
||||
source "boards/arm/mps/mps2-an500/Kconfig"
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
# ##############################################################################
|
||||
# boards/tricore/tc3xx/tc397/CMakeLists.txt
|
||||
# boards/tricore/tc397/a2g-tc397-5v-tft/CMakeLists.txt
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
7
boards/tricore/tc397/a2g-tc397-5v-tft/Kconfig
Normal file
7
boards/tricore/tc397/a2g-tc397-5v-tft/Kconfig
Normal file
|
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# For a description of the syntax of this configuration file,
|
||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||
#
|
||||
|
||||
if ARCH_BOARD_A2G_TC397_5V_TFT
|
||||
endif
|
||||
|
|
@ -7,9 +7,9 @@
|
|||
#
|
||||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||
CONFIG_ARCH="tricore"
|
||||
CONFIG_ARCH_BOARD="tc397"
|
||||
CONFIG_ARCH_BOARD_TC397=y
|
||||
CONFIG_ARCH_CHIP="tc3xx"
|
||||
CONFIG_ARCH_BOARD="a2g-tc397-5v-tft"
|
||||
CONFIG_ARCH_BOARD_A2G_TC397_5V_TFT=y
|
||||
CONFIG_ARCH_CHIP="tc397"
|
||||
CONFIG_ARCH_CHIP_TC397=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/include/board.h
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/include/board.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -20,8 +20,8 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_H
|
||||
#define __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_H
|
||||
#ifndef __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_H
|
||||
#define __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
|
|
@ -37,4 +37,4 @@
|
|||
* Public Functions Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#endif /* __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_H */
|
||||
#endif /* __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_H */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/include/board_memorymap.h
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/include/board_memorymap.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -20,8 +20,8 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_MEMORYMAP_H
|
||||
#define __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_MEMORYMAP_H
|
||||
#ifndef __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_MEMORYMAP_H
|
||||
#define __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_MEMORYMAP_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
|
|
@ -58,4 +58,4 @@ extern "C"
|
|||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_TRICORE_TC3XX_TC397_INCLUDE_BOARD_MEMORYMAP_H */
|
||||
#endif /* __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_INCLUDE_BOARD_MEMORYMAP_H */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/scripts/Lcf_Gnuc_Tricore_Tc.lsl
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/scripts/Lcf_Gnuc_Tricore_Tc.lsl
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -146,72 +146,72 @@ MEMORY
|
|||
dsram5_local (w!xp): org = 0xd0000000, len = 96K
|
||||
dsram5 (w!xp): org = 0x10000000, len = 96K
|
||||
psram5 (w!xp): org = 0x10100000, len = 64K
|
||||
|
||||
|
||||
dsram4_local (w!xp): org = 0xd0000000, len = 96K
|
||||
dsram4 (w!xp): org = 0x30000000, len = 96K
|
||||
psram4 (w!xp): org = 0x30100000, len = 64K
|
||||
|
||||
|
||||
dsram3_local (w!xp): org = 0xd0000000, len = 96K
|
||||
dsram3 (w!xp): org = 0x40000000, len = 96K
|
||||
psram3 (w!xp): org = 0x40100000, len = 64K
|
||||
|
||||
|
||||
dsram2_local (w!xp): org = 0xd0000000, len = 96K
|
||||
dsram2 (w!xp): org = 0x50000000, len = 96K
|
||||
psram2 (w!xp): org = 0x50100000, len = 64K
|
||||
|
||||
|
||||
dsram1_local (w!xp): org = 0xd0000000, len = 240K
|
||||
dsram1 (w!xp): org = 0x60000000, len = 240K
|
||||
psram1 (w!xp): org = 0x60100000, len = 64K
|
||||
|
||||
|
||||
dsram0_local (w!xp): org = 0xd0000000, len = 240K
|
||||
dsram0 (w!xp): org = 0x70000000, len = 240K
|
||||
psram0 (w!xp): org = 0x70100000, len = 64K
|
||||
|
||||
|
||||
psram_local (w!xp): org = 0xc0000000, len = 64K
|
||||
|
||||
|
||||
pfls0 (rx!p): org = 0x80000000, len = 3M
|
||||
pfls0_nc (rx!p): org = 0xa0000000, len = 3M
|
||||
|
||||
|
||||
pfls1 (rx!p): org = 0x80300000, len = 3M
|
||||
pfls1_nc (rx!p): org = 0xa0300000, len = 3M
|
||||
|
||||
|
||||
pfls2 (rx!p): org = 0x80600000, len = 3M
|
||||
pfls2_nc (rx!p): org = 0xa0600000, len = 3M
|
||||
|
||||
|
||||
pfls3 (rx!p): org = 0x80900000, len = 3M
|
||||
pfls3_nc (rx!p): org = 0xa0900000, len = 3M
|
||||
|
||||
|
||||
pfls4 (rx!p): org = 0x80c00000, len = 3M
|
||||
pfls4_nc (rx!p): org = 0xa0c00000, len = 3M
|
||||
|
||||
|
||||
pfls5 (rx!p): org = 0x80f00000, len = 1M
|
||||
pfls5_nc (rx!p): org = 0xa0f00000, len = 1M
|
||||
|
||||
|
||||
dfls0 (rx!p): org = 0xaf000000, len = 1M
|
||||
|
||||
|
||||
ucb (rx!p): org = 0xaf400000, len = 24K
|
||||
|
||||
|
||||
cpu0_dlmu (w!xp): org = 0x90000000, len = 64K
|
||||
cpu0_dlmu_nc (w!xp): org = 0xb0000000, len = 64K
|
||||
|
||||
|
||||
cpu1_dlmu (w!xp): org = 0x90010000, len = 64K
|
||||
cpu1_dlmu_nc (w!xp): org = 0xb0010000, len = 64K
|
||||
|
||||
|
||||
cpu2_dlmu (w!xp): org = 0x90020000, len = 64K
|
||||
cpu2_dlmu_nc (w!xp): org = 0xb0020000, len = 64K
|
||||
|
||||
|
||||
cpu3_dlmu (w!xp): org = 0x90030000, len = 64K
|
||||
cpu3_dlmu_nc (w!xp): org = 0xb0030000, len = 64K
|
||||
|
||||
|
||||
lmuram (w!xp): org = 0x90040000, len = 768K
|
||||
lmuram_nc (w!xp): org = 0xb0040000, len = 768K
|
||||
|
||||
|
||||
cpu4_dlmu (w!xp): org = 0x90100000, len = 64K
|
||||
cpu4_dlmu_nc (w!xp): org = 0xb0100000, len = 64K
|
||||
|
||||
|
||||
cpu5_dlmu (w!xp): org = 0x90110000, len = 64K
|
||||
cpu5_dlmu_nc (w!xp): org = 0xb0110000, len = 64K
|
||||
|
||||
|
||||
edmem (w!xp): org = 0x99000000, len = 4M
|
||||
edmem_nc (w!xp): org = 0xb9000000, len = 4M
|
||||
}
|
||||
|
|
@ -272,79 +272,79 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR5_START + LCF_USTACK5_OFFSET):
|
||||
{ PROVIDE(__USTACK5_END = .); . = . + LCF_USTACK5_SIZE; PROVIDE(__USTACK5 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR5_START + LCF_ISTACK5_OFFSET):
|
||||
{ PROVIDE(__ISTACK5_END = .); . = . + LCF_ISTACK5_SIZE; PROVIDE(__ISTACK5 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR5_START + LCF_CSA5_OFFSET):
|
||||
{ PROVIDE(__CSA5 = .); . = . + LCF_CSA5_SIZE; PROVIDE(__CSA5_END = .); }
|
||||
}
|
||||
|
||||
|
||||
CORE_ID = CPU4;
|
||||
SECTIONS
|
||||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR4_START + LCF_USTACK4_OFFSET):
|
||||
{ PROVIDE(__USTACK4_END = .); . = . + LCF_USTACK4_SIZE; PROVIDE(__USTACK4 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR4_START + LCF_ISTACK4_OFFSET):
|
||||
{ PROVIDE(__ISTACK4_END = .); . = . + LCF_ISTACK4_SIZE; PROVIDE(__ISTACK4 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR4_START + LCF_CSA4_OFFSET):
|
||||
{ PROVIDE(__CSA4 = .); . = . + LCF_CSA4_SIZE; PROVIDE(__CSA4_END = .); }
|
||||
}
|
||||
|
||||
|
||||
CORE_ID = CPU3;
|
||||
SECTIONS
|
||||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR3_START + LCF_USTACK3_OFFSET):
|
||||
{ PROVIDE(__USTACK3_END = .); . = . + LCF_USTACK3_SIZE; PROVIDE(__USTACK3 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR3_START + LCF_ISTACK3_OFFSET):
|
||||
{ PROVIDE(__ISTACK3_END = .); . = . + LCF_ISTACK3_SIZE; PROVIDE(__ISTACK3 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR3_START + LCF_CSA3_OFFSET):
|
||||
{ PROVIDE(__CSA3 = .); . = . + LCF_CSA3_SIZE; PROVIDE(__CSA3_END = .); }
|
||||
}
|
||||
|
||||
|
||||
CORE_ID = CPU2;
|
||||
SECTIONS
|
||||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR2_START + LCF_USTACK2_OFFSET):
|
||||
{ PROVIDE(__USTACK2_END = .); . = . + LCF_USTACK2_SIZE; PROVIDE(__USTACK2 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR2_START + LCF_ISTACK2_OFFSET):
|
||||
{ PROVIDE(__ISTACK2_END = .); . = . + LCF_ISTACK2_SIZE; PROVIDE(__ISTACK2 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR2_START + LCF_CSA2_OFFSET):
|
||||
{ PROVIDE(__CSA2 = .); . = . + LCF_CSA2_SIZE; PROVIDE(__CSA2_END = .); }
|
||||
}
|
||||
|
||||
|
||||
CORE_ID = CPU1;
|
||||
SECTIONS
|
||||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR1_START + LCF_USTACK1_OFFSET):
|
||||
{ PROVIDE(__USTACK1_END = .); . = . + LCF_USTACK1_SIZE; PROVIDE(__USTACK1 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR1_START + LCF_ISTACK1_OFFSET):
|
||||
{ PROVIDE(__ISTACK1_END = .); . = . + LCF_ISTACK1_SIZE; PROVIDE(__ISTACK1 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR1_START + LCF_CSA1_OFFSET):
|
||||
{ PROVIDE(__CSA1 = .); . = . + LCF_CSA1_SIZE; PROVIDE(__CSA1_END = .); }
|
||||
}
|
||||
|
||||
|
||||
CORE_ID = CPU0;
|
||||
SECTIONS
|
||||
{
|
||||
CORE_SEC(.ustack) (LCF_DSPR0_START + LCF_USTACK0_OFFSET):
|
||||
{ PROVIDE(__USTACK0_END = .); . = . + LCF_USTACK0_SIZE; PROVIDE(__USTACK0 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.istack) (LCF_DSPR0_START + LCF_ISTACK0_OFFSET):
|
||||
{ PROVIDE(__ISTACK0_END = .); . = . + LCF_ISTACK0_SIZE; PROVIDE(__ISTACK0 = .); }
|
||||
|
||||
|
||||
CORE_SEC(.csa) (LCF_DSPR0_START + LCF_CSA0_OFFSET):
|
||||
{ PROVIDE(__CSA0 = .); . = . + LCF_CSA0_SIZE; PROVIDE(__CSA0_END = .); }
|
||||
}
|
||||
|
||||
|
||||
/*Fixed memory Allocations for _START*/
|
||||
CORE_ID = GLOBAL ;
|
||||
SECTIONS
|
||||
|
|
@ -359,7 +359,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU4 = 0);
|
||||
PROVIDE(__ENABLE_INDIVIDUAL_C_INIT_CPU5 = 0);
|
||||
}
|
||||
|
||||
|
||||
/*Fixed memory Allocations for Trap Vector Table*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
|
|
@ -371,7 +371,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
.traptab_tc4 (LCF_TRAPVEC4_START) : { PROVIDE(__TRAPTAB_CPU4 = .); KEEP (*(.traptab_cpu4)); } > pfls4
|
||||
.traptab_tc5 (LCF_TRAPVEC5_START) : { PROVIDE(__TRAPTAB_CPU5 = .); KEEP (*(.traptab_cpu5)); } > pfls5
|
||||
}
|
||||
|
||||
|
||||
/*Fixed memory Allocations for _START1 to 5*/
|
||||
CORE_ID = GLOBAL ;
|
||||
SECTIONS
|
||||
|
|
@ -387,7 +387,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
PROVIDE(__START4 = LCF_STARTPTR_NC_CPU4);
|
||||
PROVIDE(__START5 = LCF_STARTPTR_NC_CPU5);
|
||||
}
|
||||
|
||||
|
||||
/*Fixed memory Allocations for Interrupt Vector Table*/
|
||||
SECTIONS
|
||||
{
|
||||
|
|
@ -1949,7 +1949,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
.inttab_tc5_0FE (__INTTAB_CPU5 + 0x1FC0) : { . = ALIGN(8) ; KEEP (*(.intvec_tc5_254)); }
|
||||
.inttab_tc5_0FF (__INTTAB_CPU5 + 0x1FE0) : { . = ALIGN(8) ; KEEP (*(.intvec_tc5_255)); }
|
||||
}
|
||||
|
||||
|
||||
/*Fixed memory Allocations for BMHD*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
|
|
@ -1964,7 +1964,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
.bmhd_2_copy (0xaf401400) : FLAGS(arl) { KEEP (*(.bmhd_2_copy)); } > ucb
|
||||
.bmhd_3_copy (0xaf401600) : FLAGS(arl) { KEEP (*(.bmhd_3_copy)); } > ucb
|
||||
}
|
||||
|
||||
|
||||
/*Near Abbsolute Addressable Data Sections*/
|
||||
/*Near Absolute Data, selectable with patterns and user defined sections*/
|
||||
CORE_ID = CPU5;
|
||||
|
|
@ -1978,7 +1978,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu5.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram5 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc5.* (.zbss)
|
||||
|
|
@ -1998,7 +1998,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu4.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram4 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc4.* (.zbss)
|
||||
|
|
@ -2009,7 +2009,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
}
|
||||
CORE_ID = CPU3;
|
||||
SECTIONS
|
||||
{
|
||||
{
|
||||
CORE_SEC(.zdata) (LCF_DSPR3_START): FLAGS(awzl)
|
||||
{
|
||||
*Ifx_Ssw_Tc3.* (.zdata)
|
||||
|
|
@ -2018,7 +2018,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu3.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram3 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc3.* (.zbss)
|
||||
|
|
@ -2038,7 +2038,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram2 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc2.* (.zbss)
|
||||
|
|
@ -2058,7 +2058,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram1 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc1.* (.zbss)
|
||||
|
|
@ -2078,7 +2078,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram0 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD): FLAGS(awz)
|
||||
{
|
||||
*Ifx_Ssw_Tc0.* (.zbss)
|
||||
|
|
@ -2087,11 +2087,11 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zbss_cpu0.*)
|
||||
} > dsram0
|
||||
}
|
||||
|
||||
|
||||
/*Near Absolute Data, selectable by toolchain*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
{
|
||||
{
|
||||
CORE_SEC(.zdata_powerOn) : FLAGS(awzl)
|
||||
{
|
||||
*(.zdata.dsprPowerOnInit.cpu0.32bit)
|
||||
|
|
@ -2099,7 +2099,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zdata.dsprPowerOnInit.cpu0.8bit)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zdata) : FLAGS(awzl)
|
||||
{
|
||||
*(.zdata.dsprInit.cpu0.32bit)
|
||||
|
|
@ -2110,21 +2110,21 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.gnu.linkonce.z.*)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss_powerOn) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
*(.zbss.dsprPowerOnClear.cpu0.32bit)
|
||||
*(.zbss.dsprPowerOnClear.cpu0.16bit)
|
||||
*(.zbss.dsprPowerOnClear.cpu0.8bit)
|
||||
} > default_ram
|
||||
|
||||
|
||||
CORE_SEC(.zbss_noClear) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
*(.zbss.dsprNoInit.cpu0.32bit)
|
||||
*(.zbss.dsprNoInit.cpu0.16bit)
|
||||
*(.zbss.dsprNoInit.cpu0.8bit)
|
||||
} > default_ram
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
*(.zbss.dsprClearOnInit.cpu0.32bit)
|
||||
|
|
@ -2148,14 +2148,14 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zlmudata.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.zbss) (NOLOAD) : FLAGS(awz)
|
||||
{
|
||||
*(.zlmubss)
|
||||
*(.zlmubss.*)
|
||||
} > cpu0_dlmu
|
||||
}
|
||||
|
||||
|
||||
/*Near Absolute Const, selectable with patterns and user defined sections*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
|
|
@ -2167,7 +2167,7 @@ REGION_ALIAS( default_rom , pfls5)
|
|||
*(.zrodata_cpu?)
|
||||
} > pfls0
|
||||
}
|
||||
|
||||
|
||||
/*Near Absolute Const, selectable by toolchain*/
|
||||
CORE_ID = GLOBAL;
|
||||
SECTIONS
|
||||
|
|
@ -2232,13 +2232,13 @@ SECTIONS
|
|||
*(.a9sdata.*)
|
||||
. = ALIGN(2);
|
||||
} > lmuram AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.sbss4) :
|
||||
{
|
||||
*(.a9sbss)
|
||||
*(.a9sbss.*)
|
||||
*(.a9sbss.*)
|
||||
} > lmuram
|
||||
|
||||
|
||||
_SMALL_DATA4_ = SIZEOF(CORE_SEC(.sdata4)) ? ADDR(CORE_SEC(.sdata4)) : (ADDR(CORE_SEC(.sdata4)) & 0xF0000000) + 32k ;
|
||||
__A9_MEM = _SMALL_DATA4_;
|
||||
|
||||
|
|
@ -2248,7 +2248,7 @@ SECTIONS
|
|||
*(.rodata_a8)
|
||||
*(.rodata_a8.*)
|
||||
} > default_rom
|
||||
|
||||
|
||||
_SMALL_DATA3_ = SIZEOF(CORE_SEC(.sdata3)) ? ADDR(CORE_SEC(.sdata3)) : (ADDR(CORE_SEC(.sdata3)) & 0xF0000000) + 32k ;
|
||||
__A8_MEM = _SMALL_DATA3_;
|
||||
}
|
||||
|
|
@ -2267,7 +2267,7 @@ SECTIONS
|
|||
*(.data_cpu5.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram5 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc5.* (.bss)
|
||||
|
|
@ -2275,7 +2275,7 @@ SECTIONS
|
|||
*(.bss_cpu5)
|
||||
*(.bss_cpu5.*)
|
||||
} > dsram5
|
||||
|
||||
|
||||
/*DLMU5 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2283,10 +2283,10 @@ SECTIONS
|
|||
*(.lmudata_cpu5.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu5_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu5)
|
||||
*(.lmubss_cpu5)
|
||||
*(.lmubss_cpu5.*)
|
||||
} > cpu5_dlmu
|
||||
}
|
||||
|
|
@ -2302,7 +2302,7 @@ SECTIONS
|
|||
*(.data_cpu4.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram4 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc4.* (.bss)
|
||||
|
|
@ -2310,7 +2310,7 @@ SECTIONS
|
|||
*(.bss_cpu4)
|
||||
*(.bss_cpu4.*)
|
||||
} > dsram4
|
||||
|
||||
|
||||
/*DLMU4 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2318,7 +2318,7 @@ SECTIONS
|
|||
*(.lmudata_cpu4.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu4_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu4)
|
||||
|
|
@ -2337,7 +2337,7 @@ SECTIONS
|
|||
*(.data_cpu3.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram3 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc3.* (.bss)
|
||||
|
|
@ -2345,7 +2345,7 @@ SECTIONS
|
|||
*(.bss_cpu3)
|
||||
*(.bss_cpu3.*)
|
||||
} > dsram3
|
||||
|
||||
|
||||
/*DLMU3 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2353,7 +2353,7 @@ SECTIONS
|
|||
*(.lmudata_cpu3.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu3_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu3)
|
||||
|
|
@ -2372,7 +2372,7 @@ SECTIONS
|
|||
*(.data_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram2 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc2.* (.bss)
|
||||
|
|
@ -2380,7 +2380,7 @@ SECTIONS
|
|||
*(.bss_cpu2)
|
||||
*(.bss_cpu2.*)
|
||||
} > dsram2
|
||||
|
||||
|
||||
/*DLMU2 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2388,7 +2388,7 @@ SECTIONS
|
|||
*(.lmudata_cpu2.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu2_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu2)
|
||||
|
|
@ -2407,7 +2407,7 @@ SECTIONS
|
|||
*(.data_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram1 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc1.* (.bss)
|
||||
|
|
@ -2415,7 +2415,7 @@ SECTIONS
|
|||
*(.bss_cpu1)
|
||||
*(.bss_cpu1.*)
|
||||
} > dsram1
|
||||
|
||||
|
||||
/*DLMU1 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2423,7 +2423,7 @@ SECTIONS
|
|||
*(.lmudata_cpu1.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu1_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu1)
|
||||
|
|
@ -2442,7 +2442,7 @@ SECTIONS
|
|||
*(.data_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > dsram0 AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD): FLAGS(aw)
|
||||
{
|
||||
*Ifx_Ssw_Tc0.* (.bss)
|
||||
|
|
@ -2450,7 +2450,7 @@ SECTIONS
|
|||
*(.bss_cpu0)
|
||||
*(.bss_cpu0.*)
|
||||
} > dsram0
|
||||
|
||||
|
||||
/*DLMU0 Sections*/
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
|
|
@ -2458,7 +2458,7 @@ SECTIONS
|
|||
*(.lmudata_cpu0.*)
|
||||
. = ALIGN(2);
|
||||
} > cpu0_dlmu AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss_cpu0)
|
||||
|
|
@ -2476,7 +2476,7 @@ SECTIONS
|
|||
*(.bss.farDsprNoInit.cpu0.16bit)
|
||||
*(.bss.farDsprNoInit.cpu0.8bit)
|
||||
} > default_ram
|
||||
|
||||
|
||||
CORE_SEC(.data) : FLAGS(awl)
|
||||
{
|
||||
*(.data.farDsprInit.cpu0.32bit)
|
||||
|
|
@ -2487,7 +2487,7 @@ SECTIONS
|
|||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(2);
|
||||
} > default_ram AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.bss) (NOLOAD) : FLAGS(aw)
|
||||
{
|
||||
*(.bss.farDsprClearOnInit.cpu0.32bit)
|
||||
|
|
@ -2497,7 +2497,7 @@ SECTIONS
|
|||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
} > default_ram
|
||||
|
||||
|
||||
.heap : FLAGS(aw)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
|
|
@ -2505,14 +2505,14 @@ SECTIONS
|
|||
. += LCF_HEAP_SIZE;
|
||||
__HEAP_END = .;
|
||||
} > default_ram
|
||||
|
||||
|
||||
CORE_SEC(.lmudata) : FLAGS(awl)
|
||||
{
|
||||
*(.lmudata)
|
||||
*(.lmudata.*)
|
||||
. = ALIGN(2);
|
||||
} > lmuram AT> pfls0
|
||||
|
||||
|
||||
CORE_SEC(.lmubss) : FLAGS(aw)
|
||||
{
|
||||
*(.lmubss)
|
||||
|
|
@ -2690,7 +2690,7 @@ SECTIONS
|
|||
*(.text_cpu0)
|
||||
*(.text_cpu0.*)
|
||||
} > pfls0
|
||||
|
||||
|
||||
/*
|
||||
* Code executed before calling main extra section for C++ constructor init
|
||||
* -------------------------Start-----------------------------------------
|
||||
|
|
@ -2702,9 +2702,9 @@ SECTIONS
|
|||
KEEP(*(.init*))
|
||||
PROVIDE(__init_end = .);
|
||||
. = ALIGN(8);
|
||||
|
||||
|
||||
} > pfls0
|
||||
|
||||
|
||||
.fini :
|
||||
{
|
||||
PROVIDE(__fini_start = .);
|
||||
|
|
@ -2713,7 +2713,7 @@ SECTIONS
|
|||
PROVIDE(__fini_end = .);
|
||||
. = ALIGN(8);
|
||||
} > pfls0
|
||||
|
||||
|
||||
/*
|
||||
* Code executed before calling main extra section for C++ constructor init
|
||||
* -------------------------End-----------------------------------------
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/scripts/Lcf_Tasking_Tricore_Tc.lsl
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
############################################################################
|
||||
# boards/tricore/tc3xx/tc397/scripts/Make.defs
|
||||
# boards/tricore/tc397/a2g-tc397-5v-tft/scripts/Make.defs
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
# ##############################################################################
|
||||
# boards/tricore/tc3xx/tc397/src/CMakeLists.txt
|
||||
# boards/tricore/tc397/a2g-tc397-5v-tft/src/CMakeLists.txt
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
############################################################################
|
||||
# boards/tricore/tc3xx/tc397/src/Makefile
|
||||
# boards/tricore/tc397/a2g-tc397-5v-tft/src/Makefile
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/src/tc397.h
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/src/tc397.h
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -20,8 +20,8 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_TRICORE_TC3XX_TC397_SRC_TC397_H
|
||||
#define __BOARDS_TRICORE_TC3XX_TC397_SRC_TC397_H
|
||||
#ifndef __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_SRC_TC397_H
|
||||
#define __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_SRC_TC397_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
|
|
@ -62,4 +62,4 @@ int tc397_bringup(void);
|
|||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_TRICORE_TC3XX_TC397_SRC_TC397_H */
|
||||
#endif /* __BOARDS_TRICORE_TC397_A2G_TC397_5V_TFT_SRC_TC397_H */
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/src/tc397_appinit.c
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/src/tc397_appinit.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/src/tc397_boardinit.c
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/src/tc397_boardinit.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* boards/tricore/tc3xx/tc397/src/tc397_bringup.c
|
||||
* boards/tricore/tc397/a2g-tc397-5v-tft/src/tc397_bringup.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
Loading…
Add table
Reference in a new issue