TMS570: Use values from TI OTP to set LPO trim value
This commit is contained in:
Gregory Nutt
parent
fac00f04d0
commit
2bd1be6c96
2 changed files with 118 additions and 7 deletions
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@ -52,6 +52,14 @@
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/****************************************************************************************************
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* Pre-processor Definitions
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****************************************************************************************************/
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/* The LPO trim value may be programmed into the TI OTP: */
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#define TMS570_TITCM_LPOTRIM_OFFSET 0x01b4
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#define TMS570_TITCM_LPOTRIM (TMS570_TITCM_BASE+TMS570_TITCM_LPOTRIM_OFFSET)
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# define TMS570_TITCM_LPOTRIM_SHIFT (16) /* Bits 16-31: LPO trim value */
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# define TMS570_TITCM_LPOTRIM_MASK (0xffff << TMS570_TITCM_LPOTRIM_SHIFT)
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/* Register Offsets *********************************************************************************/
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#define TMS570_SYS_PC1_OFFSET 0x0000 /* SYS Pin Control Register 1 */
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@ -302,7 +310,78 @@
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/* Die Identification Register, Upper Word */
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#define SYS_DIEIDH_
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/* LPO/Clock Monitor Control Register */
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#define SYS_LPOMONCTL_
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#define SYS_LPOMONCTL_LFTRIM_SHIFT (0) /* Bits 0-4: Low frequency oscillator trim value */
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#define SYS_LPOMONCTL_LFTRIM_MASK (31 << SYS_LPOMONCTL_LFTRIM_SHIFT)
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# define SYS_LPOMONCTL_20p67 (0 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 20.67% */
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# define SYS_LPOMONCTL_25p76 (1 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 25.76% */
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# define SYS_LPOMONCTL_30p84 (2 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 30.84% */
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# define SYS_LPOMONCTL_35p90 (3 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 35.90% */
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# define SYS_LPOMONCTL_40p93 (4 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 40.93% */
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# define SYS_LPOMONCTL_45p95 (5 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 45.95% */
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# define SYS_LPOMONCTL_50p97 (6 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 50.97% */
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# define SYS_LPOMONCTL_55p91 (7 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 55.91% */
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# define SYS_LPOMONCTL_60p86 (8 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 60.86% */
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# define SYS_LPOMONCTL_65p78 (9 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 65.78% */
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# define SYS_LPOMONCTL_70p75 (10 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 70.75% */
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# define SYS_LPOMONCTL_75p63 (11 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 75.63% */
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# define SYS_LPOMONCTL_80p61 (12 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 80.61% */
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# define SYS_LPOMONCTL_85p39 (13 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 85.39% */
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# define SYS_LPOMONCTL_90p23 (14 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 90.23% */
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# define SYS_LPOMONCTL_95p11 (15 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 95.11% */
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# define SYS_LPOMONCTL_100p00 (16 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 100.00% */
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# define SYS_LPOMONCTL_104p84 (17 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 104.84% */
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# define SYS_LPOMONCTL_109p51 (18 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 109.51% */
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# define SYS_LPOMONCTL_114p31 (19 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 114.31% */
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# define SYS_LPOMONCTL_119p01 (20 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 119.01% */
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# define SYS_LPOMONCTL_123p75 (21 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 123.75% */
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# define SYS_LPOMONCTL_128p62 (22 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 128.62% */
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# define SYS_LPOMONCTL_133p31 (23 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 133.31% */
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# define SYS_LPOMONCTL_138p03 (24 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 138.03% */
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# define SYS_LPOMONCTL_142p75 (25 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 142.75% */
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# define SYS_LPOMONCTL_147p32 (26 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 147.32% */
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# define SYS_LPOMONCTL_152p02 (27 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 152.02% */
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# define SYS_LPOMONCTL_156p63 (28 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 156.63% */
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# define SYS_LPOMONCTL_161p38 (29 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 161.38% */
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# define SYS_LPOMONCTL_165p90 (30 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 165.90% */
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# define SYS_LPOMONCTL_170p42 (31 << SYS_LPOMONCTL_LFTRIM_SHIFT) /* 170.42% */
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#define SYS_LPOMONCTL_HFTRIM_SHIFT (8) /* Bits 8-12: High frequency oscillator trim value */
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#define SYS_LPOMONCTL_HFTRIM_MASK (31 << SYS_LPOMONCTL_HFTRIM_SHIFT)
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# define SYS_LPOMONCTL_HFTRIM_29p52 (0 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 29.52% */
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# define SYS_LPOMONCTL_HFTRIM_34p24 (1 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 34.24% */
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# define SYS_LPOMONCTL_HFTRIM_38p85 (2 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 38.85% */
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# define SYS_LPOMONCTL_HFTRIM_43p45 (3 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 43.45% */
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# define SYS_LPOMONCTL_HFTRIM_47p99 (4 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 47.99% */
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# define SYS_LPOMONCTL_HFTRIM_52p55 (5 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 52.55% */
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# define SYS_LPOMONCTL_HFTRIM_57p02 (6 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 57.02% */
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# define SYS_LPOMONCTL_HFTRIM_61p46 (7 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 61.46% */
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# define SYS_LPOMONCTL_HFTRIM_65p92 (8 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 65.92% */
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# define SYS_LPOMONCTL_HFTRIM_70p17 (9 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 70.17% */
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# define SYS_LPOMONCTL_HFTRIM_74p55 (10 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 74.55% */
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# define SYS_LPOMONCTL_HFTRIM_78p92 (11 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 78.92% */
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# define SYS_LPOMONCTL_HFTRIM_83p17 (12 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 83.17% */
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# define SYS_LPOMONCTL_HFTRIM_87p43 (13 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 87.43% */
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# define SYS_LPOMONCTL_HFTRIM_91p75 (14 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 91.75% */
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# define SYS_LPOMONCTL_HFTRIM_95p89 (15 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 95.89% */
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# define SYS_LPOMONCTL_HFTRIM_100p00 (16 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 100.00% */
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# define SYS_LPOMONCTL_HFTRIM_104p09 (17 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 104.09% */
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# define SYS_LPOMONCTL_HFTRIM_108p17 (18 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 108.17% */
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# define SYS_LPOMONCTL_HFTRIM_112p32 (19 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 112.32% */
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# define SYS_LPOMONCTL_HFTRIM_116p41 (20 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 116.41% */
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# define SYS_LPOMONCTL_HFTRIM_120p67 (21 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 120.67% */
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# define SYS_LPOMONCTL_HFTRIM_124p42 (22 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 124.42% */
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# define SYS_LPOMONCTL_HFTRIM_128p38 (23 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 128.38% */
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# define SYS_LPOMONCTL_HFTRIM_132p24 (24 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 132.24% */
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# define SYS_LPOMONCTL_HFTRIM_136p15 (25 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 136.15% */
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# define SYS_LPOMONCTL_HFTRIM_140p15 (26 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 140.15% */
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# define SYS_LPOMONCTL_HFTRIM_143p94 (27 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 143.94% */
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# define SYS_LPOMONCTL_HFTRIM_148p02 (28 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 148.02% */
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# define SYS_LPOMONCTL_HFTRIM_151p80 (29 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 151.80% */
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# define SYS_LPOMONCTL_HFTRIM_155p50 (30 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 155.50% */
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# define SYS_LPOMONCTL_HFTRIM_159p35 (31 << SYS_LPOMONCTL_HFTRIM_SHIFT) /* 159.35% */
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#define SYS_LPOMONCTL_OSCFRQCONFIGCNT (1 << 16) /* Bit 16: Configures the counter based on OSC frequency. */
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#define SYS_LPOMONCTL_BIASENABLE (1 << 24) /* Bit 24: Bias enable. */
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/* Clock Test Register */
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#define SYS_CLKTEST_
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/* DFT Control Register */
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@ -150,13 +150,10 @@ static void tms570_pll_setup(void)
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}
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/****************************************************************************
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* Name: tms570_pll_setup
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* Name: tms570_peripheral_initialize
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*
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* Description:
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* Configure PLL control registers. The PLL takes (127 + 1024 NR)
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* oscillator cycles to acquire lock. This initialization sequence
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* performs all the actions that are not required to be done at full
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* application speed while the PLL locks.
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* Release peripherals from reset and enable clocks to all peripherals.
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*
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****************************************************************************/
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@ -210,6 +207,40 @@ static void tms570_peripheral_initialize(void)
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putreg32(clkcntl, TMS570_SYS_CLKCNTL);
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}
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/****************************************************************************
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* Name: tms570_lpo_trim
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*
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* Description:
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* Configure the LPO such that HF LPO is as close to 10MHz as possible.
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*
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****************************************************************************/
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static void tms570_lpo_trim(void)
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{
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uint32_t regval;
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uint32_t lotrim;
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/* The LPO trim value may be available in TI OTP */
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lotrim = (getreg32(TMS570_TITCM_LPOTRIM) & TMS570_TITCM_LPOTRIM_MASK) <<
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TMS570_TITCM_LPOTRIM_SHIFT;
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/* Use if the LPO trim value TI OTP if programmed. Otherwise, use the default value */
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if (lotrim != 0xffff)
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{
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regval = SYS_LPOMONCTL_BIASENABLE | lotrim;
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}
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else
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{
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regval = SYS_LPOMONCTL_BIASENABLE |
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SYS_LPOMONCTL_HFTRIM_100p00 |
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SYS_LPOMONCTL_60p86;
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}
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putreg32(regval, TMS570_SYS_LPOMONCTL);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -260,7 +291,8 @@ void tms570_clockconfig(void)
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#warning Missing Logic
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/* Configure the LPO such that HF LPO is as close to 10MHz as possible */
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#warning Missing Logic
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tms570_lpo_trim();
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/* Wait for PLLs to start up and map clock domains to desired clock
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* sources.
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