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stm32f412ce fixes

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This commit is contained in:
Daniel Agar 2020-09-22 10:57:19 -04:00 • committed by Xiang Xiao
parent ebdfd16f0f
commit 3df8f79111
3 changed files with 12 additions and 4 deletions
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6
arch/arm/include/stm32/chip.h
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@ -1756,7 +1756,7 @@
# define STM32_NRNG 0 /* No Random number generator (RNG) */
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
#elif defined(CONFIG_ARCH_CHIP_STM32F412CE) /* 144 pin LQFP package, 1MB FLASH, 256KiB SRAM */
#elif defined(CONFIG_ARCH_CHIP_STM32F412CE) /* UFQFPN48 package, 512Kb FLASH, 256KiB SRAM */
# define STM32_NFSMC 1 /* FSMC */
# define STM32_NATIM 2 /* Two advanced timers TIM1 and TIM8 */
# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA
@ -1766,13 +1766,13 @@
# define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/
# define STM32_NSPI 5 /* SPI1-5 */
# define STM32_NI2S 3 /* I2S1-3 */
# define STM32_NUSART 6 /* USART1, 2, 3 and 6 */
# define STM32_NUSART 4 /* USART1, 2, 3 and 6 */
# define STM32_NI2C 3 /* I2C1-3 */
# define STM32_NCAN 2 /* 2 CAN */
# define STM32_NSDIO 1 /* One SDIO interface */
# define STM32_NLCD 0 /* No LCD */
# define STM32_NUSBOTG 1 /* USB OTG FS (only) */
# define STM32_NGPIO 81 /* GPIOA-H */
# define STM32_NGPIO 32 /* GPIOA-B */
# define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */
# define STM32_NDAC 0 /* No DAC */
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */

2
arch/arm/src/stm32/Kconfig
View file

@ -1638,6 +1638,8 @@ config STM32_STM32F412
select STM32_HAVE_USART2
select STM32_HAVE_USART6
select STM32_HAVE_I2C1
select STM32_HAVE_I2C2
select STM32_HAVE_I2C3
select STM32_HAVE_SPI1
select STM32_HAVE_CAN1
select STM32_HAVE_ADC1

8
arch/arm/src/stm32/hardware/stm32f40xxx_pinmap.h
View file

@ -493,8 +493,9 @@
#define GPIO_I2C2_SMBA_1 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12)
#define GPIO_I2C2_SMBA_2 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN2)
#define GPIO_I2C2_SMBA_3 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6)
#if defined(CONFIG_STM32_STM32F411)
#if defined(CONFIG_STM32_STM32F411) || defined(CONFIG_STM32_STM32F412)
# define GPIO_I2C2_SDA_4 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3)
# define GPIO_I2C2_SDA_5 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN9)
#endif
#if defined(CONFIG_STM32_STM32F446)
# define GPIO_I2C2_SDA_4 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3)
@ -988,6 +989,11 @@
#define GPIO_USART1_RTS (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN12)
#define GPIO_USART1_RX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10)
#define GPIO_USART1_RX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7)
#if defined(CONFIG_STM32_STM32F412)
# define GPIO_USART1_RX_3 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3)
# define GPIO_USART1_TX_3 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15)
#endif
#define GPIO_USART1_TX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9)
#define GPIO_USART1_TX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6)