eZ80: Fix optimization issues
board/z80/ez80/*/scripts/Make.defs: Fix optimization definition use in assembly flags. It was using the compiler optimization settings instead of the assembler optimization settings. Hence, enabling optimization would could cause assembler command line errors. arch/z80/src/ez80/Toolchain.defs: Back out some work arounds. Now compiler optimization flags can again set set without assembler command line errors. boards/z80/ez80/z20x/README.txt: Trivial update to size/optimization discussion.
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6 changed files with 27 additions and 21 deletions
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@ -107,14 +107,12 @@ endif
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# CPU Identification
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ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
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ARCHCPU = eZ80F91
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ARCHCPU = eZ80F91
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ARCHCPUDEF = _EZ80F91
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ARCHFAMILY = _EZ80ACCLAIM!
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else ifeq ($(CONFIG_ARCH_CHIP_EZ80F92),y)
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#ARCHCPU = eZ80F92
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#ARCHCPUDEF = _EZ80F92
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ARCHCPU = eZ80F91
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ARCHCPUDEF = _EZ80F91
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ARCHCPU = eZ80F92
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ARCHCPUDEF = _EZ80F92
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ARCHFAMILY = _EZ80ACCLAIM!
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endif
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@ -129,11 +127,9 @@ else
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endif
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ifeq ($(CONFIG_DEBUG_NOOPT),y)
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# ARCHOPTIMIZATION += -promote -reduceopt -NOsdiopt
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ARCHOPTIMIZATION += -NOsdiopt
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ARCHOPTIMIZATION += -NOpromote -reduceopt -NOsdiopt
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else
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# ARCHOPTIMIZATION += -NOpromote -NOreduceopt -sdiopt -optsize
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ARCHOPTIMIZATION += -sdiopt
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ARCHOPTIMIZATION += -promote -NOreduceopt -sdiopt -optsize
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endif
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# Tool names/paths.
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@ -63,7 +63,7 @@ AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS)
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# Compiler definitions
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ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHOPTIMIZATION)"
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)"
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ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm
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ARCHPICFLAGS =
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ARCHWARNINGS = -warn
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@ -63,7 +63,7 @@ AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS)
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# Compiler definitions
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ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHOPTIMIZATION)"
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)"
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ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm
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ARCHPICFLAGS =
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ARCHWARNINGS = -warn
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@ -63,7 +63,7 @@ AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS)
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# Compiler definitions
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ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHOPTIMIZATION)"
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)"
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ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm
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ARCHPICFLAGS =
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ARCHWARNINGS = -warn
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@ -95,13 +95,6 @@ Memory Constaints
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you enable assertions, debug outputs, or even debug symbols. It is very
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unlikely that the nsh_flash configuration will fit into FLASH at all!
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I believe that there is some issue with the optimization CFLAGS used with
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the ZDS-II compiler. The size of the FLASH images that are generated are
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larger than you would see with, say, an equivalent Cortex-M compilation.
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I reviewed the individual object files. There is not one thing that is
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causing the large size. Rather, the ZDS-II compiler is simply generating
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larger CODE sections in the object files.
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Serial Console
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==============
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@ -222,9 +215,12 @@ Configuration Subdirectories
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NOTES:
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1. UNVERIFIED! I doubt that the nsh_flash program will fit into the
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smaller FLASH memory of the eZ80F92 part. See discusssion under
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smaller FLASH memory of the eZ80F92 part. See discussion under
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"Memory Constraints" above.
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The nsh_ram configuration, of course, depends on the sdboot
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bootloader to load that program into RAM.
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2. The two configurations different only in that one builds for
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execution entirely from FLASH and the other for execution entirely
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from RAM. A bootloader of some kind is required to support such
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@ -349,3 +345,17 @@ Configuration Subdirectories
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64Kb of FLASH memory. It will not be possible to run programs in
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SRAM *unless* some mechanism is developed to redirect interrupts
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from ROM and into loaded SRAM logic.
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For example, it might be possible to implement this kind of
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vectoring to get to a RAM based interrupt handler:
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a. The initial 16-bit address in the interrupt vector table can
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transfer the interrupt to a larger jump table also in lower
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flash memory.
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b. That jump table could vector to another jump table at a known
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location RAM.
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c. The RAM jump table could then jump to the final RAM-based
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interrupt handler.
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This would effect the logic in arch/z80/src/ez80/ez80f92_handlers.am
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and possible the z20x *.linkcmd files.
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@ -48,7 +48,7 @@ AFLAGS = $(ARCHASMCPUFLAGS) $(ARCHASMINCLUDES) $(ARCHASMLIST) $(ARCHASMWARNINGS)
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# Compiler definitions
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ARCHCPUFLAGS = -chartype:S -promote -cpu:$(ARCHCPU) -NOgenprintf -NOmodsect \
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHOPTIMIZATION)"
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-asmsw:" $(ARCHASMCPUFLAGS) $(EARCHASMINCLUDES) $(ARCHASMWARNINGS) $(ARCHASMOPTIMIZATION)"
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ARCHLIST = -keeplst -NOlist -NOlistinc -keepasm
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ARCHPICFLAGS =
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ARCHWARNINGS = -warn
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