From 50eee2f081d818f9a0b783be668b7ee596022215 Mon Sep 17 00:00:00 2001 From: ligd Date: Thu, 3 Jun 2021 15:30:32 +0800 Subject: [PATCH] arm: fix enable interrupt too earlier caused system crash reason: msr cpsr, r2 /* Set the CPSR */ // interrupt hanppend, context switch pop {r0-r2, pc} resolve: use SPSR instead, and recover with ldmia ^ Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3 Signed-off-by: ligd (cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d) Signed-off-by: ligd --- arch/arm/src/arm/arm_fullcontextrestore.S | 6 +++--- arch/arm/src/armv7-a/arm_fullcontextrestore.S | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/arm/arm_fullcontextrestore.S b/arch/arm/src/arm/arm_fullcontextrestore.S index 97cc179a14..a3a41ac4e5 100644 --- a/arch/arm/src/arm/arm_fullcontextrestore.S +++ b/arch/arm/src/arm/arm_fullcontextrestore.S @@ -87,11 +87,11 @@ arm_fullcontextrestore: */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the stored CPSR value */ - msr cpsr, r1 /* Set the CPSR */ + msr spsr, r1 /* Set the SPSR */ - /* Now recover r0-r1 and pc, destroying the stack frame */ + /* Now recover r0-r1, pc and cpsr, destroying the stack frame */ - ldmia sp!, {r0-r1, r15} + ldmia sp!, {r0-r1, r15}^ .size arm_fullcontextrestore, .-arm_fullcontextrestore .end diff --git a/arch/arm/src/armv7-a/arm_fullcontextrestore.S b/arch/arm/src/armv7-a/arm_fullcontextrestore.S index 5d89577bf0..f101650c22 100644 --- a/arch/arm/src/armv7-a/arm_fullcontextrestore.S +++ b/arch/arm/src/armv7-a/arm_fullcontextrestore.S @@ -144,11 +144,11 @@ arm_fullcontextrestore: * disabled. */ - msr cpsr, r2 /* Set the CPSR */ + msr spsr, r2 /* Set the SPSR */ - /* Now recover r0 r1 r2 and R15 */ + /* Now recover r0-r2, pc and cpsr, destroying the stack frame */ - pop {r0-r2, pc} + ldmia sp!, {r0-r2, pc}^ #endif .size arm_fullcontextrestore, .-arm_fullcontextrestore