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Integration of pysimCoder with NUTTX

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This commit is contained in:
Roberto Bucher 2021-03-29 08:46:52 +02:00 • committed by Alan Carvalho de Assis
parent 63a4807f28
commit 590ee65fa7
8 changed files with 384 additions and 44 deletions
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3
arch/arm/src/stm32f7/stm32_adc.c
View file

@ -735,8 +735,7 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
* position.
*/
ainfo("Initializing timers extsel = 0x%08lx\n", priv->extsel);
ainfo("Initializing timers extsel = 0x%08" PRIx32 "\n", priv->extsel);
adc_modifyreg(priv, STM32_ADC_EXTREG_OFFSET,
ADC_EXTREG_EXTEN_MASK | ADC_EXTREG_EXTSEL_MASK,
ADC_EXTREG_EXTEN_DEFAULT | priv->extsel);

17
arch/arm/src/stm32f7/stm32_can.c
View file

@ -849,7 +849,7 @@ static int stm32can_ioctl(FAR struct can_dev_s *dev, int cmd,
FAR struct stm32_can_s *priv;
int ret = -ENOTTY;
caninfo("cmd=%04x arg=%lu\n", cmd, arg);
caninfo("cmd=%04x arg=%" PRIu32 "\n", cmd, arg);
DEBUGASSERT(dev && dev->cd_priv);
priv = dev->cd_priv;
@ -951,7 +951,7 @@ static int stm32can_ioctl(FAR struct can_dev_s *dev, int cmd,
DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
}
caninfo("TS1: %d TS2: %d BRP: %lu\n",
caninfo("TS1: %"PRId8 " TS2: %" PRId8 " BRP: %" PRIu32 "\n",
bt->bt_tseg1, bt->bt_tseg2, brp);
/* Configure bit timing. */
@ -1409,7 +1409,7 @@ static bool stm32can_txready(FAR struct can_dev_s *dev)
/* Return true if any mailbox is available */
regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
caninfo("CAN%d TSR: %08lx\n", priv->port, regval);
caninfo("CAN%d TSR: %08" PRIx32 "\n", priv->port, regval);
return stm32can_txmb0empty(regval) || stm32can_txmb1empty(regval) ||
stm32can_txmb2empty(regval);
@ -1441,7 +1441,7 @@ static bool stm32can_txempty(FAR struct can_dev_s *dev)
/* Return true if all mailboxes are available */
regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET);
caninfo("CAN%d TSR: %08lx\n", priv->port, regval);
caninfo("CAN%d TSR: %08" PRIx32 "\n", priv->port, regval);
return stm32can_txmb0empty(regval) && stm32can_txmb1empty(regval) &&
stm32can_txmb2empty(regval);
@ -1747,7 +1747,7 @@ static int stm32can_bittiming(FAR struct stm32_can_s *priv)
uint32_t ts1;
uint32_t ts2;
caninfo("CAN%d PCLK1: %ld baud: %ld\n",
caninfo("CAN%d PCLK1: %" PRId32 " baud: %" PRId32 "\n",
priv->port, STM32_PCLK1_FREQUENCY, priv->baud);
/* Try to get CAN_BIT_QUANTA quanta in one bit_time.
@ -1800,7 +1800,8 @@ static int stm32can_bittiming(FAR struct stm32_can_s *priv)
DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX);
}
caninfo("TS1: %ld TS2: %ld BRP: %ld\n", ts1, ts2, brp);
caninfo("TS1: %" PRId32 " TS2: %" PRId32 " BRP: %" PRId32 "\n",
ts1, ts2, brp);
/* Configure bit timing. This also does the following, less obvious
* things. Unless loopback mode is enabled, it:
@ -1917,8 +1918,8 @@ static int stm32can_exitinitmode(FAR struct stm32_can_s *priv)
if (timeout < 1)
{
canerr("ERROR: Timed out waiting to exit initialization mode: %08lx\n",
regval);
canerr("ERROR: Timed out waiting to exit initialization mode: %08"
PRIx32 "\n", regval);
return -ETIMEDOUT;
}

63
boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs Normal file
View file

@ -0,0 +1,63 @@
############################################################################
# boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = f746-flash.ld
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif

113
boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig Normal file
View file

@ -0,0 +1,113 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PRINTF is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STM32F7_DTCMEXCLUDE is not set
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=16
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-144"
CONFIG_ARCH_BOARD_NUCLEO_144=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32f7"
CONFIG_ARCH_CHIP_STM32F746ZG=y
CONFIG_ARCH_CHIP_STM32F7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_CAN_USE_RTR=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CLOCK_MONOTONIC=y
CONFIG_DEV_GPIO=y
CONFIG_DRVR_READAHEAD=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_TMPFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IOEXPANDER=y
CONFIG_IOEXPANDER_MULTIPIN=y
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_LIBM=y
CONFIG_MAX_TASKS=16
CONFIG_MM_REGIONS=2
CONFIG_MODULE=y
CONFIG_MQ_MAXMSGSIZE=256
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUCLEO_CONSOLE_VIRTUAL=y
CONFIG_PIPES=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PRIORITY_INHERITANCE=y
CONFIG_PWM=y
CONFIG_PWM_MULTICHAN=y
CONFIG_PWM_NCHANNELS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
CONFIG_START_DAY=30
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2015
CONFIG_STM32F7_ADC1=y
CONFIG_STM32F7_ADC1_DMA=y
CONFIG_STM32F7_ADC1_SAMPLE_FREQUENCY=5000
CONFIG_STM32F7_ADC_NO_STARTUP_CONV=y
CONFIG_STM32F7_CAN1=y
CONFIG_STM32F7_CAN1_BAUD=500000
CONFIG_STM32F7_CAN_TSEG1=5
CONFIG_STM32F7_CAN_TSEG2=6
CONFIG_STM32F7_DMA1=y
CONFIG_STM32F7_DMA2=y
CONFIG_STM32F7_DMACAPABLE=y
CONFIG_STM32F7_OTGFS=y
CONFIG_STM32F7_PWM_MULTICHAN=y
CONFIG_STM32F7_SYSCFG_IOCOMPENSATION=y
CONFIG_STM32F7_TIM1=y
CONFIG_STM32F7_TIM1_ADC=y
CONFIG_STM32F7_TIM2=y
CONFIG_STM32F7_TIM2_QE=y
CONFIG_STM32F7_TIM3=y
CONFIG_STM32F7_TIM3_CH1OUT=y
CONFIG_STM32F7_TIM3_CH2OUT=y
CONFIG_STM32F7_TIM3_CH3OUT=y
CONFIG_STM32F7_TIM3_CH4OUT=y
CONFIG_STM32F7_TIM3_CHANNEL1=y
CONFIG_STM32F7_TIM3_CHANNEL2=y
CONFIG_STM32F7_TIM3_CHANNEL3=y
CONFIG_STM32F7_TIM3_CHANNEL4=y
CONFIG_STM32F7_TIM3_PWM=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TIME64=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART3_BAUD=1200000
CONFIG_USBDEV=y
CONFIG_USERLED=y
CONFIG_USERLED_LOWER=y
CONFIG_USER_ENTRYPOINT="nsh_main"

48
boards/arm/stm32f7/nucleo-144/include/board.h
View file

@ -1,38 +1,20 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/include/board.h
*
* Copyright (C) 2016-2017, 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Mark Olsson <post@markolsson.se>
* David Sidrane <david_s5@nscdg.com>
* Bob Feretich <bob.feretich@rafresearch.com>
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* http://www.apache.org/licenses/LICENSE-2.0
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
@ -523,11 +505,9 @@
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
#define GPIO_ETH_MII_COL GPIO_ETH_COL_1
/* CAN Bus
* CAN1 on pin PD0/PD1
*/
/* CAN Bus: CAN1 on pin PD0/PD1 */
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN1_RX GPIO_CAN1_RX_3

115
boards/arm/stm32f7/nucleo-144/src/stm32_can.c Normal file
View file

@ -0,0 +1,115 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_can.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include "stm32_can.h"
#include "nucleo-144.h"
#ifdef CONFIG_CAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_STM32F7_CAN1
# define CAN_PORT 1
#else
# define CAN_PORT 2
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32f7_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
int stm32f7_can_setup(void)
{
#if defined(CONFIG_STM32F7_CAN1)
struct can_dev_s *can;
int ret;
/* Call stm32f7can_initialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#endif
#if defined(CONFIG_STM32F7_CAN2)
struct can_dev_s *can;
int ret;
/* Call stm32f7can_initialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can1" */
ret = can_register("/dev/can1", can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */

65
boards/arm/stm32f7/nucleo-144/src/stm32_qencoder.c Normal file
View file

@ -0,0 +1,65 @@
/****************************************************************************
* boards/arm/stm32f7/nucleo-144/src/stm32_qencoder.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/sensors/qencoder.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32_qencoder.h"
#include "nucleo-144.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: qe_devinit
*
* Description:
* All STM32F7 architectures must provide the following interface to work
* with examples/qencoder.
*
****************************************************************************/
int stm32f7_qencoder_initialize(FAR const char *devpath, int timer)
{
int ret = 0;
/* Initialize a quadrature encoder interface. */
sninfo("Initializing the quadrature encoder using TIM%d\n", timer);
ret = stm32_qeinitialize(devpath, timer);
if (ret < 0)
{
snerr("ERROR: stm32_qeinitialize failed: %d\n", ret);
}
return ret;
}

4
drivers/rwbuffer.c
View file

@ -71,15 +71,18 @@ static ssize_t rwb_read_(FAR struct rwbuffer_s *rwb, off_t startblock,
* Name: rwb_semtake
****************************************************************************/
#if defined(CONFIG_DRVR_WRITEBUFFER) && CONFIG_DRVR_WRDELAY != 0
static int rwb_semtake(FAR sem_t *sem)
{
return nxsem_wait_uninterruptible(sem);
}
#endif
/****************************************************************************
* Name: rwb_forcetake
****************************************************************************/
#if defined(CONFIG_DRVR_WRITEBUFFER) && CONFIG_DRVR_WRDELAY != 0
static int rwb_forcetake(FAR sem_t *sem)
{
int result;
@ -103,6 +106,7 @@ static int rwb_forcetake(FAR sem_t *sem)
return ret;
}
#endif
/****************************************************************************
* Name: rwb_semgive