From 6089f58f00a80b15bcbfdf9d03cf523becd7d6ce Mon Sep 17 00:00:00 2001
From: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Date: Tue, 1 Aug 2023 15:02:52 -0300
Subject: [PATCH] esp32s3/irq: Enhance IRQ subsystem

- Fix macro values from `arch/xtensa/include/esp32s3/irq.h`
- Remove references to unexisting edge-triggered CPU interrupts
- Add `esp32s3_getirq` to get IRQ based on core and the `cpuint`
---
 arch/xtensa/include/esp32s3/irq.h     | 10 +----
 arch/xtensa/src/esp32s3/esp32s3_irq.c | 61 ++++++++++++++++++---------
 arch/xtensa/src/esp32s3/esp32s3_irq.h | 18 ++++++++
 3 files changed, 62 insertions(+), 27 deletions(-)

diff --git a/arch/xtensa/include/esp32s3/irq.h b/arch/xtensa/include/esp32s3/irq.h
index 7f6f49a14c..591384a0fa 100644
--- a/arch/xtensa/include/esp32s3/irq.h
+++ b/arch/xtensa/include/esp32s3/irq.h
@@ -438,15 +438,9 @@
 #define ESP32S3_CPUINT_LEVELPERIPH_20 31
 
 #define ESP32S3_CPUINT_NLEVELPERIPHS  21
-#define ESP32S3_CPUINT_LEVELSET       0x8fbe333f
+#define ESP32S3_CPUINT_LEVELSET       0xdffe373f
 
-#define ESP32S3_CPUINT_EDGEPERIPH_0   10
-#define ESP32S3_CPUINT_EDGEPERIPH_1   22
-#define ESP32S3_CPUINT_EDGEPERIPH_2   28
-#define ESP32S3_CPUINT_EDGEPERIPH_3   30
-
-#define ESP32S3_CPUINT_NEDGEPERIPHS   4
-#define ESP32S3_CPUINT_EDGESET        0x50400400
+#define ESP32S3_CPUINT_NEDGEPERIPHS   0
 
 #define ESP32S3_CPUINT_NNMIPERIPHS    1
 #define ESP32S3_CPUINT_NMISET         0x00004000
diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.c b/arch/xtensa/src/esp32s3/esp32s3_irq.c
index 0e8abdf90a..5303f441aa 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_irq.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_irq.c
@@ -346,27 +346,14 @@ static int esp32s3_alloc_cpuint(int priority, int type)
 
   DEBUGASSERT(priority >= ESP32S3_MIN_PRIORITY &&
               priority <= ESP32S3_MAX_PRIORITY);
-  DEBUGASSERT(type == ESP32S3_CPUINT_LEVEL ||
-              type == ESP32S3_CPUINT_EDGE);
+  DEBUGASSERT(type == ESP32S3_CPUINT_LEVEL);
 
-  if (type == ESP32S3_CPUINT_LEVEL)
-    {
-      /* Check if there are any level CPU interrupts available at the
-       * requested interrupt priority.
-       */
+  /* Check if there are any level CPU interrupts available at the
+   * requested interrupt priority.
+   */
 
-      mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
-              ESP32S3_CPUINT_LEVELSET;
-    }
-  else
-    {
-      /* Check if there are any edge CPU interrupts available at the
-       * requested interrupt priority.
-       */
-
-      mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
-              ESP32S3_CPUINT_EDGESET;
-    }
+  mask = g_priority[ESP32S3_PRIO_INDEX(priority)] &
+          ESP32S3_CPUINT_LEVELSET;
 
   return esp32s3_getcpuint(mask);
 }
@@ -834,6 +821,42 @@ void esp32s3_teardown_irq(int cpu, int periphid, int cpuint)
   leave_critical_section(irqstate);
 }
 
+/****************************************************************************
+ * Name:  esp32s3_getirq
+ *
+ * Description:
+ *   This function returns the IRQ associated with a CPU interrupt
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   cpuint   - The CPU interrupt associated to the IRQ
+ *
+ * Returned Value:
+ *   The IRQ associated with such CPU interrupt or CPUINT_UNASSIGNED if
+ *   IRQ is not yet assigned to a CPU interrupt.
+ *
+ ****************************************************************************/
+
+int esp32s3_getirq(int cpu, int cpuint)
+{
+  uint8_t *intmap;
+
+#ifdef CONFIG_SMP
+  /* Select PRO or APP CPU interrupt mapping table */
+
+  if (cpu != 0)
+    {
+      intmap = g_cpu1_intmap;
+    }
+  else
+#endif
+    {
+      intmap = g_cpu0_intmap;
+    }
+
+  return CPUINT_GETIRQ(intmap[cpuint]);
+}
+
 /****************************************************************************
  * Name: xtensa_int_decode
  *
diff --git a/arch/xtensa/src/esp32s3/esp32s3_irq.h b/arch/xtensa/src/esp32s3/esp32s3_irq.h
index 2ef8f26e31..6119cf7348 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_irq.h
+++ b/arch/xtensa/src/esp32s3/esp32s3_irq.h
@@ -114,6 +114,24 @@ int esp32s3_setup_irq(int cpu, int periphid, int priority, int type);
 
 void esp32s3_teardown_irq(int cpu, int periphid, int cpuint);
 
+/****************************************************************************
+ * Name:  esp32s3_getirq
+ *
+ * Description:
+ *   This function returns the IRQ associated with a CPU interrupt
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   cpuint   - The CPU interrupt associated to the IRQ
+ *
+ * Returned Value:
+ *   The IRQ associated with such CPU interrupt or CPUINT_UNASSIGNED if
+ *   IRQ is not yet assigned to a CPU interrupt.
+ *
+ ****************************************************************************/
+
+int esp32s3_getirq(int cpu, int cpuint);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }