diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 942bf92260..0d92c4fa1d 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -2158,7 +2158,7 @@ config STM32_SDADC3 config STM32_COMP bool "COMP" default n - depends on STM32_STM32L15XX + depends on STM32_STM32L15XX || STM32_STM32F33XX config STM32_COMP1 bool "COMP1" @@ -2310,10 +2310,43 @@ config STM32_HASH default n depends on STM32_STM32F207 || STM32_STM32F4XXX +config HRTIM + bool "HRTIM" + default n + config STM32_HRTIM1 bool "HRTIM1" default n depends on STM32_HAVE_HRTIM1 + select HRTIM + +if STM32_HRTIM1 + +config STM32_HRTIM_MASTER + bool "HRTIM MASTER" + default n + +config STM32_HRTIM_TIMA + bool "HRTIM TIMA" + default n + +config STM32_HRTIM_TIMB + bool "HRTIM TIMB" + default n + +config STM32_HRTIM_TIMC + bool "HRTIM TIMC" + default n + +config STM32_HRTIM_TIMD + bool "HRTIM TIMD" + default n + +config STM32_HRTIM_TIME + bool "HRTIM TIME" + default n + +endif # STM32_HRTIM config STM32_I2C1 bool "I2C1" @@ -2455,7 +2488,7 @@ config STM32_SPI6 config STM32_SYSCFG bool "SYSCFG" default y - depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F4XXX || STM32_CONNECTIVITYLINE + depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F33XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F4XXX || STM32_CONNECTIVITYLINE config STM32_TIM1 bool "TIM1" @@ -5755,6 +5788,507 @@ config STM32_TIM14_CAP endmenu # Timer Configuration +menu "HRTIM Configuration" + +if STM32_HRTIM1 + +config STM32_HRTIM_DISABLE_CHARDRV + bool "HRTIM Disable Character Driver" + default n + +menuconfig STM32_HRTIM_ADC + bool "HRTIM ADC Configuration" + default n + +if STM32_HRTIM_ADC + +config STM32_HRTIM_ADC_TRG1 + bool "HRTIM ADC Trigger 1" + default n + +config STM32_HRTIM_ADC_TRG2 + bool "HRTIM ADC Trigger 2" + default n + +config STM32_HRTIM_ADC_TRG3 + bool "HRTIM ADC Trigger 3" + default n + +config STM32_HRTIM_ADC_TRG4 + bool "HRTIM ADC Trigger 4" + default n + +endif # STM32_HRTIM_ADC + +config STM32_HRTIM_DAC + bool "HRTIM DAC Triggering" + default n + +config STM32_HRTIM_PWM + bool "HRTIM PWM Outputs" + default n + +config STM32_HRTIM_CAP + bool "HRTIM Capture" + default n + +config STM32_HRTIM_INTERRUPTS + bool "HRTIM Interrupts" + default n + +config STM32_HRTIM_BURST + bool "HRTIM Burst Mode" + depends on STM32_HRTIM_PWM + default n + +config STM32_HRTIM_DEADTIME + bool "HRTIM Dead-time" + depends on STM32_HRTIM_PWM + default n + +config STM32_HRTIM_DMA + bool "HRTIM DMA" + default n + +config STM32_HRTIM_DMABURST + bool "HRTIM DMA Burst" + default n + +config STM32_HRTIM_CHOPPER + bool "HRTIM Chopper" + depends on STM32_HRTIM_PWM + default n + +config STM32_HRTIM_AUTODELAY + bool "HRTIM Autodelay" + depends on STM32_HRTIM_PWM + default n + +menuconfig STM32_HRTIM_EVENTS + bool "HRTIM Events Configuration" + default n + +if STM32_HRTIM_EVENTS + +config STM32_HRTIM_EEV1 + bool "HRTIM EEV1" + default n + +config STM32_HRTIM_EEV2 + bool "HRTIM EEV2" + default n + +config STM32_HRTIM_EEV3 + bool "HRTIM EEV3" + default n + +config STM32_HRTIM_EEV4 + bool "HRTIM EEV4" + default n + +config STM32_HRTIM_EEV5 + bool "HRTIM EEV5" + default n + +config STM32_HRTIM_EEV6 + bool "HRTIM EEV6" + default n + +config STM32_HRTIM_EEV7 + bool "HRTIM EEV7" + default n + +config STM32_HRTIM_EEV8 + bool "HRTIM EEV8" + default n + +config STM32_HRTIM_EEV9 + bool "HRTIM EEV9" + default n + +config STM32_HRTIM_EEV10 + bool "HRTIM EEV10" + default n + +endif # STM32_HRTIM_EVENTS + +menuconfig STM32_HRTIM_FAULTS + bool "HRTIM Faults Configuration" + default n + +if STM32_HRTIM_FAULTS + +config STM32_HRTIM_FAULT1 + bool "HRTIM Fault 1" + default n + +config STM32_HRTIM_FAULT2 + bool "HRTIM Fault 2" + default n + +config STM32_HRTIM_FAULT3 + bool "HRTIM Fault 3" + default n + +config STM32_HRTIM_FAULT4 + bool "HRTIM Fault 4" + default n + +endif # STM32_HRTIM_FAULTS + +config STM32_HRTIM_CLK_FROM_PLL + bool "HRTIM Clock from PLL" + default n + +menu "HRTIM Master Configuration" + depends on STM32_HRTIM_MASTER + +config STM32_HRTIM_MASTER_DAC + bool "HRTIM Master DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_MASTER_DMA + bool "HRTIM MASTER DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_MASTER_IRQ + bool "HRTIM MASTER Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +endmenu # "HRTIM Master Configuration" + +menu "HRTIM Timer A Configuration" + depends on STM32_HRTIM_TIMA + +config STM32_HRTIM_TIMA_CAP + bool "HRTIM TIMA Capture" + default n + depends on STM32_HRTIM_CAPTURE + +config STM32_HRTIM_TIMA_DAC + bool "HRTIM TIMA DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_TIMA_DMA + bool "HRTIM TIMA DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_TIMA_IRQ + bool "HRTIM TIMA Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +config STM32_HRTIM_TIMA_PWM + bool "HRTIM TIMA PWM Outputs" + default n + depends on STM32_HRTIM_PWM + +config STM32_HRTIM_TIMA_PWM_CH1 + bool "HRTIM TIMA PWM Output 1" + default n + depends on STM32_HRTIM_TIMA_PWM + +config STM32_HRTIM_TIMA_PWM_CH2 + bool "HRTIM TIMA PWM Output 2" + default n + depends on STM32_HRTIM_TIMA_PWM + +config STM32_HRTIM_TIMA_BURST + bool "HRTIM TIMA Burst" + default n + depends on (STM32_HRTIM_BURST && STM32_HRTIM_TIMA_PWM) + +config STM32_HRTIM_TIMA_BURST_CH1 + bool "HRTIM TIMA Output 1 Burst Mode" + default n + depends on (STM32_HRTIM_TIMA_BURST && STM32_HRTIM_TIMA_PWM_CH1) + +config STM32_HRTIM_TIMA_BURST_CH2 + bool "HRTIM TIMA Output 2 Burst Mode" + default n + depends on (STM32_HRTIM_TIMA_BURST && STM32_HRTIM_TIMA_PWM_CH2) + +config STM32_HRTIM_TIMA_CHOP + bool "HRTIM TIMA PWM Chopper" + default n + depends on (STM32_HRTIM_CHOPPER && STM32_HRTIM_TIMA_PWM) + +config STM32_HRTIM_TIMA_DT + bool "HRTIM TIMA PWM Dead-time" + default n + depends on (STM32_HRTIM_DEADTIME && STM32_HRTIM_TIMA_PWM) + +endmenu # "HRTIM Timer A Configuration" + +menu "HRTIM Timer B Configuration" + depends on STM32_HRTIM_TIMB + +config STM32_HRTIM_TIMB_CAP + bool "HRTIM TIMB Capture" + default n + depends on STM32_HRTIM_CAPTURE + +config STM32_HRTIM_TIMB_DAC + bool "HRTIM TIMB DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_TIMB_DMA + bool "HRTIM TIMB DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_TIMB_IRQ + bool "HRTIM TIMB Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +config STM32_HRTIM_TIMB_PWM + bool "HRTIM TIMB PWM Outputs" + default n + depends on STM32_HRTIM_PWM + +config STM32_HRTIM_TIMB_PWM_CH1 + bool "HRTIM TIMB PWM Output 1" + default n + depends on STM32_HRTIM_TIMB_PWM + +config STM32_HRTIM_TIMB_PWM_CH2 + bool "HRTIM TIMB PWM Output 2" + default n + depends on STM32_HRTIM_TIMB_PWM + +config STM32_HRTIM_TIMB_BURST + bool "HRTIM TIMB Burst" + default n + depends on (STM32_HRTIM_BURST && STM32_HRTIM_TIMB_PWM) + +config STM32_HRTIM_TIMB_BURST_CH1 + bool "HRTIM TIMB Output 1 Burst Mode" + default n + depends on (STM32_HRTIM_TIMB_BURST && STM32_HRTIM_TIMB_PWM_CH1) + +config STM32_HRTIM_TIMB_BURST_CH2 + bool "HRTIM TIMB Output 2 Burst Mode" + default n + depends on (STM32_HRTIM_TIMB_BURST && STM32_HRTIM_TIMB_PWM_CH2) + +config STM32_HRTIM_TIMB_CHOP + bool "HRTIM TIMB PWM Chopper" + default n + depends on (STM32_HRTIM_CHOPPER && STM32_HRTIM_TIMB_PWM) + +config STM32_HRTIM_TIMB_DT + bool "HRTIM TIMB PWM Dead-time" + default n + depends on (STM32_HRTIM_DEADTIME && STM32_HRTIM_TIMB_PWM) + +endmenu # "HRTIM Timer B Configuration" + +menu "HRTIM Timer C Configuration" + depends on STM32_HRTIM_TIMC + +config STM32_HRTIM_TIMC_CAP + bool "HRTIM TIMC Capture" + default n + depends on STM32_HRTIM_CAPTURE + +config STM32_HRTIM_TIMC_DAC + bool "HRTIM TIMC DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_TIMC_DMA + bool "HRTIM TIMC DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_TIMC_IRQ + bool "HRTIM TIMC Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +config STM32_HRTIM_TIMC_PWM + bool "HRTIM TIMC PWM Outputs" + default n + depends on STM32_HRTIM_PWM + +config STM32_HRTIM_TIMC_PWM_CH1 + bool "HRTIM TIMC PWM Output 1" + default n + depends on STM32_HRTIM_TIMC_PWM + +config STM32_HRTIM_TIMC_PWM_CH2 + bool "HRTIM TIMC PWM Output 2" + default n + depends on STM32_HRTIM_TIMC_PWM + +config STM32_HRTIM_TIMC_BURST + bool "HRTIM TIMC Burst" + default n + depends on (STM32_HRTIM_BURST && STM32_HRTIM_TIMC_PWM) + +config STM32_HRTIM_TIMC_BURST_CH1 + bool "HRTIM TIMC Output 1 Burst Mode" + default n + depends on (STM32_HRTIM_TIMC_BURST && STM32_HRTIM_TIMC_PWM_CH1) + +config STM32_HRTIM_TIMC_BURST_CH2 + bool "HRTIM TIMC Output 2 Burst Mode" + default n + depends on (STM32_HRTIM_TIMC_BURST && STM32_HRTIM_TIMC_PWM_CH2) + +config STM32_HRTIM_TIMC_CHOP + bool "HRTIM TIMC PWM Chopper" + default n + depends on (STM32_HRTIM_CHOPPER && STM32_HRTIM_TIMC_PWM) + +config STM32_HRTIM_TIMC_DT + bool "HRTIM TIMC PWM Dead-time" + default n + depends on (STM32_HRTIM_DEADTIME && STM32_HRTIM_TIMC_PWM) + +endmenu # "HRTIM Timer C Configuration" + +menu "HRTIM Timer D Configuration" + depends on STM32_HRTIM_TIMD + +config STM32_HRTIM_TIMD_CAP + bool "HRTIM TIMD Capture" + default n + depends on STM32_HRTIM_CAPTURE + +config STM32_HRTIM_TIMD_DAC + bool "HRTIM TIMD DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_TIMD_DMA + bool "HRTIM TIMD DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_TIMD_IRQ + bool "HRTIM TIMD Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +config STM32_HRTIM_TIMD_PWM + bool "HRTIM TIMD PWM Outputs" + default n + depends on STM32_HRTIM_PWM + +config STM32_HRTIM_TIMD_PWM_CH1 + bool "HRTIM TIMD PWM Output 1" + default n + depends on STM32_HRTIM_TIMD_PWM + +config STM32_HRTIM_TIMD_PWM_CH2 + bool "HRTIM TIMD PWM Output 2" + default n + depends on STM32_HRTIM_TIMD_PWM + +config STM32_HRTIM_TIMD_BURST + bool "HRTIM TIMD Burst" + default n + depends on (STM32_HRTIM_BURST && STM32_HRTIM_TIMD_PWM) + +config STM32_HRTIM_TIMD_BURST_CH1 + bool "HRTIM TIMD Output 1 Burst Mode" + default n + depends on (STM32_HRTIM_TIMD_BURST && STM32_HRTIM_TIMD_PWM_CH1) + +config STM32_HRTIM_TIMD_BURST_CH2 + bool "HRTIM TIMD Output 2 Burst Mode" + default n + depends on (STM32_HRTIM_TIMD_BURST && STM32_HRTIM_TIMD_PWM_CH2) + +config STM32_HRTIM_TIMD_CHOP + bool "HRTIM TIMD PWM Chopper" + default n + depends on (STM32_HRTIM_CHOPPER && STM32_HRTIM_TIMD_PWM) + +config STM32_HRTIM_TIMD_DT + bool "HRTIM TIMD PWM Dead-time" + default n + depends on (STM32_HRTIM_DEADTIME && STM32_HRTIM_TIMD_PWM) + +endmenu # "HRTIM Timer D Configuration" + +menu "HRTIM Timer E Configuration" + depends on STM32_HRTIM_TIME + +config STM32_HRTIM_TIME_CAP + bool "HRTIM TIME Capture" + default n + depends on STM32_HRTIM_CAPTURE + +config STM32_HRTIM_TIME_DAC + bool "HRTIM TIME DAC Triggering" + default n + depends on STM32_HRTIM_DAC + +config STM32_HRTIM_TIME_DMA + bool "HRTIM TIME DMA" + default n + depends on STM32_HRTIM_DMA + +config STM32_HRTIM_TIME_IRQ + bool "HRTIM TIME Interrupts" + default n + depends on STM32_HRTIM_INTERRUPTS + +config STM32_HRTIM_TIME_PWM + bool "HRTIM TIME PWM Outputs" + default n + depends on STM32_HRTIM_PWM + +config STM32_HRTIM_TIME_PWM_CH1 + bool "HRTIM TIME PWM Output 1" + default n + depends on STM32_HRTIM_TIME_PWM + +config STM32_HRTIM_TIME_PWM_CH2 + bool "HRTIM TIME PWM Output 2" + default n + depends on STM32_HRTIM_TIME_PWM + +config STM32_HRTIM_TIME_BURST + bool "HRTIM TIME Burst" + default n + depends on (STM32_HRTIM_BURST && STM32_HRTIM_TIME_PWM) + +config STM32_HRTIM_TIME_BURST_CH1 + bool "HRTIM TIME Output 1 Burst Mode" + default n + depends on (STM32_HRTIM_TIME_BURST && STM32_HRTIM_TIME_PWM_CH1) + +config STM32_HRTIM_TIME_BURST_CH2 + bool "HRTIM TIME Output 2 Burst Mode" + default n + depends on (STM32_HRTIM_TIME_BURST && STM32_HRTIM_TIME_PWM_CH2) + +config STM32_HRTIM_TIME_CHOP + bool "HRTIM TIME PWM Chopper" + default n + depends on (STM32_HRTIM_CHOPPER && STM32_HRTIM_TIME_PWM) + +config STM32_HRTIM_TIME_DT + bool "HRTIM TIME PWM Dead-time" + default n + depends on (STM32_HRTIM_DEADTIME && STM32_HRTIM_TIME_PWM) + +endmenu # "HRTIM Timer E Configuration" + +endif # STM32_HRTIM1 + +endmenu # "HRTIM Configuration" + menu "ADC Configuration" depends on STM32_ADC @@ -5853,12 +6387,30 @@ config STM32_DAC1CH1_DMA_BUFFER_SIZE int "DAC1CH1 DMA buffer size" default 256 +config STM32_DAC1CH1_DMA_EXTERNAL + bool "DAC1CH1 DMA External Trigger" + default n + +if STM32_HRTIM_DAC + +config STM32_DAC1CH1_HRTIM_TRG1 + bool "DAC1CH1 HRTIM Trigger 1" + default n + +config STM32_DAC1CH1_HRTIM_TRG2 + bool "DAC1CH1 HRTIM Trigger 2" + default n + +endif # STM32_HRTIM_DAC + config STM32_DAC1CH1_TIMER int "DAC1CH1 timer" + depends on !STM32_DAC1CH1_DMA_EXTERNAL range 2 8 config STM32_DAC1CH1_TIMER_FREQUENCY int "DAC1CH1 timer frequency" + depends on !STM32_DAC1CH1_DMA_EXTERNAL default 0 endif @@ -5879,12 +6431,30 @@ config STM32_DAC1CH2_DMA_BUFFER_SIZE int "DAC1CH2 DMA buffer size" default 256 +config STM32_DAC1CH2_DMA_EXTERNAL + bool "DAC1CH2 DMA External Trigger" + default n + +if STM32_HRTIM_DAC + +config STM32_DAC1CH2_HRTIM_TRG1 + bool "DAC1CH2 HRTIM Trigger 1" + default n + +config STM32_DAC1CH2_HRTIM_TRG2 + bool "DAC1CH2 HRTIM Trigger 2" + default n + +endif # STM32_HRTIM_DAC + config STM32_DAC1CH2_TIMER int "DAC1CH2 timer" + depends on !STM32_DAC1CH2_DMA_EXTERNAL range 2 8 config STM32_DAC1CH2_TIMER_FREQUENCY int "DAC1CH2 timer frequency" + depends on !STM32_DAC1CH2_DMA_EXTERNAL default 0 endif @@ -5905,13 +6475,27 @@ config STM32_DAC2CH1_DMA_BUFFER_SIZE int "DAC2CH1 DMA buffer size" default 256 +config STM32_DAC2CH1_DMA_EXTERNAL + bool "DAC2CH1 DMA External Trigger" + default n + +if STM32_HRTIM_DAC + +config STM32_DAC2CH1_HRTIM_TRG3 + bool "DAC2CH1 HRTIM Trigger 3" + default n + +endif # STM32_HRTIM_DAC + config STM32_DAC2CH1_TIMER int "DAC2CH1 timer" + depends on !STM32_DAC2CH1_DMA_EXTERNAL default 0 range 2 8 config STM32_DAC2CH1_TIMER_FREQUENCY int "DAC2CH1 timer frequency" + depends on !STM32_DAC2CH1_DMA_EXTERNAL default 0 endif diff --git a/arch/arm/src/stm32/stm32_hrtim.c b/arch/arm/src/stm32/stm32_hrtim.c index 0c121db614..921d549008 100644 --- a/arch/arm/src/stm32/stm32_hrtim.c +++ b/arch/arm/src/stm32/stm32_hrtim.c @@ -59,35 +59,35 @@ #warning "HRTIM UNDER DEVELOPMENT !" -#if defined(CONFIG_STM32_TIMA_PWM) || defined(CONFIG_STM32_HRTIM_TIMA_DAC) || \ +#if defined(CONFIG_STM32_HRTIM_TIMA_PWM) || defined(CONFIG_STM32_HRTIM_TIMA_DAC) || \ defined(CONFIG_STM32_HRTIM_TIMA_CAP) || defined(CONFIG_STM32_HRTIM_TIMA_IRQ) || \ defined(CONFIG_STM32_HRTIM_TIMA_DT) || defined(CONFIG_STM32_HRTIM_TIMA_CHOP) # ifndef CONFIG_STM32_HRTIM_TIMA # error "CONFIG_STM32_HRTIM_TIMA must be set" # endif #endif -#if defined(CONFIG_STM32_TIMB_PWM) || defined(CONFIG_STM32_HRTIM_TIMB_DAC) || \ +#if defined(CONFIG_STM32_HRTIM_TIMB_PWM) || defined(CONFIG_STM32_HRTIM_TIMB_DAC) || \ defined(CONFIG_STM32_HRTIM_TIMB_CAP) || defined(CONFIG_STM32_HRTIM_TIMB_IRQ) || \ defined(CONFIG_STM32_HRTIM_TIMB_DT) || defined(CONFIG_STM32_HRTIM_TIMB_CHOP) # ifndef CONFIG_STM32_HRTIM_TIMB # error "CONFIG_STM32_HRTIM_TIMB must be set" # endif #endif -#if defined(CONFIG_STM32_TIMC_PWM) || defined(CONFIG_STM32_HRTIM_TIMC_DAC) || \ +#if defined(CONFIG_STM32_HRTIM_TIMC_PWM) || defined(CONFIG_STM32_HRTIM_TIMC_DAC) || \ defined(CONFIG_STM32_HRTIM_TIMC_CAP) || defined(CONFIG_STM32_HRTIM_TIMC_IRQ) || \ defined(CONFIG_STM32_HRTIM_TIMC_DT) || defined(CONFIG_STM32_HRTIM_TIMC_CHOP) # ifndef CONFIG_STM32_HRTIM_TIMC # error "CONFIG_STM32_HRTIM_TIMC must be set" # endif #endif -#if defined(CONFIG_STM32_TIMD_PWM) || defined(CONFIG_STM32_HRTIM_TIMD_DAC) || \ +#if defined(CONFIG_STM32_HRTIM_TIMD_PWM) || defined(CONFIG_STM32_HRTIM_TIMD_DAC) || \ defined(CONFIG_STM32_HRTIM_TIMD_CAP) || defined(CONFIG_STM32_HRTIM_TIMD_IRQ) || \ defined(CONFIG_STM32_HRTIM_TIMD_DT) || defined(CONFIG_STM32_HRTIM_TIMD_CHOP) # ifndef CONFIG_STM32_HRTIM_TIMD # error "CONFIG_STM32_HRTIM_TIMD must be set" # endif #endif -#if defined(CONFIG_STM32_TIME_PWM) || defined(CONFIG_STM32_HRTIM_TIME_DAC) || \ +#if defined(CONFIG_STM32_HRTIM_TIME_PWM) || defined(CONFIG_STM32_HRTIM_TIME_DAC) || \ defined(CONFIG_STM32_HRTIM_TIME_CAP) || defined(CONFIG_STM32_HRTIM_TIME_IRQ) || \ defined(CONFIG_STM32_HRTIM_TIME_DT) || defined(CONFIG_STM32_HRTIM_TIME_CHOP) # ifndef CONFIG_STM32_HRTIM_TIME @@ -561,7 +561,7 @@ struct stm32_hrtim_s #ifdef CONFIG_STM32_HRTIM_BURST struct stm32_hrtim_burst_s *burst; /* Burst mode configuration */ #endif -#ifdef CONFIG_STM32_HRTIM_CMN_IRQ +#ifdef CONFIG_STM32_HRTIM_INTERRUPTS uint32_t irq; /* Common interrupts configuration */ #endif }; @@ -1448,7 +1448,7 @@ static struct stm32_hrtim_s g_hrtim1priv = #ifdef CONFIG_STM32_HRTIM_BURST .burst = &g_burst, #endif -#ifdef CONFIG_STM32_HRTIM_CMN_IRQ +#ifdef CONFIG_STM32_HRTIM_INTERRUPTS .irq = HRTIM_IRQ_COMMON, #endif }; diff --git a/configs/stm32f334-disco/powerled/Make.defs b/configs/stm32f334-disco/powerled/Make.defs new file mode 100644 index 0000000000..3f3818dd74 --- /dev/null +++ b/configs/stm32f334-disco/powerled/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f334-disco/powerled/Make.defs +# +# Copyright (C) 2017 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f334-disco/powerled/defconfig b/configs/stm32f334-disco/powerled/defconfig new file mode 100644 index 0000000000..cde38123b1 --- /dev/null +++ b/configs/stm32f334-disco/powerled/defconfig @@ -0,0 +1,125 @@ +CONFIG_ANALOG=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="stm32f334-disco" +CONFIG_ARCH_BOARD_STM32F334_DISCO=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP_STM32F334C8=y +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_FPU is not set +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN_PROXY_STACKSIZE=512 +CONFIG_BUILTIN=y +CONFIG_COMP=y +CONFIG_DAC=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_DEV_NULL is not set +CONFIG_DISABLE_ENVIRON=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_POLL=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DRIVERS_POWERLED=y +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_POWERLED_CURRENT_LIMIT=100 +CONFIG_EXAMPLES_POWERLED_DEVPATH="/dev/powerled0" +CONFIG_EXAMPLES_POWERLED=y +CONFIG_FDCLONE_STDIO=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +# CONFIG_LIBC_LONG_LONG is not set +CONFIG_LIBM=y +CONFIG_MAX_TASKS=4 +CONFIG_MAX_WDOGPARMS=1 +CONFIG_NAME_MAX=16 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_BASENAME=y +CONFIG_NSH_DISABLE_CAT=y +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_CP=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DIRNAME=y +CONFIG_NSH_DISABLE_EXEC=y +CONFIG_NSH_DISABLE_EXIT=y +CONFIG_NSH_DISABLE_GET=y +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_KILL=y +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_MB=y +CONFIG_NSH_DISABLE_MH=y +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_MKRD=y +CONFIG_NSH_DISABLE_MOUNT=y +CONFIG_NSH_DISABLE_MV=y +CONFIG_NSH_DISABLE_MW=y +# CONFIG_NSH_DISABLE_PRINTF is not set +CONFIG_NSH_DISABLE_PUT=y +CONFIG_NSH_DISABLE_PWD=y +CONFIG_NSH_DISABLE_RMDIR=y +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_SET=y +CONFIG_NSH_DISABLE_SH=y +CONFIG_NSH_DISABLE_SLEEP=y +CONFIG_NSH_DISABLE_TEST=y +CONFIG_NSH_DISABLE_TIME=y +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +CONFIG_NSH_DISABLE_UNSET=y +CONFIG_NSH_DISABLE_USLEEP=y +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y +CONFIG_NSH_FILEIOSIZE=256 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_MAXARGUMENTS=16 +CONFIG_NSH_READLINE=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=512 +CONFIG_PREALLOC_TIMERS=2 +CONFIG_PREALLOC_WDOGS=1 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +CONFIG_PTHREAD_STACK_MIN=1024 +CONFIG_RAM_SIZE=12288 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_STM32_COMP4=y +CONFIG_STM32_COMP=y +CONFIG_STM32_DAC1CH1_DMA_BUFFER_SIZE=5 +CONFIG_STM32_DAC1CH1_DMA_EXTERNAL=y +CONFIG_STM32_DAC1CH1_DMA=y +CONFIG_STM32_DAC1CH1=y +CONFIG_STM32_DAC1=y +CONFIG_STM32_DMA1=y +CONFIG_STM32_HRTIM1=y +CONFIG_STM32_HRTIM_BURST=y +CONFIG_STM32_HRTIM_CLK_FROM_PLL=y +CONFIG_STM32_HRTIM_DISABLE_CHARDRV=y +CONFIG_STM32_HRTIM_DMA=y +CONFIG_STM32_HRTIM_EEV2=y +CONFIG_STM32_HRTIM_EVENTS=y +CONFIG_STM32_HRTIM_PWM=y +CONFIG_STM32_HRTIM_TIMC_BURST_CH1=y +CONFIG_STM32_HRTIM_TIMC_BURST=y +CONFIG_STM32_HRTIM_TIMC_DMA=y +CONFIG_STM32_HRTIM_TIMC_PWM_CH1=y +CONFIG_STM32_HRTIM_TIMC_PWM=y +CONFIG_STM32_HRTIM_TIMC=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_PWR=y +CONFIG_STM32_USART2=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=512 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_STACKSIZE=1024 +CONFIG_WDOG_INTRESERVE=0 diff --git a/configs/stm32f334-disco/src/stm32_powerled.c b/configs/stm32f334-disco/src/stm32_powerled.c index 1d37f494ff..0e6e1ed272 100644 --- a/configs/stm32f334-disco/src/stm32_powerled.c +++ b/configs/stm32f334-disco/src/stm32_powerled.c @@ -66,16 +66,16 @@ #if defined(CONFIG_EXAMPLES_POWERLED) && defined(CONFIG_DRIVERS_POWERLED) #if !defined(CONFIG_STM32_HRTIM1) || !defined(CONFIG_HRTIM) -#error "Powerled example requires HRTIM1 support" +# error "Powerled example requires HRTIM1 support" #endif #if !defined(CONFIG_STM32_DAC1CH1) || !defined(CONFIG_DAC) || \ !defined(CONFIG_STM32_DAC1CH1_DMA) -#error "Powerled example requires DAC1 with DMA support" +# error "Powerled example requires DAC1 with DMA support" #endif #if !defined(CONFIG_STM32_COMP4) || !defined(CONFIG_COMP) -#error "Powerled example requires COMP4 support" +# error "Powerled example requires COMP4 support" #endif /**************************************************************************** diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 8d9bb1be89..475e683e75 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -232,6 +232,12 @@ config PM_SLEEPENTER_COUNT endif # PM +config DRIVERS_POWERLED + bool "High Power LED driver" + default n + ---help--- + Enables building of an powerled upper half driver. + menuconfig DRIVERS_SMPS bool "Switched-Mode Power Supply (SMPS)" default n