diff --git a/arch/risc-v/src/esp32c3/esp32c3_partition.c b/arch/risc-v/src/esp32c3/esp32c3_partition.c index c0ae63d9f5..1c9cc78ccb 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_partition.c +++ b/arch/risc-v/src/esp32c3/esp32c3_partition.c @@ -544,7 +544,7 @@ static int esp32c3_part_ioctl(FAR struct mtd_dev_s *dev, int cmd, /**************************************************************************** * Name: esp32c3_partition_init - * + * * Initialize ESP32-C3 partition. Read partition information, and use * these data for creating MTD. * diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig index 978934dda4..6259575c55 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig +++ b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig @@ -10,4 +10,27 @@ config ESP32C3_DEVKIT_RUN_IRAM default n ---help--- +choice + prompt "SPIFLASH File System" + default ESP32C3_SPIFLASH_SMARTFS + depends on ESP32C3_SPIFLASH + + config ESP32C3_SPIFLASH_SMARTFS + bool "SmartFS" + depends on FS_SMARTFS + + config ESP32C3_SPIFLASH_NXFFS + bool "NXFFS" + depends on FS_NXFFS + + config ESP32C3_SPIFLASH_SPIFFS + bool "SPIFFS" + depends on FS_SPIFFS + + config ESP32C3_SPIFLASH_LITTLEFS + bool "LittleFS" + depends on FS_LITTLEFS + +endchoice + endif # ARCH_BOARD_ESP32C3_DEVKIT diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/spiflash/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/spiflash/defconfig new file mode 100644 index 0000000000..5386f3efef --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/spiflash/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-devkit" +CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_CHIP_ESP32C3WROOM02=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_ZERO=y +CONFIG_ESP32C3_MTD_OFFSET=0x110000 +CONFIG_ESP32C3_MTD_SIZE=0xf0000 +CONFIG_ESP32C3_SPIFLASH=y +CONFIG_FS_PROCFS=y +CONFIG_FS_SMARTFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_MAX_TASKS=8 +CONFIG_MTD_SMART=y +CONFIG_NAME_MAX=48 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_LOSMART=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SMARTFS_MAXNAMLEN=48 +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_FLASH_ERASEALL=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_FSTEST=y +CONFIG_TESTING_FSTEST_MOUNTPT="/mnt" +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile index bf0565de90..b216b51ace 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile @@ -34,6 +34,10 @@ endif endif +ifeq ($(CONFIG_ESP32C3_SPIFLASH),y) +CSRCS += esp32c3_spiflash.c +endif + ifeq ($(CONFIG_DEV_GPIO),y) CSRCS += esp32c3_gpio.c endif diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h index 3e8cc79558..08c3ba34e5 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h @@ -135,5 +135,16 @@ int board_tim_init(void); int board_bmp180_initialize(int devno, int busno); #endif +/**************************************************************************** + * Name: esp32c3_spiflash_init + * + * Description: + * Initialize the SPIFLASH and register the MTD device. + ****************************************************************************/ + +#ifdef CONFIG_ESP32C3_SPIFLASH +int esp32c3_spiflash_init(void); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_DEVKIT_SRC_ESP32C3_DEVKIT_H */ diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c index 401eae0835..e0b11e9c7b 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c @@ -88,6 +88,25 @@ int esp32c3_bringup(void) } #endif +#ifdef CONFIG_ESP32C3_SPIFLASH + ret = esp32c3_spiflash_init(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); + return ret; + } +#endif + +#ifdef CONFIG_ESP32C3_PARTITION + ret = esp32c3_partition_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", + ret); + return ret; + } +#endif + #ifdef CONFIG_DEV_GPIO ret = esp32c3_gpio_init(); if (ret < 0) diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c new file mode 100644 index 0000000000..ea7f1df324 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c @@ -0,0 +1,262 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "esp32c3_spiflash.h" +#include "esp32c3-devkit.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32c3_spiflash_init + * + * Description: + * Initialize the SPIFLASH and register the MTD device. + ****************************************************************************/ + +int esp32c3_spiflash_init(void) +{ + FAR struct mtd_dev_s *mtd; + int ret = ERROR; + + mtd = esp32c3_spiflash_alloc_mtdpart(); + +#if defined (CONFIG_ESP32C3_SPIFLASH_SMARTFS) + ret = smart_initialize(0, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing it again.\n"); + ret = smart_initialize(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_NXFFS) + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + +#else + ret = register_mtddriver("/dev/esp32c3flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Register MTD failed: %d\n", ret); + return ret; + } +#endif + + return ret; +} + +/**************************************************************************** + * Name: esp32c3_spiflash_encrypt_test + * + * Description: + * Test ESP32-C3 SPI Flash driver read/write with encryption. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST + +void esp32c3_spiflash_encrypt_test(void) +{ + int i; + int ret; + uint8_t *wbuf; + uint8_t *rbuf; + struct mtd_geometry_s geo; + uint32_t erase_block; + uint32_t erase_nblocks; + uint32_t rw_block; + uint32_t rw_nblocks; + struct mtd_dev_s *mtd = esp32c3_spiflash_get_mtd(); + struct mtd_dev_s *enc_mtd = esp32c3_spiflash_encrypt_get_mtd(); + const uint32_t address = CONFIG_ESP32C3_SPIFLASH_TEST_ADDRESS; + const uint32_t size = 4096; + + ret = MTD_IOCTL(enc_mtd, MTDIOC_GEOMETRY, + (unsigned long)(uintptr_t)&geo); + if (ret < 0) + { + ferr("ERROR: Failed to get GEO errno =%d\n", ret); + DEBUGASSERT(0); + } + + wbuf = kmm_malloc(size); + if (!wbuf) + { + ferr("ERROR: Failed to alloc %d heap\n", size); + DEBUGASSERT(0); + } + + rbuf = kmm_malloc(size); + if (!rbuf) + { + ferr("ERROR: Failed to alloc %d heap\n", size); + DEBUGASSERT(0); + } + + for (i = 0; i < size; i++) + { + wbuf[i] = (uint8_t)random(); + } + + erase_block = address / geo.erasesize; + erase_nblocks = size / geo.erasesize; + + rw_block = address / geo.blocksize; + rw_nblocks = size / geo.blocksize; + + ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks); + if (ret != erase_nblocks) + { + ferr("ERROR: Failed to erase block errno=%d\n", ret); + DEBUGASSERT(0); + } + + ret = MTD_BWRITE(enc_mtd, rw_block, rw_nblocks, wbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to encrypt write errno=%d\n", ret); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to decrypt read errno=%d\n", ret); + DEBUGASSERT(0); + } + + if (memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Encrypted and decrypted data is not same\n"); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to read errno=%d\n", ret); + DEBUGASSERT(0); + } + + if (!memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Encrypted and normal data is same\n"); + DEBUGASSERT(0); + } + + for (i = 0; i < size; i++) + { + wbuf[i] = (uint8_t)random(); + } + + ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks); + if (ret != erase_nblocks) + { + ferr("ERROR: Failed to erase errno=%d\n", ret); + DEBUGASSERT(0); + } + + ret = MTD_BWRITE(mtd, rw_block, rw_nblocks, wbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to write errno=%d\n", ret); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to decrypt read errno=%d\n", ret); + DEBUGASSERT(0); + } + + if (!memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Normal and decrypted data is same\n"); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to read errno=%d\n", ret); + DEBUGASSERT(0); + } + + if (memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Normal and normal data is not same\n"); + DEBUGASSERT(0); + } + + kmm_free(wbuf); + kmm_free(rbuf); + + finfo("INFO: SPI Flash encryption test success\n"); +} + +#endif /* CONFIG_ESP32C3_SPIFLASH_ENCRYPTION_TEST */