From 7d7b8a243b0ceecda239c4d86bf91783fc4c6638 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 11 Apr 2018 18:25:35 -0600 Subject: [PATCH] arch/arm/src/stm32: Back out a small part of the previous commit ... my fault. --- arch/arm/src/stm32/Kconfig | 1 - arch/arm/src/stm32/stm32f30xxx_rcc.c | 5 ++++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 075dd1efe3..3a667731d9 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -7365,7 +7365,6 @@ choice config RTC_LSECLOCK bool "LSE clock" - select STM32_PWR ---help--- Drive the RTC with the LSE clock diff --git a/arch/arm/src/stm32/stm32f30xxx_rcc.c b/arch/arm/src/stm32/stm32f30xxx_rcc.c index a5a6a0e745..a62d6d5bd1 100644 --- a/arch/arm/src/stm32/stm32f30xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f30xxx_rcc.c @@ -662,7 +662,10 @@ static void stm32_stdclockconfig(void) #if defined(CONFIG_RTC_LSECLOCK) /* Normally peripheral clocks are enabled later in bootup, but we need * clock on PWR *now* as without this setting registers that enable LSE - * won't work + * won't work. + * + * NOTE: In this configuration, we can assume the CONFIG_STM32_PWR has + * been selected. */ regval = getreg32(STM32_RCC_APB1ENR);