cmake:sync arm sub arch CMake scripts missing sources

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
This commit is contained in:
xuxin19 2024-09-05 20:41:42 +08:00 committed by Xiang Xiao
parent 4667163152
commit 7def0983f6
4 changed files with 48 additions and 12 deletions

View file

@ -0,0 +1,45 @@
# ##############################################################################
# arch/arm/src/arm/CMakeLists.txt
#
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
# license agreements. See the NOTICE file distributed with this work for
# additional information regarding copyright ownership. The ASF licenses this
# file to you under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
# the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations under
# the License.
#
# ##############################################################################
set(SRCS arm_head.S)
list(
APPEND
SRCS
arm_dataabort.c
arm_doirq.c
arm_initialstate.c
arm_prefetchabort.c
arm_schedulesigaction.c
arm_sigdeliver.c
arm_syscall.c
arm_tcbinfo.c
arm_undefinedinsn.c
arm_cache.S
arm_vectors.S
arm_vectortab.S
arm_saveusercontext.S)
if(CONFIG_PAGING)
list(APPEND SRCS arm_pginitialize.c arm_checkmapping.c arm_allocpage.c
arm_va2pte.c)
endif()
target_sources(arch PRIVATE ${SRCS})

View file

@ -46,12 +46,9 @@ list(
arm_syscall.c
arm_tcbinfo.c
arm_undefinedinsn.c
arm_perf.c
cp15_cacheops.c)
if(CONFIG_ARCH_PERF_EVENTS)
list(APPEND SRCS arm_perf.c)
endif()
if(CONFIG_ARMV7A_GICv2M)
list(APPEND SRCS arm_gicv2m.c)
endif()

View file

@ -32,6 +32,7 @@ set(SRCS
arm_initialstate.c
arm_itm.c
arm_memfault.c
arm_perf.c
arm_schedulesigaction.c
arm_sigdeliver.c
arm_svcall.c
@ -41,10 +42,6 @@ set(SRCS
arm_usagefault.c
arm_vectors.c)
if(CONFIG_ARCH_PERF_EVENTS)
list(APPEND SRCS arm_perf.c)
endif()
if(CONFIG_ARMV7M_SYSTICK)
list(APPEND SRCS arm_systick.c)
endif()

View file

@ -30,6 +30,7 @@ set(SRCS
arm_initialstate.c
arm_itm.c
arm_memfault.c
arm_perf.c
arm_sau.c
arm_schedulesigaction.c
arm_securefault.c
@ -42,10 +43,6 @@ set(SRCS
arm_usagefault.c
arm_vectors.c)
if(CONFIG_ARCH_PERF_EVENTS)
list(APPEND SRCS arm_perf.c)
endif()
if(CONFIG_ARMV8M_SYSTICK)
list(APPEND SRCS arm_systick.c)
endif()