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arch/armv8-a: new config to set SPIs Configuration to edge-triggered

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Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default

Signed-off-by: chao an <anchao@lixiang.com>
This commit is contained in:
chao an 2024-10-14 12:27:22 +08:00 • committed by Xiang Xiao
parent 3e2e2132ca
commit 83c483c1b4
2 changed files with 18 additions and 0 deletions
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10
arch/arm64/Kconfig
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@ -353,6 +353,16 @@ config ARM64_GICV2_LEGACY_IRQ0
endif
if ARM64_GIC_VERSION = 3
config ARM64_GICV3_SPI_EDGE
bool "Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default"
default n
---help---
Configure all SPIs(Shared Peripheral Interrupts) as edge-triggered by default.
endif
config ARM64_SEMIHOSTING_HOSTFS
bool "Semihosting HostFS"
depends on FS_HOSTFS

8
arch/arm64/src/common/arm64_gicv3.c
View file

@ -607,7 +607,15 @@ static void gicv3_dist_init(void)
intid += GIC_NUM_CFG_PER_REG)
{
idx = intid / GIC_NUM_CFG_PER_REG;
#ifdef CONFIG_ARM64_GICV3_SPI_EDGE
/* Configure all SPIs as edge-triggered by default */
putreg32(0xaaaaaaaa, ICFGR(base, idx));
#else
/* Configure all SPIs as level-sensitive by default */
putreg32(0, ICFGR(base, idx));
#endif
}
/* TODO: Some arrch64 Cortex-A core maybe without security state