From 8a157d7514b2e088b659acdd83d2964d670e4bec Mon Sep 17 00:00:00 2001 From: Jukka Laitinen Date: Wed, 13 Aug 2025 14:26:17 +0300 Subject: [PATCH] arch/arm64_schedulesigaction.c: Fix signal delivery in EL1 when MMU is enabled When delivering a signal to a kernel task, or in CONFIG_BUILD_FLAT with MMU enabled, the REG_SCTLR_EL1 needs to be stored for exception return. Otherwise 0 is restored to the register at exception return, MMU is switched off and the system crashes. Signed-off-by: Jukka Laitinen --- arch/arm64/src/common/arm64_schedulesigaction.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/src/common/arm64_schedulesigaction.c b/arch/arm64/src/common/arm64_schedulesigaction.c index a143a05bb8..26b0217406 100644 --- a/arch/arm64/src/common/arm64_schedulesigaction.c +++ b/arch/arm64/src/common/arm64_schedulesigaction.c @@ -72,7 +72,8 @@ static void arm64_init_signal_process(struct tcb_s *tcb, uint64_t *regs) tcb->xcp.regs[REG_SP_EL0] = regs[REG_SP_ELX] - XCPTCONTEXT_SIZE * 2; #endif tcb->xcp.regs[REG_SP_ELX] = regs[REG_SP_ELX] - XCPTCONTEXT_SIZE; - tcb->xcp.regs[REG_EXE_DEPTH] = 1; + tcb->xcp.regs[REG_EXE_DEPTH] = 1; + tcb->xcp.regs[REG_SCTLR_EL1] = regs[REG_SCTLR_EL1]; } /****************************************************************************