From 8ceff0dc5a2ee461cec268827df49ae0f49dbb10 Mon Sep 17 00:00:00 2001 From: raiden00pl Date: Wed, 12 Jul 2023 10:08:54 +0200 Subject: [PATCH] arm/stm32h7: Add STM32H745 family --- arch/arm/include/stm32h7/chip.h | 6 +- arch/arm/include/stm32h7/irq.h | 2 + arch/arm/include/stm32h7/stm32h7x5xx_irq.h | 210 ++++++++++++++++++ arch/arm/src/stm32h7/Kconfig | 89 ++++++++ arch/arm/src/stm32h7/hardware/stm32_dmamux.h | 2 + .../arm/src/stm32h7/hardware/stm32_ethernet.h | 4 +- arch/arm/src/stm32h7/hardware/stm32_exti.h | 5 +- arch/arm/src/stm32h7/hardware/stm32_flash.h | 2 + arch/arm/src/stm32h7/hardware/stm32_gpio.h | 2 + arch/arm/src/stm32h7/hardware/stm32_i2c.h | 2 + .../src/stm32h7/hardware/stm32_memorymap.h | 2 + arch/arm/src/stm32h7/hardware/stm32_pinmap.h | 2 + arch/arm/src/stm32h7/hardware/stm32_pwr.h | 2 + arch/arm/src/stm32h7/hardware/stm32_rcc.h | 2 + arch/arm/src/stm32h7/hardware/stm32_sdmmc.h | 2 + arch/arm/src/stm32h7/hardware/stm32_spi.h | 2 + arch/arm/src/stm32h7/hardware/stm32_syscfg.h | 2 + arch/arm/src/stm32h7/hardware/stm32_uart.h | 2 + .../src/stm32h7/hardware/stm32h7x3xx_gpio.h | 5 +- .../src/stm32h7/hardware/stm32h7x3xx_pinmap.h | 5 +- .../src/stm32h7/hardware/stm32h7x3xx_spi.h | 5 +- .../src/stm32h7/hardware/stm32h7x3xx_uart.h | 5 +- arch/arm/src/stm32h7/stm32_exti_gpio.c | 5 +- arch/arm/src/stm32h7/stm32_gpio.c | 5 +- arch/arm/src/stm32h7/stm32_rcc.c | 2 + 25 files changed, 362 insertions(+), 10 deletions(-) create mode 100644 arch/arm/include/stm32h7/stm32h7x5xx_irq.h diff --git a/arch/arm/include/stm32h7/chip.h b/arch/arm/include/stm32h7/chip.h index 4a317516f4..f0b38971ef 100644 --- a/arch/arm/include/stm32h7/chip.h +++ b/arch/arm/include/stm32h7/chip.h @@ -71,7 +71,9 @@ defined (CONFIG_ARCH_CHIP_STM32H753VI) || \ defined (CONFIG_ARCH_CHIP_STM32H753XI) || \ defined (CONFIG_ARCH_CHIP_STM32H753ZI) || \ - defined (CONFIG_ARCH_CHIP_STM32H7B3LI) + defined (CONFIG_ARCH_CHIP_STM32H7B3LI) || \ + defined (CONFIG_ARCH_CHIP_STM32H745XI) || \ + defined (CONFIG_ARCH_CHIP_STM32H745ZI) #elif defined(CONFIG_ARCH_CHIP_STM32H747XI) #else # error STM32 H7 chip not identified @@ -79,7 +81,7 @@ /* Size SRAM */ -#if defined(CONFIG_STM32H7_STM32H7X3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X5XX) /* Memory */ # define STM32H7_SRAM_SIZE (512*1024) /* 512Kb SRAM on AXI bus Matrix (D1) */ diff --git a/arch/arm/include/stm32h7/irq.h b/arch/arm/include/stm32h7/irq.h index e35f97d6d0..a6582a4b36 100644 --- a/arch/arm/include/stm32h7/irq.h +++ b/arch/arm/include/stm32h7/irq.h @@ -71,6 +71,8 @@ # include #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include #else diff --git a/arch/arm/include/stm32h7/stm32h7x5xx_irq.h b/arch/arm/include/stm32h7/stm32h7x5xx_irq.h new file mode 100644 index 0000000000..539a064c5d --- /dev/null +++ b/arch/arm/include/stm32h7/stm32h7x5xx_irq.h @@ -0,0 +1,210 @@ +/**************************************************************************** + * arch/arm/include/stm32h7/stm32h7x5xx_irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* This file should never be included directly but, rather, + * only indirectly through arch/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_STM32H7_STM32H7X5XX_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Prototypes + ****************************************************************************/ + +/* IRQ numbers. + * The IRQ number corresponds vector number and hence map directly to bits + * in the NVIC. + * This does, however, waste several words of memory in the IRQ to handle + * mapping tables. + * + * Processor Exceptions (vectors 0-15). These common definitions can be + * found in the file nuttx/arch/arm/include/stm32h7/irq.h which includes + * this file + * + * External interrupts (vectors >= 16) + */ + +#define STM32_IRQ_WWDG1 (STM32_IRQ_FIRST + 0) /* 0: Window Watchdog interrupt */ +#define STM32_IRQ_PVDPVM (STM32_IRQ_FIRST + 1) /* 1: PVD through EXTI line detection interrupt */ +#define STM32_IRQ_RTC (STM32_IRQ_FIRST + 2) /* 2: RTC tamper, timestamp */ +#define STM32_IRQ_CSSLSE (STM32_IRQ_FIRST + 2) /* 2: CSS LSE */ +#define STM32_IRQ_RTCWKUP (STM32_IRQ_FIRST + 3) /* 3: RTC Wakeup interrupt through the EXTI line */ +#define STM32_IRQ_FLASH (STM32_IRQ_FIRST + 4) /* 4: Flash memory global interrupt */ +#define STM32_IRQ_RCC (STM32_IRQ_FIRST + 5) /* 5: RCC global interrupt */ +#define STM32_IRQ_EXTI0 (STM32_IRQ_FIRST + 6) /* 6: EXTI Line 0 interrupt */ +#define STM32_IRQ_EXTI1 (STM32_IRQ_FIRST + 7) /* 7: EXTI Line 1 interrupt */ +#define STM32_IRQ_EXTI2 (STM32_IRQ_FIRST + 8) /* 8: EXTI Line 2 interrupt */ +#define STM32_IRQ_EXTI3 (STM32_IRQ_FIRST + 9) /* 9: EXTI Line 3 interrupt */ +#define STM32_IRQ_EXTI4 (STM32_IRQ_FIRST + 10) /* 10: EXTI Line 4 interrupt */ +#define STM32_IRQ_DMA1S0 (STM32_IRQ_FIRST + 11) /* 11: DMA1 Stream0 global interrupt */ +#define STM32_IRQ_DMA1S1 (STM32_IRQ_FIRST + 12) /* 12: DMA1 Stream1 global interrupt */ +#define STM32_IRQ_DMA1S2 (STM32_IRQ_FIRST + 13) /* 13: DMA1 Stream2 global interrupt */ +#define STM32_IRQ_DMA1S3 (STM32_IRQ_FIRST + 14) /* 14: DMA1 Stream3 global interrupt */ +#define STM32_IRQ_DMA1S4 (STM32_IRQ_FIRST + 15) /* 15: DMA1 Stream4 global interrupt */ +#define STM32_IRQ_DMA1S5 (STM32_IRQ_FIRST + 16) /* 16: DMA1 Stream5 global interrupt */ +#define STM32_IRQ_DMA1S6 (STM32_IRQ_FIRST + 17) /* 17: DMA1 Stream6 global interrupt */ +#define STM32_IRQ_ADC12 (STM32_IRQ_FIRST + 18) /* 18: ADC1 and ADC2 global interrupt */ +#define STM32_IRQ_FDCAN1_0 (STM32_IRQ_FIRST + 19) /* 19: FDCAN1 Interrupt 0 */ +#define STM32_IRQ_FDCAN2_0 (STM32_IRQ_FIRST + 20) /* 20: FDCAN2 Interrupt 0 */ +#define STM32_IRQ_FDCAN1_1 (STM32_IRQ_FIRST + 21) /* 21: FDCAN1 Interrupt 1 */ +#define STM32_IRQ_FDCAN2_1 (STM32_IRQ_FIRST + 22) /* 22: FDCAN2 Interrupt 1 */ +#define STM32_IRQ_EXTI95 (STM32_IRQ_FIRST + 23) /* 23: EXTI Line[9:5] interrupts */ +#define STM32_IRQ_TIM1BRK (STM32_IRQ_FIRST + 24) /* 24: TIM1 break interrupt */ +#define STM32_IRQ_TIM1UP (STM32_IRQ_FIRST + 25) /* 25: TIM1 update interrupt */ +#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_FIRST + 26) /* 26: TIM1 trigger and commutation interrupts */ +#define STM32_IRQ_TIMCC (STM32_IRQ_FIRST + 27) /* 27: TIM1 capture / compare interrupt */ +#define STM32_IRQ_TIM2 (STM32_IRQ_FIRST + 28) /* 28: TIM2 global interrupt */ +#define STM32_IRQ_TIM3 (STM32_IRQ_FIRST + 29) /* 29: TIM3 global interrupt */ +#define STM32_IRQ_TIM4 (STM32_IRQ_FIRST + 30) /* 30: TIM4 global interrupt */ +#define STM32_IRQ_I2C1EV (STM32_IRQ_FIRST + 31) /* 31: I2C1 event interrupt */ +#define STM32_IRQ_I2C1ER (STM32_IRQ_FIRST + 32) /* 32: I2C1 error interrupt */ +#define STM32_IRQ_I2C2EV (STM32_IRQ_FIRST + 33) /* 33: I2C2 event interrupt */ +#define STM32_IRQ_I2C2ER (STM32_IRQ_FIRST + 34) /* 34: I2C2 error interrupt */ +#define STM32_IRQ_SPI1 (STM32_IRQ_FIRST + 35) /* 35: SPI1 global interrupt */ +#define STM32_IRQ_SPI2 (STM32_IRQ_FIRST + 36) /* 36: SPI2 global interrupt */ +#define STM32_IRQ_USART1 (STM32_IRQ_FIRST + 37) /* 37: USART1 global interrupt */ +#define STM32_IRQ_USART2 (STM32_IRQ_FIRST + 38) /* 38: USART2 global interrupt */ +#define STM32_IRQ_USART3 (STM32_IRQ_FIRST + 39) /* 39: USART3 global interrupt */ +#define STM32_IRQ_EXTI1510 (STM32_IRQ_FIRST + 40) /* 40: EXTI Line[15:10] interrupts */ +#define STM32_IRQ_RTCALARM (STM32_IRQ_FIRST + 41) /* 41: RTC alarms (A and B) through EXTI Line interrupts */ +#define STM32_IRQ_RESERVED42 (STM32_IRQ_FIRST + 42) /* 42: Reserved */ +#define STM32_IRQ_TIM8BRK (STM32_IRQ_FIRST + 43) /* 43: TIM8 break interrupt */ +#define STM32_IRQ_TIM12 (STM32_IRQ_FIRST + 43) /* 43: TIM12 global interrupt */ +#define STM32_IRQ_TIM8UP (STM32_IRQ_FIRST + 44) /* 44: TIM8 update interrupt */ +#define STM32_IRQ_TIM13 (STM32_IRQ_FIRST + 44) /* 44: TIM13 global interrupt */ +#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_FIRST + 45) /* 45: TIM8 trigger /commutation interrupt */ +#define STM32_IRQ_TIM14 (STM32_IRQ_FIRST + 45) /* 45: TIM14 global interrupts */ +#define STM32_IRQ_TIM8CC (STM32_IRQ_FIRST + 46) /* 46: TIM8 capture / compare interrupts */ +#define STM32_IRQ_DMA1S7 (STM32_IRQ_FIRST + 47) /* 47: DMA1 Stream7 global interrupt */ +#define STM32_IRQ_FMC (STM32_IRQ_FIRST + 48) /* 48: FMC global interrupt */ +#define STM32_IRQ_SDMMC1 (STM32_IRQ_FIRST + 49) /* 49: SDMMC1 global interrupt */ +#define STM32_IRQ_TIM5 (STM32_IRQ_FIRST + 50) /* 50: TIM5 global interrupt */ +#define STM32_IRQ_SPI3 (STM32_IRQ_FIRST + 51) /* 51: SPI3 global interrupt */ +#define STM32_IRQ_UART4 (STM32_IRQ_FIRST + 52) /* 52: UART4 global interrupt */ +#define STM32_IRQ_UART5 (STM32_IRQ_FIRST + 53) /* 53: UART5 global interrupt */ +#define STM32_IRQ_TIM6 (STM32_IRQ_FIRST + 54) /* 54: TIM6 global interrupt */ +#define STM32_IRQ_DAC1 (STM32_IRQ_FIRST + 54) /* 54: DAC1 underrun error interrupt */ +#define STM32_IRQ_TIM7 (STM32_IRQ_FIRST + 55) /* 55: TIM7 global interrupt */ +#define STM32_IRQ_DMA2S0 (STM32_IRQ_FIRST + 56) /* 56: DMA2 Stream0 interrupt */ +#define STM32_IRQ_DMA2S1 (STM32_IRQ_FIRST + 57) /* 57: DMA2 Stream1 interrupt */ +#define STM32_IRQ_DMA2S2 (STM32_IRQ_FIRST + 58) /* 58: FMA2 Stream2 interrupt */ +#define STM32_IRQ_DMA2S3 (STM32_IRQ_FIRST + 59) /* 59: DMA2 Stream3 interrupt */ +#define STM32_IRQ_DMA2S4 (STM32_IRQ_FIRST + 60) /* 60: DMA2 Stream4 interrupt */ +#define STM32_IRQ_ETH (STM32_IRQ_FIRST + 61) /* 61: Ethernet global interrupt */ +#define STM32_IRQ_ETHWKUP (STM32_IRQ_FIRST + 62) /* 62: Ethernet wakeup through EXTI line interrupt */ +#define STM32_IRQ_FDCANCAL (STM32_IRQ_FIRST + 63) /* 63: CAN2TX interrupts */ +#define STM32_IRQ_RESERVED64 (STM32_IRQ_FIRST + 64) /* 64: Reserved */ +#define STM32_IRQ_RESERVED65 (STM32_IRQ_FIRST + 65) /* 65: Reserved */ +#define STM32_IRQ_RESERVED66 (STM32_IRQ_FIRST + 66) /* 66: Reserved */ +#define STM32_IRQ_RESERVED67 (STM32_IRQ_FIRST + 67) /* 67: Reserved */ +#define STM32_IRQ_DMA2S5 (STM32_IRQ_FIRST + 68) /* 68: DMA2 Stream5 interrupt */ +#define STM32_IRQ_DMA2S6 (STM32_IRQ_FIRST + 69) /* 69: DMA2 Stream6 interrupt */ +#define STM32_IRQ_DMA2S7 (STM32_IRQ_FIRST + 70) /* 70: DMA2 Stream7 interrupt */ +#define STM32_IRQ_USART6 (STM32_IRQ_FIRST + 71) /* 71: USART6 global interrupt */ +#define STM32_IRQ_I2C3EV (STM32_IRQ_FIRST + 72) /* 72: I2C3 event interrupt */ +#define STM32_IRQ_I2C3ER (STM32_IRQ_FIRST + 73) /* 73: I2C3 error interrupt*/ +#define STM32_IRQ_OTGHS_EP1OUT (STM32_IRQ_FIRST + 74) /* 74: OTG_HS out global interrupt */ +#define STM32_IRQ_OTGHS_EP1IN (STM32_IRQ_FIRST + 75) /* 75: OTG_HS in global interrupt */ +#define STM32_IRQ_OTGHS_WKUP (STM32_IRQ_FIRST + 76) /* 76: OTG_HS wakeup interrupt */ +#define STM32_IRQ_OTGHS (STM32_IRQ_FIRST + 77) /* 77: OTG_HS global interrupt */ +#define STM32_IRQ_DCMI (STM32_IRQ_FIRST + 78) /* 78: DCMI global interrupt */ +#define STM32_IRQ_CRYP (STM32_IRQ_FIRST + 79) /* 79: CRYP global interrupt */ +#define STM32_IRQ_HASH (STM32_IRQ_FIRST + 80) /* 80: HASH global interrupt */ +#define STM32_IRQ_RNG (STM32_IRQ_FIRST + 80) /* 80: RNG global interrupt */ +#define STM32_IRQ_FPU (STM32_IRQ_FIRST + 81) /* 81: CPU FPU */ +#define STM32_IRQ_UART7 (STM32_IRQ_FIRST + 82) /* 82: UART7 global interrupt */ +#define STM32_IRQ_UART8 (STM32_IRQ_FIRST + 83) /* 83: UART8 global interrupt */ +#define STM32_IRQ_SPI4 (STM32_IRQ_FIRST + 84) /* 84: SPI4 global interrupt */ +#define STM32_IRQ_SPI5 (STM32_IRQ_FIRST + 85) /* 85: SPI5 global interrupt */ +#define STM32_IRQ_SPI6 (STM32_IRQ_FIRST + 86) /* 86: SPI6 global interrupt */ +#define STM32_IRQ_SAI1 (STM32_IRQ_FIRST + 87) /* 87: SAI1 global interrupt */ +#define STM32_IRQ_LTDC (STM32_IRQ_FIRST + 88) /* 88: LCD-TFT global interrupt */ +#define STM32_IRQ_LTDCER (STM32_IRQ_FIRST + 89) /* 89: LCD-TFT error interrupt */ +#define STM32_IRQ_DMA2D (STM32_IRQ_FIRST + 90) /* 90: DMA2D global interrupt */ +#define STM32_IRQ_SAI2 (STM32_IRQ_FIRST + 91) /* 91: SAI2 global interrupt */ +#define STM32_IRQ_QUADSPI (STM32_IRQ_FIRST + 92) /* 92: QuadSPI global interrupt */ +#define STM32_IRQ_LPTIM1 (STM32_IRQ_FIRST + 93) /* 93: LPTIM1 global interrupt */ +#define STM32_IRQ_CEC (STM32_IRQ_FIRST + 94) /* 94: HDMI-CEC global interrupt */ +#define STM32_IRQ_I2C4EV (STM32_IRQ_FIRST + 95) /* 95: I2C4 event interrupt */ +#define STM32_IRQ_I2C4ER (STM32_IRQ_FIRST + 96) /* 96: I2C4 error interrupt */ +#define STM32_IRQ_SPDIF (STM32_IRQ_FIRST + 97) /* 97: SPDIFRX global interrupt */ +#define STM32_IRQ_OTGFS_EP1OUT (STM32_IRQ_FIRST + 98) /* 98: OTG_FS out global interrupt */ +#define STM32_IRQ_OTGFS_EP1IN (STM32_IRQ_FIRST + 99) /* 99: OTG_FS in global interrupt */ +#define STM32_IRQ_OTGFS_WKUP (STM32_IRQ_FIRST + 100) /* 100: OTG_FS wakeup */ +#define STM32_IRQ_OTGFS (STM32_IRQ_FIRST + 101) /* 101: OTG_FS global interrupt */ +#define STM32_IRQ_DMAMUX1OV (STM32_IRQ_FIRST + 102) /* 102: DMAMUX1 overrun interrupt */ +#define STM32_IRQ_HRTIM1MST (STM32_IRQ_FIRST + 103) /* 103: HRTIM1 master timer interrupt */ +#define STM32_IRQ_HRTIM1TIMA (STM32_IRQ_FIRST + 104) /* 104: HRTIM1 timer A interrupt */ +#define STM32_IRQ_HRTIMTIMB (STM32_IRQ_FIRST + 105) /* 105: HRTIM1 timer B interrupt */ +#define STM32_IRQ_HRTIM1TIMC (STM32_IRQ_FIRST + 106) /* 106: HRTIM1 timer C interrupt */ +#define STM32_IRQ_HRTIM1TIMD (STM32_IRQ_FIRST + 107) /* 107: HRTIM1 timer D interrupt */ +#define STM32_IRQ_HRTIMTIME (STM32_IRQ_FIRST + 108) /* 108: HRTIM1 timer E interrupt */ +#define STM32_IRQ_HRTIM1FLT (STM32_IRQ_FIRST + 109) /* 109: HRTIM1 fault interrupt */ +#define STM32_IRQ_DFSDM1FLT0 (STM32_IRQ_FIRST + 110) /* 110: DFSDM1 filter 0 interrupt */ +#define STM32_IRQ_DFSDM1FLT1 (STM32_IRQ_FIRST + 111) /* 111: DFSDM1 filter 1 interrupt */ +#define STM32_IRQ_DFSDM1FLT2 (STM32_IRQ_FIRST + 112) /* 112: DFSDM1 filter 2 interrupt */ +#define STM32_IRQ_DFSDM1FLT3 (STM32_IRQ_FIRST + 113) /* 113: DFSDM1 filter 3 interrupt */ +#define STM32_IRQ_SAI3 (STM32_IRQ_FIRST + 114) /* 114: SAI3 global interrupt */ +#define STM32_IRQ_SWPMI1 (STM32_IRQ_FIRST + 115) /* 115: SWPMI global interrupt/wakeup */ +#define STM32_IRQ_TIM15 (STM32_IRQ_FIRST + 116) /* 116: TIM15 global interrupt */ +#define STM32_IRQ_TIM16 (STM32_IRQ_FIRST + 117) /* 117: TIM16 global interrupt */ +#define STM32_IRQ_TIM17 (STM32_IRQ_FIRST + 118) /* 118: TIM17 global interrupt */ +#define STM32_IRQ_MDIOSWKUP (STM32_IRQ_FIRST + 119) /* 119: MDIOS wakeup */ +#define STM32_IRQ_MDIOS (STM32_IRQ_FIRST + 120) /* 120: MDIOS global interrupt */ +#define STM32_IRQ_JPEG (STM32_IRQ_FIRST + 121) /* 121: JPEG global interrupt */ +#define STM32_IRQ_MDMA (STM32_IRQ_FIRST + 122) /* 122: MDMA */ +#define STM32_IRQ_RESERVED123 (STM32_IRQ_FIRST + 123) /* 123: Reserved */ +#define STM32_IRQ_SDMMC2 (STM32_IRQ_FIRST + 124) /* 124: SDMMC2 global interrupt */ +#define STM32_IRQ_HSEM0 (STM32_IRQ_FIRST + 125) /* 125: HSEM global interrupt 1 */ +#define STM32_IRQ_RESERVED126 (STM32_IRQ_FIRST + 126) /* 126: Reserved */ +#define STM32_IRQ_ADC3 (STM32_IRQ_FIRST + 127) /* 127: ADC3 global interrupt */ +#define STM32_IRQ_DMAMUX2OVR (STM32_IRQ_FIRST + 128) /* 128: DMAMUX2 overrun interrupt */ +#define STM32_IRQ_BDMACH1 (STM32_IRQ_FIRST + 129) /* 129: BDMA channel 1 interrupt */ +#define STM32_IRQ_BDMACH2 (STM32_IRQ_FIRST + 130) /* 130: BDMA channel 2 interrupt */ +#define STM32_IRQ_BDMACH3 (STM32_IRQ_FIRST + 131) /* 131: BDMA channel 3 interrupt */ +#define STM32_IRQ_BDMACH4 (STM32_IRQ_FIRST + 132) /* 132: BDMA channel 4 interrupt */ +#define STM32_IRQ_BDMACH5 (STM32_IRQ_FIRST + 133) /* 133: BDMA channel 5 interrupt */ +#define STM32_IRQ_BDMACH6 (STM32_IRQ_FIRST + 134) /* 134: BDMA channel 6 interrupt */ +#define STM32_IRQ_BDMACH7 (STM32_IRQ_FIRST + 135) /* 135: BDMA channel 7 interrupt */ +#define STM32_IRQ_BDMACH8 (STM32_IRQ_FIRST + 136) /* 136: BDMA channel 8 interrupt */ +#define STM32_IRQ_COMP (STM32_IRQ_FIRST + 137) /* 137: COMP1 and COMP2 exti_comp1_wkup global interrupt */ +#define STM32_IRQ_LPTIM2 (STM32_IRQ_FIRST + 138) /* 138: LPTIM2 timer interrupt */ +#define STM32_IRQ_LPTIM3 (STM32_IRQ_FIRST + 139) /* 139: LPTIM2 timer interrupt */ +#define STM32_IRQ_LPTIM4 (STM32_IRQ_FIRST + 140) /* 140: LPTIM2 timer interrupt */ +#define STM32_IRQ_LPTIM5 (STM32_IRQ_FIRST + 141) /* 141: LPTIM2 timer interrupt */ +#define STM32_IRQ_LPUART (STM32_IRQ_FIRST + 142) /* 142: LPUART global interrupt */ +#define STM32_IRQ_WWDG1RST (STM32_IRQ_FIRST + 143) /* 143: Window Watchdog interrupt */ +#define STM32_IRQ_CRS (STM32_IRQ_FIRST + 144) /* 144: Clock Recovery System global interrupt */ +#define STM32_IRQ_RESERVED145 (STM32_IRQ_FIRST + 145) /* 145: Reserved */ +#define STM32_IRQ_SAI4 (STM32_IRQ_FIRST + 146) /* 146: SAI4 global interrupt */ +#define STM32_IRQ_RESERVED147 (STM32_IRQ_FIRST + 147) /* 147: Reserved */ +#define STM32_IRQ_RESERVED148 (STM32_IRQ_FIRST + 148) /* 148: Reserved */ +#define STM32_IRQ_WKUP (STM32_IRQ_FIRST + 149) /* 149: WKUP1 to WKUP6 pins */ + +#define STM32_IRQ_NEXTINTS 150 +#define NR_IRQS (STM32_IRQ_FIRST + STM32_IRQ_NEXTINTS) + +#endif /* __ARCH_ARM_INCLUDE_STM32H7_STM32H7X5XX_IRQ_H */ diff --git a/arch/arm/src/stm32h7/Kconfig b/arch/arm/src/stm32h7/Kconfig index 191f912db2..7177fcb2ee 100644 --- a/arch/arm/src/stm32h7/Kconfig +++ b/arch/arm/src/stm32h7/Kconfig @@ -142,6 +142,78 @@ config ARCH_CHIP_STM32H743ZI STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM, LQFP144 +config ARCH_CHIP_STM32H745BG + bool "STM32H745BG" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_G + select STM32H7_IO_CONFIG_B + ---help--- + STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM, + LQFP208 + +config ARCH_CHIP_STM32H745BI + bool "STM32H745BI" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_I + select STM32H7_IO_CONFIG_B + ---help--- + STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM, + LQFP208 + +config ARCH_CHIP_STM32H745IG + bool "STM32H745IG" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_G + select STM32H7_IO_CONFIG_I + ---help--- + STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM, + LQFP176 or UFBGA176 + +config ARCH_CHIP_STM32H745II + bool "STM32H745II" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_I + select STM32H7_IO_CONFIG_I + ---help--- + STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM, + LQFP176 or UFBGA176 + +config ARCH_CHIP_STM32H745XG + bool "STM32H745XG" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_G + select STM32H7_IO_CONFIG_X + ---help--- + STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM, + TFBGA240 + +config ARCH_CHIP_STM32H745XI + bool "STM32H745XI" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_I + select STM32H7_IO_CONFIG_X + ---help--- + STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM, + TFBGA240 + +config ARCH_CHIP_STM32H745ZG + bool "STM32H745ZG" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_G + select STM32H7_IO_CONFIG_Z + ---help--- + STM32 H7 Cortex M7, 1024 Kb FLASH, 1024K Kb SRAM, + LQFP144 + +config ARCH_CHIP_STM32H745ZI + bool "STM32H745ZI" + select STM32H7_STM32H7X5XX + select STM32H7_FLASH_CONFIG_I + select STM32H7_IO_CONFIG_Z + ---help--- + STM32 H7 Cortex M7, 2048 Kb FLASH, 1024K Kb SRAM, + LQFP144 + config ARCH_CHIP_STM32H747XI bool "STM32H747XI" select STM32H7_STM32H7X7XX @@ -301,6 +373,23 @@ config STM32H7_STM32H7B3XX select STM32H7_HAVE_SPI5 if !STM32H7_IO_CONFIG_V select STM32H7_HAVE_SPI6 +config STM32H7_STM32H7X5XX + bool + default n + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32H7_HAVE_ETHERNET + select STM32H7_HAVE_FMC + select STM32H7_HAVE_GPIOF if !STM32H7_IO_CONFIG_V + select STM32H7_HAVE_GPIOG if !STM32H7_IO_CONFIG_V + select STM32H7_HAVE_SPI4 + select STM32H7_HAVE_SPI5 if !STM32H7_IO_CONFIG_V + select STM32H7_HAVE_SPI6 + config STM32H7_STM32H7X7XX bool default n diff --git a/arch/arm/src/stm32h7/hardware/stm32_dmamux.h b/arch/arm/src/stm32h7/hardware/stm32_dmamux.h index 74d35c5799..f00f6f6321 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_dmamux.h +++ b/arch/arm/src/stm32h7/hardware/stm32_dmamux.h @@ -205,6 +205,8 @@ # include "hardware/stm32h7x3xx_dmamux.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_dmamux.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_dmamux.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_dmamux.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_ethernet.h b/arch/arm/src/stm32h7/hardware/stm32_ethernet.h index 5ed1e6c008..ce5e72c5d1 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_ethernet.h +++ b/arch/arm/src/stm32h7/hardware/stm32_ethernet.h @@ -31,7 +31,9 @@ * families */ -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/hardware/stm32_exti.h b/arch/arm/src/stm32h7/hardware/stm32_exti.h index 7c6f2bd6f5..fda6790e81 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_exti.h +++ b/arch/arm/src/stm32h7/hardware/stm32_exti.h @@ -33,7 +33,10 @@ * families */ -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/hardware/stm32_flash.h b/arch/arm/src/stm32h7/hardware/stm32_flash.h index ff722521ec..fc5b1a869a 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_flash.h +++ b/arch/arm/src/stm32h7/hardware/stm32_flash.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_flash.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7b3xx_flash.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_flash.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_flash.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_gpio.h b/arch/arm/src/stm32h7/hardware/stm32_gpio.h index d12816951d..74350654e2 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_gpio.h +++ b/arch/arm/src/stm32h7/hardware/stm32_gpio.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_gpio.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_gpio.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_gpio.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_gpio.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_i2c.h b/arch/arm/src/stm32h7/hardware/stm32_i2c.h index 77d5602102..4d17cfc4de 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_i2c.h +++ b/arch/arm/src/stm32h7/hardware/stm32_i2c.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_i2c.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_i2c.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_i2c.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_i2c.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_memorymap.h b/arch/arm/src/stm32h7/hardware/stm32_memorymap.h index faeeecca57..c162ed731a 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_memorymap.h +++ b/arch/arm/src/stm32h7/hardware/stm32_memorymap.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_memorymap.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_memorymap.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_memorymap.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_memorymap.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_pinmap.h b/arch/arm/src/stm32h7/hardware/stm32_pinmap.h index 8d139982a8..e3c1a241d2 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_pinmap.h +++ b/arch/arm/src/stm32h7/hardware/stm32_pinmap.h @@ -43,6 +43,8 @@ # include "hardware/stm32h7x3xx_pinmap.h" # elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_pinmap.h" +# elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_pinmap.h" # elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_pinmap.h" # else diff --git a/arch/arm/src/stm32h7/hardware/stm32_pwr.h b/arch/arm/src/stm32h7/hardware/stm32_pwr.h index b603780a4e..8f7ffe9522 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_pwr.h +++ b/arch/arm/src/stm32h7/hardware/stm32_pwr.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_pwr.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_pwr.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_pwr.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_pwr.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_rcc.h b/arch/arm/src/stm32h7/hardware/stm32_rcc.h index 9c33b46002..61527969f0 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_rcc.h +++ b/arch/arm/src/stm32h7/hardware/stm32_rcc.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_rcc.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_rcc.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_rcc.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_rcc.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_sdmmc.h b/arch/arm/src/stm32h7/hardware/stm32_sdmmc.h index 40649e49cc..b40ecc4a28 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_sdmmc.h +++ b/arch/arm/src/stm32h7/hardware/stm32_sdmmc.h @@ -32,6 +32,8 @@ # include "stm32h7x3xx_sdmmc.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "stm32h7x3xx_sdmmc.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "stm32h7x3xx_sdmmc.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "stm32h7x3xx_sdmmc.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_spi.h b/arch/arm/src/stm32h7/hardware/stm32_spi.h index d8adb5b0ee..a16cd81fb6 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_spi.h +++ b/arch/arm/src/stm32h7/hardware/stm32_spi.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_spi.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_spi.h" +#elif defined(CONFIG_STM32H7_STM32H7X3XX) +# include "hardware/stm32h7x3xx_spi.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_spi.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_syscfg.h b/arch/arm/src/stm32h7/hardware/stm32_syscfg.h index a047afa39b..9d9ca16dbe 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_syscfg.h +++ b/arch/arm/src/stm32h7/hardware/stm32_syscfg.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_syscfg.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_syscfg.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_syscfg.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_syscfg.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32_uart.h b/arch/arm/src/stm32h7/hardware/stm32_uart.h index 7323a412f7..f1677f194a 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_uart.h +++ b/arch/arm/src/stm32h7/hardware/stm32_uart.h @@ -32,6 +32,8 @@ # include "hardware/stm32h7x3xx_uart.h" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "hardware/stm32h7x3xx_uart.h" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "hardware/stm32h7x3xx_uart.h" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "hardware/stm32h7x3xx_uart.h" #else diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h index 4591235978..cf6449cba1 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h @@ -28,7 +28,10 @@ #include #include -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h index 8b7c76b73e..a483a2157d 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h @@ -29,7 +29,10 @@ #include "stm32_gpio.h" -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h index 2a55696007..8a3fd1a70d 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_spi.h @@ -27,7 +27,10 @@ #include -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_uart.h b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_uart.h index cedfe52172..579f070c02 100644 --- a/arch/arm/src/stm32h7/hardware/stm32h7x3xx_uart.h +++ b/arch/arm/src/stm32h7/hardware/stm32h7x3xx_uart.h @@ -29,7 +29,10 @@ #include "chip.h" #include "hardware/stm32_memorymap.h" -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32h7/stm32_exti_gpio.c b/arch/arm/src/stm32h7/stm32_exti_gpio.c index 2fbcc9f55e..d73d64bd69 100644 --- a/arch/arm/src/stm32h7/stm32_exti_gpio.c +++ b/arch/arm/src/stm32h7/stm32_exti_gpio.c @@ -42,7 +42,10 @@ * families */ -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) /**************************************************************************** * Private Types diff --git a/arch/arm/src/stm32h7/stm32_gpio.c b/arch/arm/src/stm32h7/stm32_gpio.c index f20f9f8d61..71cabaa6d4 100644 --- a/arch/arm/src/stm32h7/stm32_gpio.c +++ b/arch/arm/src/stm32h7/stm32_gpio.c @@ -41,7 +41,10 @@ * families */ -#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X7XX) || defined(CONFIG_STM32H7_STM32H7B3XX) +#if defined(CONFIG_STM32H7_STM32H7X3XX) || \ + defined(CONFIG_STM32H7_STM32H7B3XX) || \ + defined(CONFIG_STM32H7_STM32H7X5XX) || \ + defined(CONFIG_STM32H7_STM32H7X7XX) #if defined(CONFIG_STM32H7_USE_LEGACY_PINMAP) # pragma message "CONFIG_STM32H7_USE_LEGACY_PINMAP will be deprecated migrate board.h see tools/stm32_pinmap_tool.py" diff --git a/arch/arm/src/stm32h7/stm32_rcc.c b/arch/arm/src/stm32h7/stm32_rcc.c index 39d5ad0b02..924d5a2999 100644 --- a/arch/arm/src/stm32h7/stm32_rcc.c +++ b/arch/arm/src/stm32h7/stm32_rcc.c @@ -58,6 +58,8 @@ # include "stm32h7x3xx_rcc.c" #elif defined(CONFIG_STM32H7_STM32H7B3XX) # include "stm32h7x3xx_rcc.c" +#elif defined(CONFIG_STM32H7_STM32H7X5XX) +# include "stm32h7x3xx_rcc.c" #elif defined(CONFIG_STM32H7_STM32H7X7XX) # include "stm32h7x7xx_rcc.c" #else