diff --git a/boards/arm/stm32/nucleo-l152re/src/stm32_ili93418b.c b/boards/arm/stm32/nucleo-l152re/src/stm32_ili93418b.c index 0b5ae9d488..6f2b9d74d8 100644 --- a/boards/arm/stm32/nucleo-l152re/src/stm32_ili93418b.c +++ b/boards/arm/stm32/nucleo-l152re/src/stm32_ili93418b.c @@ -70,11 +70,8 @@ * ByPass_Mode: 1 (Memory) */ -#define STM32_ILI9341_IFMODE_PARAM ((!ILI9341_INTERFACE_CONTROL_EPL) | \ - ILI9341_INTERFACE_CONTROL_DPL | \ - (!ILI9341_INTERFACE_CONTROL_HSPL) | \ - (!ILI9341_INTERFACE_CONTROL_VSPL) | \ - ILI9341_INTERFACE_CONTROL_RCM(2) | \ +#define STM32_ILI9341_IFMODE_PARAM (ILI9341_INTERFACE_CONTROL_DPL | \ + ILI9341_INTERFACE_CONTROL_RCM(2) | \ ILI9341_INTERFACE_CONTROL_BPASS) /* Interface control (IFCTL) @@ -87,11 +84,7 @@ * WEMODE: 1 Reset column and page if data transfer exceeds */ -#define STM32_ILI9341_IFCTL_PARAM1 (ILI9341_INTERFACE_CONTROL_WEMODE | \ - !ILI9341_INTERFACE_CONTROL_BGREOR | \ - !ILI9341_INTERFACE_CONTROL_MVEOR | \ - !ILI9341_INTERFACE_CONTROL_MXEOR | \ - !ILI9341_INTERFACE_CONTROL_MYEOR) +#define STM32_ILI9341_IFCTL_PARAM1 (ILI9341_INTERFACE_CONTROL_WEMODE) /* Parameter 2: 0x0000 * @@ -110,10 +103,8 @@ * RIM: 0 18-bit 1 transfer/pixel RGB interface mode * */ -#define STM32_ILI9341_IFCTL_PARAM3 ((!ILI9341_INTERFACE_CONTROL_RIM) | \ - ILI9341_INTERFACE_CONTROL_RM | \ - ILI9341_INTERFACE_CONTROL_DM(1) | \ - (!ILI9341_INTERFACE_CONTROL_ENDIAN)) +#define STM32_ILI9341_IFCTL_PARAM3 (ILI9341_INTERFACE_CONTROL_RM | \ + ILI9341_INTERFACE_CONTROL_DM(1)) /* LCD CONTROL */ diff --git a/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c b/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c index d84882b089..5820ea759e 100644 --- a/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c +++ b/boards/arm/stm32/stm32f429i-disco/src/stm32_lcd.c @@ -79,10 +79,7 @@ * ByPass_Mode: 1 (Memory) */ -#define STM32_ILI9341_IFMODE_PARAM ((!ILI9341_INTERFACE_CONTROL_EPL) | \ - ILI9341_INTERFACE_CONTROL_DPL | \ - (!ILI9341_INTERFACE_CONTROL_HSPL) | \ - (!ILI9341_INTERFACE_CONTROL_VSPL) | \ +#define STM32_ILI9341_IFMODE_PARAM (ILI9341_INTERFACE_CONTROL_DPL | \ ILI9341_INTERFACE_CONTROL_RCM(2) | \ ILI9341_INTERFACE_CONTROL_BPASS) @@ -96,11 +93,7 @@ * WEMODE: 1 Reset column and page if data transfer exceeds */ -#define STM32_ILI9341_IFCTL_PARAM1 (ILI9341_INTERFACE_CONTROL_WEMODE | \ - !ILI9341_INTERFACE_CONTROL_BGREOR | \ - !ILI9341_INTERFACE_CONTROL_MVEOR | \ - !ILI9341_INTERFACE_CONTROL_MXEOR | \ - !ILI9341_INTERFACE_CONTROL_MYEOR) +#define STM32_ILI9341_IFCTL_PARAM1 (ILI9341_INTERFACE_CONTROL_WEMODE) /* Parameter 2: 0x0000 * @@ -119,10 +112,8 @@ * RIM: 0 18-bit 1 transfer/pixel RGB interface mode * */ -#define STM32_ILI9341_IFCTL_PARAM3 ((!ILI9341_INTERFACE_CONTROL_RIM) | \ - ILI9341_INTERFACE_CONTROL_RM | \ - ILI9341_INTERFACE_CONTROL_DM(1) | \ - (!ILI9341_INTERFACE_CONTROL_ENDIAN)) +#define STM32_ILI9341_IFCTL_PARAM3 (ILI9341_INTERFACE_CONTROL_RM | \ + ILI9341_INTERFACE_CONTROL_DM(1)) /* Memory access control (MADCTL) */