From 9122c3e44dd973c18eeef7e4e392bf19a2ff5006 Mon Sep 17 00:00:00 2001 From: anjiahao Date: Fri, 10 May 2024 16:57:34 +0800 Subject: [PATCH] mps:Supplement the interrupt definition about nvic Signed-off-by: anjiahao Signed-off-by: ligd --- arch/arm/include/mps/chip.h | 2 ++ arch/arm/src/mps/mps_irq.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/mps/chip.h b/arch/arm/include/mps/chip.h index 84d89e5a71..b1a4d2a7b4 100644 --- a/arch/arm/include/mps/chip.h +++ b/arch/arm/include/mps/chip.h @@ -32,6 +32,8 @@ ****************************************************************************/ #define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [7:5] set in minimum priority */ +#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ +#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between priorities */ /**************************************************************************** * Public Types diff --git a/arch/arm/src/mps/mps_irq.h b/arch/arm/src/mps/mps_irq.h index 26d5e9c8f7..8d696db16f 100644 --- a/arch/arm/src/mps/mps_irq.h +++ b/arch/arm/src/mps/mps_irq.h @@ -50,8 +50,6 @@ #define MPS_IRQ_FIRST (16) /* Vector number of the first external interrupt */ -#define NVIC_SYSH_PRIORITY_DEFAULT (0x80) /* Midpoint is the default */ - #ifndef __ASSEMBLY__ #undef EXTERN