From 9c3799f13067b48fe5b1f8ed3d6fc67e31aa3d8a Mon Sep 17 00:00:00 2001 From: Sara Souza Date: Thu, 15 Jul 2021 18:12:51 -0300 Subject: [PATCH] xtensa/esp32-s2: Adds GPIO board logic to esp32s2-saola-1. --- .../esp32s2-saola-1/configs/gpio/defconfig | 49 ++ .../esp32s2/esp32s2-saola-1/include/board.h | 2 +- .../esp32s2/esp32s2-saola-1/src/Make.defs | 4 + .../esp32s2-saola-1/src/esp32s2-saola-1.h | 16 + .../esp32s2-saola-1/src/esp32s2_gpio.c | 460 ++++++++++++++++++ 5 files changed, 530 insertions(+), 1 deletion(-) create mode 100644 boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig create mode 100644 boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig new file mode 100644 index 0000000000..2110e150ab --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32s2-saola-1" +CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y +CONFIG_ARCH_CHIP="esp32s2" +CONFIG_ARCH_CHIP_ESP32S2=y +CONFIG_ARCH_CHIP_ESP32S2WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DEV_GPIO=y +CONFIG_ESP32S2_DATA_CACHE_0KB=y +CONFIG_ESP32S2_GPIO_IRQ=y +CONFIG_ESP32S2_UART0=y +CONFIG_EXAMPLES_GPIO=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h b/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h index be5ecb0cdb..9c0880fb6e 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h @@ -74,7 +74,7 @@ /* GPIO pins used by the GPIO Subsystem */ -#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */ +#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */ #define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */ #define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs b/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs index cf1df5706b..2cea2d8af8 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs @@ -30,6 +30,10 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += esp32s2_appinit.c endif +ifeq ($(CONFIG_DEV_GPIO),y) +CSRCS += esp32s2_gpio.c +endif + SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32s2.template.ld SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32s2_out.ld diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h index c51409441d..fad196f5be 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h @@ -69,5 +69,21 @@ int esp32s2_bringup(void); +/**************************************************************************** + * Name: esp32s2_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_GPIO +int esp32s2_gpio_init(void); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_XTENSA_ESP32S2_ESP32S2_SAOLA_1_SRC_ESP32S2_SAOLA_1_H */ diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c new file mode 100644 index 0000000000..0017404196 --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c @@ -0,0 +1,460 @@ +/**************************************************************************** + * boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include + +#include "esp32s2-saola-1.h" +#include "esp32s2_gpio.h" +#include "hardware/esp32s2_gpio_sigmap.h" + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Pin 1 and 2 are used for this example as GPIO outputs. */ + +#define GPIO_OUT1 1 +#define GPIO_OUT2 2 +#define GPIO_IN1 4 + +#if !defined(CONFIG_ESP32S2_GPIO_IRQ) && BOARD_NGPIOINT > 0 +# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled" +#endif + +/* Interrupt pins. GPIO9 is used as an example, any other inputs could be + * used. + */ + +#define GPIO_IRQPIN 9 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2gpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct esp32s2gpint_dev_s +{ + struct esp32s2gpio_dev_s esp32s2gpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_write(FAR struct gpio_dev_s *dev, bool value); +#endif + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value); +#endif + +#if BOARD_NGPIOINT > 0 +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_OUT1, GPIO_OUT2 +}; + +static struct esp32s2gpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOIN > 0 +static const struct gpio_operations_s gpin_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpioinputs[BOARD_NGPIOIN] = +{ + GPIO_IN1 +}; + +static struct esp32s2gpio_dev_s g_gpin[BOARD_NGPIOIN]; +#endif + +#if BOARD_NGPIOINT > 0 +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_IRQPIN, +}; + +static struct esp32s2gpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpout_read + * + * Description: + * Read a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL && value != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = esp32s2_gpioread(g_gpiooutputs[esp32s2gpio->id]); + return OK; +} + +/**************************************************************************** + * Name: gpout_write + * + * Description: + * Write to a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - The value to be written. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpout_write(FAR struct gpio_dev_s *dev, bool value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + esp32s2_gpiowrite(g_gpiooutputs[esp32s2gpio->id], value); + return OK; +} +#endif + +/**************************************************************************** + * Name: gpin_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL && value != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOIN); + gpioinfo("Reading...\n"); + + *value = esp32s2_gpioread(g_gpioinputs[esp32s2gpio->id]); + return OK; +} +#endif + +/**************************************************************************** + * Name: esp32s2gpio_interrupt + * + * Description: + * Digital Input ISR. + * + ****************************************************************************/ + +#if BOARD_NGPIOINT > 0 +static int esp32s2gpio_interrupt(int irq, void *context, void *arg) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)arg; + + DEBUGASSERT(esp32s2gpint != NULL && esp32s2gpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", esp32s2gpint->callback); + + esp32s2gpint->callback(&esp32s2gpint->esp32s2gpio.gpio, + esp32s2gpint->esp32s2gpio.id); + return OK; +} + +/**************************************************************************** + * Name: gpint_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + + DEBUGASSERT(esp32s2gpint != NULL && value != NULL); + DEBUGASSERT(esp32s2gpint->esp32s2gpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = esp32s2_gpioread(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + return OK; +} + +/**************************************************************************** + * Name: gpint_attach + * + * Description: + * Attach the ISR to IRQ and register the callback. But it still doesn't + * enable interrupt yet. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * callback - User callback function. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + int ret; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + esp32s2_gpioirqdisable(irq); + ret = irq_attach(irq, + esp32s2gpio_interrupt, + &g_gpint[esp32s2gpint->esp32s2gpio.id]); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret); + return ret; + } + + gpioinfo("Attach %p\n", callback); + esp32s2gpint->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: gpint_enable + * + * Description: + * Enable/Disable interrupt. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * enable - True to enable, false to disable. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + + if (enable) + { + if (esp32s2gpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + esp32s2_gpioirqenable(irq, RISING); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + esp32s2_gpioirqdisable(irq); + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_gpio_init + * + * Description: + * Initialize all pins. Function should be called from the bringup. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp32s2_gpio_init(void) +{ +#if BOARD_NGPIOOUT > 0 + for (int i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, i); + + /* Configure the pins that will be used as output */ + + esp32s2_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); + esp32s2_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_1 | + INPUT_FUNCTION_1); + esp32s2_gpiowrite(g_gpiooutputs[i], 0); + } +#endif + +#if BOARD_NGPIOIN > 0 + for (int i = 0; i < BOARD_NGPIOIN; i++) + { + /* Setup and register the GPIO pin */ + + g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN_PULLDOWN; + g_gpin[i].gpio.gp_ops = &gpin_ops; + g_gpin[i].id = i; + gpio_pin_register(&g_gpin[i].gpio, i); + + /* Configure the pins that will be used as interrupt input */ + + esp32s2_configgpio(g_gpioinputs[i], INPUT_FUNCTION_1 | PULLDOWN); + } +#endif + +#if BOARD_NGPIOINT > 0 + for (int i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].esp32s2gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].esp32s2gpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].esp32s2gpio.id = i; + gpio_pin_register(&g_gpint[i].esp32s2gpio.gpio, i); + + /* Configure the pins that will be used as interrupt input */ + + esp32s2_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_1 | PULLDOWN); + } +#endif + + return OK; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */