luchianmihai/walnux
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

xtensa/isa: fix build break if compiler without ISA - XCHAL_HAVE_THREADPTR support

Browse source 
common/xtensa_context.S: Assembler messages:
common/xtensa_context.S:134: Error: invalid register number (231) for 'rur' instruction
common/xtensa_context.S:283: Error: invalid register number (231) for 'wur' instruction
clang-10: error: Xtensa-as command failed with exit code 1 (use -v to see invocation)
make[1]: *** [Makefile:143: xtensa_context.o] Error 1
make[1]: *** Waiting for unfinished jobs....

Signed-off-by: chao an <anchao.archer@bytedance.com>
This commit is contained in:
chao an 2025-07-19 15:50:50 +08:00 • committed by Alin Jerpelea
parent 7807109524
commit 9e53aab5b3
3 changed files with 15 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
arch/xtensa/include/irq.h
View file

@ -94,9 +94,16 @@
#define REG_SAR (18)
#define REG_EXCCAUSE (19)
#define REG_EXCVADDR (20)
#define REG_THREADPTR (21)
#define _REG_EXTRA_START (22)
#ifdef CONFIG_SCHED_THREAD_LOCAL
# ifndef XCHAL_HAVE_THREADPTR || XCHAL_HAVE_THREADPTR == 0
# error architecture-specific TLS depends on ISA THREADPTR(Thread Porinter)
# endif
# define REG_THREADPTR (21)
# define _REG_EXTRA_START (22)
#else
# define _REG_EXTRA_START (21)
#endif
#if XCHAL_HAVE_S32C1I != 0
# define REG_SCOMPARE1 (_REG_EXTRA_START + 0)

4
arch/xtensa/src/common/xtensa_context.S
View file

@ -131,8 +131,10 @@ _xtensa_context_save:
s32i a15, sp, (4 * REG_A15)
#endif
#ifdef CONFIG_SCHED_THREAD_LOCAL
rur a3, THREADPTR
s32i a3, sp, (4 * REG_THREADPTR)
#endif
rsr a3, SAR
s32i a3, sp, (4 * REG_SAR)
@ -279,8 +281,10 @@ _xtensa_context_restore:
wsr a3, SCOMPARE1
#endif
#ifdef CONFIG_SCHED_THREAD_LOCAL
l32i a3, a2, (4 * REG_THREADPTR)
wur a3, THREADPTR
#endif
l32i a3, a2, (4 * REG_SAR)
wsr a3, SAR

2
arch/xtensa/src/common/xtensa_saveusercontext.c
View file

@ -79,8 +79,10 @@ int up_saveusercontext(void *saveregs)
" s32i a14, %0, (4 * " STRINGIFY(REG_A14) ")\n"
" s32i a15, %0, (4 * " STRINGIFY(REG_A15) ")\n"
#endif
#ifdef CONFIG_SCHED_THREAD_LOCAL
" rur a2, THREADPTR\n"
" s32i a2, %0, (4 * " STRINGIFY(THREADPTR) ")\n"
#endif
" rsr a2, SAR\n"
" s32i a2, %0, (4 * " STRINGIFY(REG_SAR) ")\n"
#if XCHAL_HAVE_S32C1I != 0