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Add CONFIG_DEBUG_ERROR. Change names of *dbg() * *err()

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This commit is contained in:
Gregory Nutt 2016-06-11 15:50:49 -06:00
parent e99301d7c2
commit a1469a3e95
1091 changed files with 5971 additions and 5966 deletions
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14
Kconfig
View file

@ -413,13 +413,21 @@ if DEBUG_FEATURES
comment "Debug SYSLOG Output Controls"
config DEBUG_ERROR
bool "Enable Error Output"
default n
---help---
Enables output from err() statements. Errors are significant system
exceptions that require immediate attention.
config DEBUG_WARN
bool "Enable Warnings Output"
default n
depends on DEBUG_ERROR
---help---
Enables output from warning statements. Warnings are considered to
be potential errors or errors that will not have serious
consequences.
Enables output from warn() statements. Warnings are considered to
be various unexpected conditions, potential errors or errors that will
not have serious consequences.
config DEBUG_INFO
bool "Enable Informational Debug Output"

14
arch/arm/src/arm/up_elf.c
View file

@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC
}
@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}

4
arch/arm/src/arm/up_schedulesigaction.c
View file

@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* being delivered to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/arm/up_sigdeliver.c
View file

@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

16
arch/arm/src/armv6-m/up_elf.c
View file

@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -181,7 +181,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -290,7 +290,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -300,7 +300,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -451,7 +451,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -461,6 +461,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}

20
arch/arm/src/armv6-m/up_hardfault.c
View file

@ -55,9 +55,9 @@
****************************************************************************/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@ -118,7 +118,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@ -126,7 +126,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfdbg("Forward SVCall\n");
hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@ -134,17 +134,17 @@ int up_hardfault(int irq, FAR void *context)
#if defined(CONFIG_DEBUG_HARDFAULT)
/* Dump some hard fault info */
hfdbg("\nHard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" PRIMASK: %08x IPSR: %08x\n",
hferr("\nHard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" PRIMASK: %08x IPSR: %08x\n",
getprimask(), getipsr());
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif

4
arch/arm/src/armv6-m/up_schedulesigaction.c
View file

@ -107,7 +107,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@ -121,7 +121,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv6-m/up_sigdeliver.c
View file

@ -100,7 +100,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -135,7 +135,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

26
arch/arm/src/armv6-m/up_svcall.c
View file

@ -69,9 +69,9 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@ -174,18 +174,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef CONFIG_BUILD_PROTECTED
svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK], regs[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x PRIMASK: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x\n",
regs[REG_XPSR], regs[REG_PRIMASK]);
# endif
}
@ -486,30 +486,30 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCall Return:\n");
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
#ifdef CONFIG_BUILD_PROTECTED
svcdbg(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
#else
svcdbg(" PSR: %08x PRIMASK: %08x\n",
svcerr(" PSR: %08x PRIMASK: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
#endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
svcdbg("SVCall Return: %d\n", regs[REG_R0]);
svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif

8
arch/arm/src/armv7-a/arm_addrenv.c
View file

@ -278,7 +278,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UTEXTFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create .text region: %d\n", ret);
berr("ERROR: Failed to create .text region: %d\n", ret);
goto errout;
}
@ -293,7 +293,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create .bss/.data region: %d\n", ret);
berr("ERROR: Failed to create .bss/.data region: %d\n", ret);
goto errout;
}
@ -305,7 +305,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
ret = up_addrenv_initdata((uintptr_t)addrenv->data[0] & PMD_PTE_PADDR_MASK);
if (ret < 0)
{
bdbg("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
berr("ERROR: Failed to initialize .bss/.data region: %d\n", ret);
goto errout;
}
#endif
@ -318,7 +318,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create heap region: %d\n", ret);
berr("ERROR: Failed to create heap region: %d\n", ret);
goto errout;
}

2
arch/arm/src/armv7-a/arm_addrenv_kstack.c
View file

@ -153,7 +153,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
tcb->xcp.kstack = (FAR uint32_t *)kmm_memalign(8, ARCH_KERNEL_STACKSIZE);
if (!tcb->xcp.kstack)
{
bdbg("ERROR: Failed to allocate the kernel stack\n");
berr("ERROR: Failed to allocate the kernel stack\n");
return -ENOMEM;
}

2
arch/arm/src/armv7-a/arm_addrenv_ustack.c
View file

@ -163,7 +163,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
MMU_L2_UDATAFLAGS);
if (ret < 0)
{
bdbg("ERROR: Failed to create stack region: %d\n", ret);
berr("ERROR: Failed to create stack region: %d\n", ret);
up_addrenv_ustackfree(tcb);
return ret;
}

2
arch/arm/src/armv7-a/arm_addrenv_utils.c
View file

@ -98,7 +98,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
npages = MM_NPAGES(regionsize);
if (npages > (listlen << (20 - MM_PGSHIFT)))
{
bdbg("ERROR: npages=%u listlen=%u\n", npages, listlen);
berr("ERROR: npages=%u listlen=%u\n", npages, listlen);
return -E2BIG;
}

14
arch/arm/src/armv7-a/arm_elf.c
View file

@ -74,7 +74,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@ -175,7 +175,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -246,7 +246,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -256,6 +256,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}

4
arch/arm/src/armv7-a/arm_schedulesigaction.c
View file

@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv7-a/arm_sigdeliver.c
View file

@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

22
arch/arm/src/armv7-a/arm_syscall.c
View file

@ -71,9 +71,9 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@ -179,14 +179,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@ -480,7 +480,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@ -504,14 +504,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
svcdbg("SYSCALL Exit: regs: %p\n", regs);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Exit: regs: %p\n", regs);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches

4
arch/arm/src/armv7-a/gic.h
View file

@ -594,12 +594,12 @@
/* Debug */
#ifdef CONFIG_DEBUG_IRQ
# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
# define gicerr(format, ...) err(format, ##__VA_ARGS__)
# define gicllerr(format, ...) llerr(format, ##__VA_ARGS__)
# define gicinfo(format, ...) info(format, ##__VA_ARGS__)
# define gicllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
# define gicdbg(x...)
# define gicerr(x...)
# define gicllerr(x...)
# define gicinfo(x...)
# define gicllinfo(x...)

2
arch/arm/src/armv7-m/mpu.h
View file

@ -221,7 +221,7 @@ static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = getreg32(MPU_TYPE);
dbg("%s MPU Regions: data=%d instr=%d\n",
err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT,
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT);

16
arch/arm/src/armv7-m/up_elf.c
View file

@ -82,7 +82,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -90,7 +90,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -102,7 +102,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -177,7 +177,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -298,7 +298,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && (offset & 1) == 0)
{
bdbg(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
berr(" ERROR: JUMP24 [%d] requires odd offset, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -308,7 +308,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
if (offset <= (int32_t)0xff000000 || offset >= (int32_t)0x01000000)
{
bdbg(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
berr(" ERROR: JUMP24 [%d] relocation out of range, branch taget=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -461,7 +461,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -471,7 +471,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}

28
arch/arm/src/armv7-m/up_hardfault.c
View file

@ -60,9 +60,9 @@
*/
#ifdef CONFIG_DEBUG_HARDFAULT
# define hfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define hferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define hfdbg(x...)
# define hferr(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
@ -127,7 +127,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
uint16_t insn = *pc;
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
hferr(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@ -135,7 +135,7 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
hfdbg("Forward SVCall\n");
hferr("Forward SVCall\n");
return up_svcall(irq, context);
}
}
@ -143,37 +143,37 @@ int up_hardfault(int irq, FAR void *context)
/* Dump some hard fault info */
hfdbg("Hard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
hferr("Hard Fault:\n");
hferr(" IRQ: %d regs: %p\n", irq, regs);
hferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
hferr(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
hferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
hferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
hfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
hfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
hferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif

20
arch/arm/src/armv7-m/up_memfault.c
View file

@ -55,9 +55,9 @@
#undef DEBUG_MEMFAULTS /* Define to debug memory management faults */
#ifdef DEBUG_MEMFAULTS
# define mfdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define mferr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define mfdbg(x...)
# define mferr(x...)
#endif
/****************************************************************************
@ -93,34 +93,34 @@ int up_memfault(int irq, FAR void *context)
(void)up_irq_save();
llerr("PANIC!!! Memory Management Fault:\n");
mfdbg(" IRQ: %d context: %p\n", irq, regs);
mferr(" IRQ: %d context: %p\n", irq, regs);
llerr(" CFAULTS: %08x MMFAR: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
mfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
mferr(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x CONTROL: %08x\n",
getbasepri(), getprimask(), getipsr(), getcontrol());
mfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
mferr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
mfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
mferr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
#ifdef CONFIG_ARMV7M_USEBASEPRI
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
mferr(" xPSR: %08x BASEPRI: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x BASEPRI: %08x (saved)\n",
mferr(" xPSR: %08x BASEPRI: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_BASEPRI]);
# endif
#else
# ifdef REG_EXC_RETURN
mfdbg(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
mferr(" xPSR: %08x PRIMASK: %08x EXC_RETURN: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK],
CURRENT_REGS[REG_EXC_RETURN]);
# else
mfdbg(" xPSR: %08x PRIMASK: %08x (saved)\n",
mferr(" xPSR: %08x PRIMASK: %08x (saved)\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_PRIMASK]);
# endif
#endif

4
arch/arm/src/armv7-m/up_ramvec_attach.c
View file

@ -59,10 +59,10 @@
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg llerr
# define interr llerr
# define intinfo llinfo
#else
# define intdbg(x...)
# define interr(x...)
# define intinfo(x...)
#endif

4
arch/arm/src/armv7-m/up_ramvec_initialize.c
View file

@ -78,10 +78,10 @@
*/
#ifdef CONFIG_DEBUG_IRQ
# define intdbg llerr
# define interr llerr
# define intinfo llinfo
#else
# define intdbg(x...)
# define interr(x...)
# define intinfo(x...)
#endif

4
arch/arm/src/armv7-m/up_schedulesigaction.c
View file

@ -95,7 +95,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
DEBUGASSERT(tcb != NULL && sigdeliver != NULL);
/* Make sure that interrupts are disabled */
@ -110,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv7-m/up_sigdeliver.c
View file

@ -95,7 +95,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -138,7 +138,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

26
arch/arm/src/armv7-m/up_svcall.c
View file

@ -70,9 +70,9 @@
*/
#if defined(CONFIG_DEBUG_SYSCALL) || defined(CONFIG_DEBUG_SVCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@ -169,18 +169,18 @@ int up_svcall(int irq, FAR void *context)
if (cmd > SYS_switch_context)
# endif
{
svcdbg("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
# ifdef REG_EXC_RETURN
svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x EXC_RETURN: %08x\n",
regs[REG_XPSR], regs[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x\n", regs[REG_XPSR]);
svcerr(" PSR: %08x\n", regs[REG_XPSR]);
# endif
}
#endif
@ -488,28 +488,28 @@ int up_svcall(int irq, FAR void *context)
if (regs != CURRENT_REGS)
# endif
{
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SVCall Return:\n");
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R0], CURRENT_REGS[REG_R1],
CURRENT_REGS[REG_R2], CURRENT_REGS[REG_R3],
CURRENT_REGS[REG_R4], CURRENT_REGS[REG_R5],
CURRENT_REGS[REG_R6], CURRENT_REGS[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
CURRENT_REGS[REG_R8], CURRENT_REGS[REG_R9],
CURRENT_REGS[REG_R10], CURRENT_REGS[REG_R11],
CURRENT_REGS[REG_R12], CURRENT_REGS[REG_R13],
CURRENT_REGS[REG_R14], CURRENT_REGS[REG_R15]);
# ifdef REG_EXC_RETURN
svcdbg(" PSR: %08x EXC_RETURN: %08x\n",
svcerr(" PSR: %08x EXC_RETURN: %08x\n",
CURRENT_REGS[REG_XPSR], CURRENT_REGS[REG_EXC_RETURN]);
# else
svcdbg(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
svcerr(" PSR: %08x\n", CURRENT_REGS[REG_XPSR]);
# endif
}
# ifdef CONFIG_DEBUG_SVCALL
else
{
svcdbg("SVCall Return: %d\n", regs[REG_R0]);
svcerr("SVCall Return: %d\n", regs[REG_R0]);
}
# endif
#endif

14
arch/arm/src/armv7-r/arm_elf.c
View file

@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_machine != EM_ARM)
{
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
berr("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
return -ENOEXEC;
}
@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
{
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
berr("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
return -ENOEXEC;
}
@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
#endif
{
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
berr("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
return -ENOEXEC;
}
@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
if ((ehdr->e_entry & 3) != 0)
{
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
berr("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
return -ENOEXEC;
}
@ -187,7 +187,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
offset += sym->st_value - addr;
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
{
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
berr(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
ELF32_R_TYPE(rel->r_info), offset);
return -EINVAL;
@ -258,7 +258,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
break;
default:
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
berr("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
return -EINVAL;
}
@ -268,6 +268,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
uintptr_t addr)
{
bdbg("RELA relocation not supported\n");
berr("RELA relocation not supported\n");
return -ENOSYS;
}

4
arch/arm/src/armv7-r/arm_schedulesigaction.c
View file

@ -94,7 +94,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
sdbg("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
serr("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
@ -108,7 +108,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
* to the currently executing task.
*/
sdbg("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
serr("rtcb=0x%p CURRENT_REGS=0x%p\n", this_task(), CURRENT_REGS);
if (tcb == this_task())
{

4
arch/arm/src/armv7-r/arm_sigdeliver.c
View file

@ -83,7 +83,7 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
sdbg("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
@ -114,7 +114,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
sdbg("Resuming\n");
serr("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

22
arch/arm/src/armv7-r/arm_syscall.c
View file

@ -69,9 +69,9 @@
/* Debug ********************************************************************/
#if defined(CONFIG_DEBUG_SYSCALL)
# define svcdbg(format, ...) llerr(format, ##__VA_ARGS__)
# define svcerr(format, ...) llerr(format, ##__VA_ARGS__)
#else
# define svcdbg(x...)
# define svcerr(x...)
#endif
/****************************************************************************
@ -177,14 +177,14 @@ uint32_t *arm_syscall(uint32_t *regs)
*/
#if defined(CONFIG_DEBUG_SYSCALL)
svcdbg("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Entry: regs: %p cmd: %d\n", regs, cmd);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Handle the SVCall according to the command in R0 */
@ -478,7 +478,7 @@ uint32_t *arm_syscall(uint32_t *regs)
regs[REG_R0] -= CONFIG_SYS_RESERVED;
#else
svcdbg("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_R0]);
#endif
#ifdef CONFIG_ARCH_KERNEL_STACK
@ -502,14 +502,14 @@ uint32_t *arm_syscall(uint32_t *regs)
#if defined(CONFIG_DEBUG_SYSCALL)
/* Report what happened */
svcdbg("SYSCALL Exit: regs: %p\n", regs);
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr("SYSCALL Exit: regs: %p\n", regs);
svcerr(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
svcerr(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg("CPSR: %08x\n", regs[REG_CPSR]);
svcerr("CPSR: %08x\n", regs[REG_CPSR]);
#endif
/* Return the last value of curent_regs. This supports context switches

2
arch/arm/src/armv7-r/mpu.h
View file

@ -361,7 +361,7 @@ static inline void mpu_showtype(void)
{
#ifdef CONFIG_DEBUG_FEATURES
uint32_t regval = mpu_get_mpuir();
dbg("%s MPU Regions: data=%d instr=%d\n",
err("%s MPU Regions: data=%d instr=%d\n",
(regval & MPUIR_SEPARATE) != 0 ? "Separate" : "Unified",
(regval & MPUIR_DREGION_MASK) >> MPUIR_DREGION_SHIFT,
(regval & MPUIR_IREGION_MASK) >> MPUIR_IREGION_SHIFT);

34
arch/arm/src/c5471/c5471_ethernet.c
View file

@ -737,22 +737,22 @@ static int c5471_phyinit (void)
phyid = (c5471_mdread(0, MD_PHY_MSB_REG) << 16) | c5471_mdread(0, MD_PHY_LSB_REG);
if (phyid != LU3X31_T64_PHYID)
{
ndbg("Unrecognized PHY ID: %08x\n", phyid);
nerr("Unrecognized PHY ID: %08x\n", phyid);
return ERROR;
}
/* Next, Set desired network rate, 10BaseT, 100BaseT, or auto. */
#ifdef CONFIG_C5471_AUTONEGOTIATION
ndbg("Setting PHY Transceiver for Autonegotiation\n");
nerr("Setting PHY Transceiver for Autonegotiation\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_AUTONEG);
#endif
#ifdef CONFIG_C5471_BASET100
ndbg("Setting PHY Transceiver for 100BaseT FullDuplex\n");
nerr("Setting PHY Transceiver for 100BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_100MBIT_FULLDUP);
#endif
#ifdef CONFIG_C5471_BASET10
ndbg("Setting PHY Transceiver for 10BaseT FullDuplex\n");
nerr("Setting PHY Transceiver for 10BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_10MBIT_FULLDUP);
#endif
@ -1371,7 +1371,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
{
/* Increment the count of dropped packets */
ndbg("Too big! packetlen: %d\n", packetlen);
nerr("Too big! packetlen: %d\n", packetlen);
c5471->c_rxdropped++;
}
#endif
@ -1680,7 +1680,7 @@ static int c5471_ifup(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
volatile uint32_t clearbits;
ndbg("Bringing up: %d.%d.%d.%d\n",
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@ -1742,7 +1742,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
ndbg("Stopping\n");
nerr("Stopping\n");
/* Disable the Ethernet interrupt */
@ -1798,7 +1798,7 @@ static int c5471_txavail(struct net_driver_s *dev)
struct c5471_driver_s *c5471 = (struct c5471_driver_s *)dev->d_private;
irqstate_t flags;
ndbg("Polling\n");
nerr("Polling\n");
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@ -1951,7 +1951,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX ENET 0 */
ndbg("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("TX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_TDBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
{
@ -1978,7 +1978,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX ENET 0 */
ndbg("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("RX ENET0 desc: %08x pbuf: %08x\n", desc, pbuf);
putreg32((desc & 0x0000ffff), ENET0_RDBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
{
@ -2005,7 +2005,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* TX CPU */
ndbg("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("TX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_txcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_TXBA); /* 16-bit offset address */
for (i = NUM_DESC_TX-1; i >= 0; i--)
@ -2035,7 +2035,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* RX CPU */
ndbg("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("RX CPU desc: %08x pbuf: %08x\n", desc, pbuf);
c5471->c_rxcpudesc = desc;
putreg32((desc & 0x0000ffff), EIM_CPU_RXBA); /* 16-bit offset address */
for (i = NUM_DESC_RX-1; i >= 0; i--)
@ -2063,7 +2063,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
pbuf += sizeof(uint32_t); /* Ether Module's "Buffer Usage Word" */
}
ndbg("END desc: %08x pbuf: %08x\n", desc, pbuf);
nerr("END desc: %08x pbuf: %08x\n", desc, pbuf);
/* Save the descriptor packet size */
@ -2150,13 +2150,13 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
static void c5471_reset(struct c5471_driver_s *c5471)
{
#if defined(CONFIG_C5471_PHY_LU3X31T_T64)
ndbg("EIM reset\n");
nerr("EIM reset\n");
c5471_eimreset(c5471);
#endif
ndbg("PHY init\n");
nerr("PHY init\n");
c5471_phyinit();
ndbg("EIM config\n");
nerr("EIM config\n");
c5471_eimconfig(c5471);
}
@ -2178,7 +2178,7 @@ static void c5471_macassign(struct c5471_driver_s *c5471)
uint8_t *mptr = dev->d_mac.ether_addr_octet;
register uint32_t tmp;
ndbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
nerr("MAC: %0x:%0x:%0x:%0x:%0x:%0x\n",
mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]);
/* Set CPU port MAC address. S/W will only see incoming packets that match

36
arch/arm/src/c5471/c5471_watchdog.c
View file

@ -155,7 +155,7 @@ static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
}
}
dbg("prescale=%d -> ptv=%d\n", prescale, ptv);
err("prescale=%d -> ptv=%d\n", prescale, ptv);
return ptv;
}
@ -173,7 +173,7 @@ static int wdt_setusec(uint32_t usec)
uint32_t divisor = 1;
uint32_t mode;
dbg("usec=%d\n", usec);
err("usec=%d\n", usec);
/* Calculate a value of prescaler and divisor that will be able
* to count to the usec. It may not be exact or the best
@ -186,7 +186,7 @@ static int wdt_setusec(uint32_t usec)
do
{
divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
dbg("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
err("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
if (divisor >= 0x10000)
{
@ -194,7 +194,7 @@ static int wdt_setusec(uint32_t usec)
{
/* This is the max possible ~2.5 seconds. */
dbg("prescaler=0x%x too big!\n", prescaler);
err("prescaler=0x%x too big!\n", prescaler);
return ERROR;
}
@ -207,19 +207,19 @@ static int wdt_setusec(uint32_t usec)
}
while (divisor >= 0x10000);
dbg("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
err("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
mode = wdt_prescaletoptv(prescaler);
mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
mode |= divisor << 5;
dbg("mode=0x%x\n", mode);
err("mode=0x%x\n", mode);
c5471_wdt_cntl = mode;
/* Now start the watchdog */
c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
dbg("cntl_timer=0x%x\n", c5471_wdt_cntl);
err("cntl_timer=0x%x\n", c5471_wdt_cntl);
return 0;
}
@ -234,17 +234,17 @@ static int wdt_setusec(uint32_t usec)
static int wdt_interrupt(int irq, void *context)
{
dbg("expired\n");
err("expired\n");
#if defined(CONFIG_SOFTWARE_REBOOT)
# if defined(CONFIG_SOFTWARE_TEST)
dbg(" Test only\n");
err(" Test only\n");
# else
dbg(" Re-booting\n");
err(" Re-booting\n");
# warning "Add logic to reset CPU here"
# endif
#else
dbg(" No reboot\n");
err(" No reboot\n");
#endif
return OK;
}
@ -259,7 +259,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
* not work if the user provides a buffer smaller than 18 bytes.
*/
dbg("buflen=%d\n", buflen);
err("buflen=%d\n", buflen);
if (buflen >= 18)
{
sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
@ -274,7 +274,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
{
dbg("buflen=%d\n", buflen);
err("buflen=%d\n", buflen);
if (buflen)
{
/* Reset the timer to the maximum delay */
@ -292,7 +292,7 @@ static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
err("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
/* Process the IOCTL command (see arch/watchdog.h) */
@ -315,7 +315,7 @@ static int wdt_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int wdt_open(struct file *filep)
{
dbg("");
err("");
if (g_wdtopen)
{
@ -339,7 +339,7 @@ static int wdt_open(struct file *filep)
static int wdt_close(struct file *filep)
{
dbg("");
err("");
/* The task controlling the watchdog has terminated. Take the timer
* the
@ -367,7 +367,7 @@ int up_wdtinit(void)
{
int ret;
dbg("C547x Watchdog Driver\n");
err("C547x Watchdog Driver\n");
/* Register as /dev/wdt */
@ -379,7 +379,7 @@ int up_wdtinit(void)
/* Register for an interrupt level callback through wdt_interrupt */
dbg("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
err("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
/* Make sure that the timer is stopped */

10
arch/arm/src/calypso/calypso_spi.c
View file

@ -216,7 +216,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
tmp <<= (32-bitlen); /* align to MSB */
}
dbg("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
err("spi_xfer(dev_idx=%u, bitlen=%u, data_out=0x%08x): ",
dev_idx, bitlen, tmp);
/* fill transmit registers */
@ -236,14 +236,14 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
putreg16(reg_ctrl, SPI_REG(REG_CTRL));
dbg("reg_ctrl=0x%04x ", reg_ctrl);
err("reg_ctrl=0x%04x ", reg_ctrl);
/* wait until the transfer is complete */
while (1)
{
reg_status = getreg16(SPI_REG(REG_STATUS));
dbg("status=0x%04x ", reg_status);
err("status=0x%04x ", reg_status);
if (din && (reg_status & SPI_STATUS_RE))
{
break;
@ -262,7 +262,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
{
tmp = getreg16(SPI_REG(REG_RX_MSB)) << 16;
tmp |= getreg16(SPI_REG(REG_RX_LSB));
dbg("data_in=0x%08x ", tmp);
err("data_in=0x%08x ", tmp);
if (bitlen <= 8)
{
@ -278,7 +278,7 @@ int spi_xfer(uint8_t dev_idx, uint8_t bitlen, const void *dout, void *din)
}
}
dbg("\n");
err("\n");
return 0;
}

8
arch/arm/src/calypso/calypso_uwire.c
View file

@ -112,7 +112,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
/* FIXME uwire_init always selects CS0 for now */
dbg("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
err("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
/* select the chip */
@ -128,7 +128,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
tmp <<= 16 - bitlen; /* align to MSB */
putreg16(tmp, UWIRE_REG(REG_DATA));
dbg(", data_out=0x%04hx", tmp);
err(", data_out=0x%04hx", tmp);
}
tmp = (dout ? UWIRE_CSR_BITS_WR(bitlen) : 0) |
@ -142,7 +142,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
_uwire_wait(UWIRE_CSR_RDRB, UWIRE_CSR_RDRB);
tmp = getreg16(UWIRE_REG(REG_DATA));
dbg(", data_in=0x%08x", tmp);
err(", data_in=0x%08x", tmp);
if (bitlen <= 8)
*(uint8_t *)din = tmp & 0xff;
@ -155,7 +155,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
putreg16(UWIRE_CSR_IDX(0) | 0, UWIRE_REG(REG_CSR));
_uwire_wait(UWIRE_CSR_CSRB, 0);
dbg(")\n");
err(")\n");
return 0;
}

2
arch/arm/src/common/up_createstack.c
View file

@ -210,7 +210,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
if (!tcb->stack_alloc_ptr)
{
sdbg("ERROR: Failed to allocate stack, size %d\n", stack_size);
serr("ERROR: Failed to allocate stack, size %d\n", stack_size);
}
#endif
}

10
arch/arm/src/common/up_exit.c
View file

@ -77,8 +77,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
sdbg(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
sdbg(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
serr(" TCB=%p name=%s pid=%d\n", tcb, tcb->argv[0], tcb->pid);
serr(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@ -87,7 +87,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
sdbg(" fd=%d refcount=%d\n",
serr(" fd=%d refcount=%d\n",
i, inode->i_crefs);
}
}
@ -101,11 +101,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
sdbg(" fd=%d nbytes=%d\n",
serr(" fd=%d nbytes=%d\n",
filep->fs_fd,
filep->fs_bufpos - filep->fs_bufstart);
#else
sdbg(" fd=%d\n", filep->fs_fd);
serr(" fd=%d\n", filep->fs_fd);
#endif
}
}

4
arch/arm/src/common/up_vfork.c
View file

@ -143,7 +143,7 @@ pid_t up_vfork(const struct vfork_s *context)
child = task_vforksetup((start_t)(context->lr & ~1));
if (!child)
{
sdbg("ERROR: task_vforksetup failed\n");
serr("ERROR: task_vforksetup failed\n");
return (pid_t)ERROR;
}
@ -162,7 +162,7 @@ pid_t up_vfork(const struct vfork_s *context)
parent->flags & TCB_FLAG_TTYPE_MASK);
if (ret != OK)
{
sdbg("ERROR: up_create_stack failed: %d\n", ret);
serr("ERROR: up_create_stack failed: %d\n", ret);
task_vforkabort(child, -ret);
return (pid_t)ERROR;
}

4
arch/arm/src/dm320/dm320_framebuffer.c
View file

@ -928,7 +928,7 @@ static void dm320_hwinitialize(void)
/* Set up the rectangular cursor with defaults */
#ifdef CONFIG_FB_HWCURSOR
gdbg("Initialize rectangular cursor\n");
gerr("Initialize rectangular cursor\n");
putreg16(0, DM320_OSD_CURXP);
putreg16(0, DM320_OSD_CURYP);
@ -1385,7 +1385,7 @@ int up_fbinitialize(int display)
ret = dm320_allocvideomemory();
if (ret != 0)
{
gdbg("Failed to allocate video buffers\n");
gerr("Failed to allocate video buffers\n");
return ret;
}

2
arch/arm/src/efm32/efm32_adc.c
View file

@ -1298,7 +1298,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
else
#endif
{
adbg("No ADC interface defined\n");
aerr("No ADC interface defined\n");
return NULL;
}

44
arch/arm/src/efm32/efm32_dma.c
View file

@ -804,29 +804,29 @@ void efm32_dmadump(DMA_HANDLE handle, const struct efm32_dmaregs_s *regs,
{
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
dmadbg("%s\n", msg);
dmadbg(" DMA Registers:\n");
dmadbg(" STATUS: %08x\n", regs->status);
dmadbg(" CTRLBASE: %08x\n", regs->ctrlbase);
dmadbg(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
dmadbg(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
dmadbg(" CHUSEBURSTS: %08x\n", regs->chusebursts);
dmadbg(" CHREQMASKS: %08x\n", regs->chreqmasks);
dmadbg(" CHENS: %08x\n", regs->chens);
dmadbg(" CHALTS: %08x\n", regs->chalts);
dmadbg(" CHPRIS: %08x\n", regs->chpris);
dmadbg(" ERRORC: %08x\n", regs->errorc);
dmadbg(" CHREQSTATUS: %08x\n", regs->chreqstatus);
dmadbg(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
dmadbg(" IEN: %08x\n", regs->ien);
dmaerr("%s\n", msg);
dmaerr(" DMA Registers:\n");
dmaerr(" STATUS: %08x\n", regs->status);
dmaerr(" CTRLBASE: %08x\n", regs->ctrlbase);
dmaerr(" ALTCTRLBASE: %08x\n", regs->altctrlbase);
dmaerr(" CHWAITSTATUS: %08x\n", regs->chwaitstatus);
dmaerr(" CHUSEBURSTS: %08x\n", regs->chusebursts);
dmaerr(" CHREQMASKS: %08x\n", regs->chreqmasks);
dmaerr(" CHENS: %08x\n", regs->chens);
dmaerr(" CHALTS: %08x\n", regs->chalts);
dmaerr(" CHPRIS: %08x\n", regs->chpris);
dmaerr(" ERRORC: %08x\n", regs->errorc);
dmaerr(" CHREQSTATUS: %08x\n", regs->chreqstatus);
dmaerr(" CHSREQSTATUS: %08x\n", regs->chsreqstatus);
dmaerr(" IEN: %08x\n", regs->ien);
#if defined(CONFIG_EFM32_EFM32GG)
dmadbg(" CTRL: %08x\n", regs->ctrl);
dmadbg(" RDS: %08x\n", regs->rds);
dmadbg(" LOOP0: %08x\n", regs->loop0);
dmadbg(" LOOP1: %08x\n", regs->loop1);
dmadbg(" RECT0: %08x\n", regs->rect0);
dmaerr(" CTRL: %08x\n", regs->ctrl);
dmaerr(" RDS: %08x\n", regs->rds);
dmaerr(" LOOP0: %08x\n", regs->loop0);
dmaerr(" LOOP1: %08x\n", regs->loop1);
dmaerr(" RECT0: %08x\n", regs->rect0);
#endif
dmadbg(" DMA Channel %d Registers:\n", dmach->chan);
dmadbg(" CHCTRL: %08x\n", regs->chnctrl);
dmaerr(" DMA Channel %d Registers:\n", dmach->chan);
dmaerr(" CHCTRL: %08x\n", regs->chnctrl);
}
#endif

8
arch/arm/src/efm32/efm32_i2c.c
View file

@ -137,10 +137,10 @@
/* CONFIG_DEBUG_I2C + CONFIG_DEBUG_FEATURES enables general I2C debug output. */
#ifdef CONFIG_DEBUG_I2C
# define i2cdbg dbg
# define i2cerr err
# define i2cinfo info
#else
# define i2cdbg(x...)
# define i2cerr(x...)
# define i2cinfo(x...)
#endif
@ -761,7 +761,7 @@ static void efm32_i2c_tracenew(FAR struct efm32_i2c_priv_s *priv)
if (priv->tndx >= (CONFIG_I2C_NTRACE - 1))
{
i2cdbg("Trace table overflow\n");
i2cerr("Trace table overflow\n");
return;
}
@ -1536,7 +1536,7 @@ static int efm32_i2c_transfer(FAR struct i2c_master_s *dev,
{
ret = -ETIMEDOUT;
i2cdbg("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
i2cerr("Timed out: I2Cx_STATE: 0x%04x I2Cx_STATUS: 0x%08x\n",
efm32_i2c_getreg(priv, EFM32_I2C_STATE_OFFSET),
efm32_i2c_getreg(priv, EFM32_I2C_STATUS_OFFSET));

18
arch/arm/src/efm32/efm32_irq.c
View file

@ -155,7 +155,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: efm32_nmi, efm32_busfault, efm32_usagefault, efm32_pendsv,
* efm32_dbgmonitor, efm32_pendsv, efm32_reserved
* efm32_errmonitor, efm32_pendsv, efm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@ -168,7 +168,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
static int efm32_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -176,7 +176,7 @@ static int efm32_nmi(int irq, FAR void *context)
static int efm32_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@ -184,7 +184,7 @@ static int efm32_busfault(int irq, FAR void *context)
static int efm32_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
PANIC();
return 0;
}
@ -192,15 +192,15 @@ static int efm32_usagefault(int irq, FAR void *context)
static int efm32_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Debug Monitor received\n");
err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@ -208,7 +208,7 @@ static int efm32_dbgmonitor(int irq, FAR void *context)
static int efm32_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@ -456,7 +456,7 @@ void up_irqinitialize(void)
irq_attach(EFM32_IRQ_BUSFAULT, efm32_busfault);
irq_attach(EFM32_IRQ_USAGEFAULT, efm32_usagefault);
irq_attach(EFM32_IRQ_PENDSV, efm32_pendsv);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_dbgmonitor);
irq_attach(EFM32_IRQ_DBGMONITOR, efm32_errmonitor);
irq_attach(EFM32_IRQ_RESERVED, efm32_reserved);
#endif

8
arch/arm/src/efm32/efm32_pwm.c
View file

@ -82,7 +82,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -94,7 +94,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -414,7 +414,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
if (efm32_timer_set_freq(priv->base, priv->pclk, info->frequency) < 0)
{
pwmdbg("Cannot set TIMER frequency %dHz from clock %dHz\n",
pwmerr("Cannot set TIMER frequency %dHz from clock %dHz\n",
info->frequency, priv->pclk);
return -EINVAL;
}
@ -933,7 +933,7 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

4
arch/arm/src/efm32/efm32_rmu.c
View file

@ -262,7 +262,7 @@ void efm32_rmu_initialize(void)
}
#ifdef CONFIG_EFM32_RMU_DEBUG
rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
rmuerr("RMU => reg = 0x%08X\n", g_efm32_rstcause);
for (; ; )
{
const char *str;
@ -273,7 +273,7 @@ void efm32_rmu_initialize(void)
break;
}
rmudbg("RMU => %s\n", str);
rmuerr("RMU => %s\n", str);
}
#endif
}

4
arch/arm/src/efm32/efm32_rmu.h
View file

@ -56,14 +56,14 @@
#endif
#ifdef CONFIG_EFM32_RMU_DEBUG
# define rmudbg llerr
# define rmuerr llerr
# ifdef CONFIG_DEBUG_INFO
# define rmuinfo llerr
# else
# define rmuinfo(x...)
# endif
#else
# define rmudbg(x...)
# define rmuerr(x...)
# define rmuinfo(x...)
#endif

18
arch/arm/src/efm32/efm32_rtc_burtc.c
View file

@ -131,9 +131,9 @@
#define __CNT_ZERO_REG EFM32_BURTC_RET_REG(1)
#if defined CONFIG_DEBUG_FEATURES && defined CONFIG_RTC_DEBUG
# define burtcdbg llerr
# define burtcerr llerr
#else
# define burtcdbg(x...)
# define burtcerr(x...)
#endif
/************************************************************************************
@ -191,7 +191,7 @@ static int efm32_rtc_burtc_interrupt(int irq, void *context)
if (source & BURTC_IF_LFXOFAIL)
{
burtcdbg("BURTC_IF_LFXOFAIL");
burtcerr("BURTC_IF_LFXOFAIL");
}
#ifdef CONFIG_RTC_HIRES
@ -245,7 +245,7 @@ static void efm32_rtc_burtc_init(void)
regval = g_efm32_rstcause;
regval2 = getreg32(EFM32_BURTC_CTRL);
burtcdbg("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
burtcerr("BURTC RESETCAUSE=0x%08X BURTC_CTRL=0x%08X\n", regval, regval2);
if (!(regval2 & BURTC_CTRL_RSTEN) &&
!(regval & RMU_RSTCAUSE_BUBODREG) &&
@ -262,11 +262,11 @@ static void efm32_rtc_burtc_init(void)
/* restore saved base time */
burtcdbg("BURTC OK\n");
burtcerr("BURTC OK\n");
return;
}
burtcdbg("BURTC RESETED\n");
burtcerr("BURTC RESETED\n");
/* Disable reset of BackupDomain */
@ -358,7 +358,7 @@ static uint64_t efm32_get_burtc_tick(void)
val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
burtcdbg("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
burtcerr("Get Tick carry %u zero %u reg %u\n", cnt_carry, cnt_carry,cnt);
return val;
}
@ -449,7 +449,7 @@ int up_rtc_gettime(FAR struct timespec *tp)
tp->tv_sec = val / CONFIG_RTC_FREQUENCY;
tp->tv_nsec = (val % CONFIG_RTC_FREQUENCY)*(NSEC_PER_SEC/CONFIG_RTC_FREQUENCY);
burtcdbg("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
burtcerr("Get RTC %u.%09u\n", tp->tv_sec, tp->tv_nsec);
return OK;
}
@ -499,7 +499,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
cnt_carry = val / __CNT_TOP;
cnt = val % __CNT_TOP;
burtcdbg("Set RTC %u.%09u carry %u zero %u reg %u\n",
burtcerr("Set RTC %u.%09u carry %u zero %u reg %u\n",
tp->tv_sec, tp->tv_nsec, cnt_carry, cnt, cnt_reg);
putreg32(cnt_carry, __CNT_CARRY_REG);

16
arch/arm/src/efm32/efm32_spi.c
View file

@ -100,14 +100,14 @@
#endif
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -1456,7 +1456,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
ret = wd_start(priv->wdog, (int)ticks, spi_dma_timeout, 1, (uint32_t)priv);
if (ret < 0)
{
spidbg("ERROR: Failed to start timeout\n");
spierr("ERROR: Failed to start timeout\n");
}
/* Then wait for each to complete. TX should complete first */
@ -1594,7 +1594,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->rxdmach = efm32_dmachannel();
if (!priv->rxdmach)
{
spidbg("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
spierr("ERROR: Failed to allocate the RX DMA channel for SPI port: %d\n",
port);
goto errout;
}
@ -1602,7 +1602,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->txdmach = efm32_dmachannel();
if (!priv->txdmach)
{
spidbg("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
spierr("ERROR: Failed to allocate the TX DMA channel for SPI port: %d\n",
port);
goto errout_with_rxdmach;
}
@ -1612,7 +1612,7 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
priv->wdog = wd_create();
if (!priv->wdog)
{
spidbg("ERROR: Failed to create a timer for SPI port: %d\n", port);
spierr("ERROR: Failed to create a timer for SPI port: %d\n", port);
goto errout_with_txdmach;
}
@ -1709,7 +1709,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
else
#endif
{
spidbg("ERROR: Unsupported SPI port: %d\n", port);
spierr("ERROR: Unsupported SPI port: %d\n", port);
return NULL;
}
@ -1731,7 +1731,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
ret = spi_portinitialize(priv);
if (ret < 0)
{
spidbg("ERROR: Failed to initialize SPI port %d\n", port);
spierr("ERROR: Failed to initialize SPI port %d\n", port);
leave_critical_section(flags);
return NULL;
}

6
arch/arm/src/efm32/efm32_timer.c
View file

@ -68,7 +68,7 @@
#endif
#ifdef CONFIG_DEBUG_TIMER
# define efm32_timerdbg dbg
# define efm32_timererr err
# define efm32_timerllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define efm32_timerinfo info
@ -80,7 +80,7 @@
# define efm32_timer_dumpgpio(p,m)
# endif
#else
# define efm32_timerdbg(x...)
# define efm32_timererr(x...)
# define efm32_timerllerr(x...)
# define efm32_timerinfo(x...)
# define efm32_timerllinfo(x...)
@ -262,7 +262,7 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
reload = (clk_freq / prescaler / freq);
efm32_timerdbg("Source: %4xHz Div: %4x Reload: %4x \n",
efm32_timererr("Source: %4xHz Div: %4x Reload: %4x \n",
clk_freq, prescaler, reload);
putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);

6
arch/arm/src/efm32/efm32_usbdev.c
View file

@ -3799,7 +3799,7 @@ static int efm32_epout_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
break;
default:
udbg("Unsupported maxpacket: %d\n", maxpacket);
uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@ -3894,7 +3894,7 @@ static int efm32_epin_configure(FAR struct efm32_ep_s *privep, uint8_t eptype,
break;
default:
udbg("Unsupported maxpacket: %d\n", maxpacket);
uerr("Unsupported maxpacket: %d\n", maxpacket);
return -EINVAL;
}
}
@ -5482,7 +5482,7 @@ void up_usbinitialize(void)
ret = irq_attach(EFM32_IRQ_USB, efm32_usbinterrupt);
if (ret < 0)
{
udbg("irq_attach failed\n", ret);
uerr("irq_attach failed\n", ret);
goto errout;
}

30
arch/arm/src/efm32/efm32_usbhost.c
View file

@ -1362,7 +1362,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
ctrlep = (FAR struct efm32_ctrlinfo_s *)kmm_malloc(sizeof(struct efm32_ctrlinfo_s));
if (ctrlep == NULL)
{
udbg("ERROR: Failed to allocate control endpoint container\n");
uerr("ERROR: Failed to allocate control endpoint container\n");
return -ENOMEM;
}
@ -1372,7 +1372,7 @@ static int efm32_ctrlep_alloc(FAR struct efm32_usbhost_s *priv,
hport->funcaddr, hport->speed, ctrlep);
if (ret < 0)
{
udbg("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
uerr("ERROR: efm32_ctrlchan_alloc failed: %d\n", ret);
kmm_free(ctrlep);
return ret;
}
@ -1424,7 +1424,7 @@ static int efm32_xfrep_alloc(FAR struct efm32_usbhost_s *priv,
chidx = efm32_chan_alloc(priv);
if (chidx < 0)
{
udbg("ERROR: Failed to allocate a host channel\n");
uerr("ERROR: Failed to allocate a host channel\n");
return -ENOMEM;
}
@ -1934,7 +1934,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_in_setup(priv, chidx);
if (ret < 0)
{
udbg("ERROR: efm32_in_setup failed: %d\n", ret);
uerr("ERROR: efm32_in_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@ -1965,7 +1965,7 @@ static ssize_t efm32_in_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
}
@ -2010,7 +2010,7 @@ static void efm32_in_next(FAR struct efm32_usbhost_s *priv,
return;
}
udbg("ERROR: efm32_in_setup failed: %d\n", ret);
uerr("ERROR: efm32_in_setup failed: %d\n", ret);
result = ret;
}
@ -2068,7 +2068,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@ -2077,7 +2077,7 @@ static int efm32_in_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_in_setup(priv, chidx);
if (ret < 0)
{
udbg("ERROR: efm32_in_setup failed: %d\n", ret);
uerr("ERROR: efm32_in_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@ -2203,7 +2203,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_out_setup(priv, chidx);
if (ret < 0)
{
udbg("ERROR: efm32_out_setup failed: %d\n", ret);
uerr("ERROR: efm32_out_setup failed: %d\n", ret);
return (ssize_t)ret;
}
@ -2231,7 +2231,7 @@ static ssize_t efm32_out_transfer(FAR struct efm32_usbhost_s *priv, int chidx,
{
/* Break out and return the error */
udbg("ERROR: efm32_chan_wait failed: %d\n", ret);
uerr("ERROR: efm32_chan_wait failed: %d\n", ret);
return (ssize_t)ret;
}
@ -2296,7 +2296,7 @@ static void efm32_out_next(FAR struct efm32_usbhost_s *priv,
return;
}
udbg("ERROR: efm32_out_setup failed: %d\n", ret);
uerr("ERROR: efm32_out_setup failed: %d\n", ret);
result = ret;
}
@ -2354,7 +2354,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_chan_asynchsetup(priv, chan, callback, arg);
if (ret < 0)
{
udbg("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
uerr("ERROR: efm32_chan_asynchsetup failed: %d\n", ret);
return ret;
}
@ -2363,7 +2363,7 @@ static int efm32_out_asynch(FAR struct efm32_usbhost_s *priv, int chidx,
ret = efm32_out_setup(priv, chidx);
if (ret < 0)
{
udbg("ERROR: efm32_out_setup failed: %d\n", ret);
uerr("ERROR: efm32_out_setup failed: %d\n", ret);
}
/* And return with the transfer pending */
@ -3932,7 +3932,7 @@ static int efm32_rh_enumerate(FAR struct efm32_usbhost_s *priv,
ret = efm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0);
if (ret < 0)
{
udbg("ERROR: Failed to allocate a control endpoint: %d\n", ret);
uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret);
}
return ret;
@ -3978,7 +3978,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
{
/* Return to the disconnected state */
udbg("ERROR: Enumeration failed: %d\n", ret);
uerr("ERROR: Enumeration failed: %d\n", ret);
efm32_gint_disconnected(priv);
}

10
arch/arm/src/kinetis/kinetis_enet.c
View file

@ -918,7 +918,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
uint8_t *mac = dev->d_mac.ether_addr_octet;
uint32_t regval;
ndbg("Bringing up: %d.%d.%d.%d\n",
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@ -1695,7 +1695,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
ndbg("Failed to attach EMACTMR IRQ\n");
nerr("Failed to attach EMACTMR IRQ\n");
return -EAGAIN;
}
#endif
@ -1706,7 +1706,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
ndbg("Failed to attach EMACTX IRQ\n");
nerr("Failed to attach EMACTX IRQ\n");
return -EAGAIN;
}
@ -1716,7 +1716,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
ndbg("Failed to attach EMACRX IRQ\n");
nerr("Failed to attach EMACRX IRQ\n");
return -EAGAIN;
}
@ -1726,7 +1726,7 @@ int kinetis_netinitialize(int intf)
{
/* We could not attach the ISR to the interrupt */
ndbg("Failed to attach EMACMISC IRQ\n");
nerr("Failed to attach EMACMISC IRQ\n");
return -EAGAIN;
}

18
arch/arm/src/kinetis/kinetis_irq.c
View file

@ -159,7 +159,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: kinetis_nmi, kinetis_busfault, kinetis_usagefault, kinetis_pendsv,
* kinetis_dbgmonitor, kinetis_pendsv, kinetis_reserved
* kinetis_errmonitor, kinetis_pendsv, kinetis_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@ -172,7 +172,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
static int kinetis_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -180,7 +180,7 @@ static int kinetis_nmi(int irq, FAR void *context)
static int kinetis_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Bus fault recived\n");
err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@ -188,7 +188,7 @@ static int kinetis_busfault(int irq, FAR void *context)
static int kinetis_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Usage fault received\n");
err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@ -196,15 +196,15 @@ static int kinetis_usagefault(int irq, FAR void *context)
static int kinetis_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int kinetis_dbgmonitor(int irq, FAR void *context)
static int kinetis_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Debug Monitor received\n");
err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@ -212,7 +212,7 @@ static int kinetis_dbgmonitor(int irq, FAR void *context)
static int kinetis_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@ -428,7 +428,7 @@ void up_irqinitialize(void)
irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault);
irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv);
irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor);
irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_errmonitor);
irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved);
#endif

10
arch/arm/src/kinetis/kinetis_pwm.c
View file

@ -83,7 +83,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -95,7 +95,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -519,7 +519,7 @@ static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
break;
default:
pwmdbg("No such channel: %d\n", priv->channel);
pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@ -711,7 +711,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
break;
default:
pwmdbg("No such channel: %d\n", priv->channel);
pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@ -798,7 +798,7 @@ FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

72
arch/arm/src/kinetis/kinetis_sdhc.c
View file

@ -574,29 +574,29 @@ static void kinetis_sample(struct kinetis_dev_s *priv, int index)
static void kinetis_dumpsample(struct kinetis_dev_s *priv,
struct kinetis_sdhcregs_s *regs, const char *msg)
{
fdbg("SDHC Registers: %s\n", msg);
fdbg(" DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR, regs->dsaddr);
fdbg(" BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR, regs->blkattr);
fdbg(" CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG, regs->cmdarg);
fdbg(" XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP, regs->xferty);
fdbg(" CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0, regs->cmdrsp0);
fdbg(" CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1, regs->cmdrsp1);
fdbg(" CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2, regs->cmdrsp2);
fdbg(" CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3, regs->cmdrsp3);
fdbg(" PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT, regs->prsstat);
fdbg(" PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL, regs->proctl);
fdbg(" SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL, regs->sysctl);
fdbg(" IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT, regs->irqstat);
fdbg("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
fdbg(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN, regs->irqsigen);
fdbg(" AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR, regs->ac12err);
fdbg(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT, regs->htcapblt);
fdbg(" WML[%08x]: %08x\n", KINETIS_SDHC_WML, regs->wml);
fdbg(" ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES, regs->admaes);
fdbg(" ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR, regs->adsaddr);
fdbg(" VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR, regs->vendor);
fdbg(" MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT, regs->mmcboot);
fdbg(" HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER, regs->hostver);
ferr("SDHC Registers: %s\n", msg);
ferr(" DSADDR[%08x]: %08x\n", KINETIS_SDHC_DSADDR, regs->dsaddr);
ferr(" BLKATTR[%08x]: %08x\n", KINETIS_SDHC_BLKATTR, regs->blkattr);
ferr(" CMDARG[%08x]: %08x\n", KINETIS_SDHC_CMDARG, regs->cmdarg);
ferr(" XFERTY[%08x]: %08x\n", KINETIS_SDHC_XFERTYP, regs->xferty);
ferr(" CMDRSP0[%08x]: %08x\n", KINETIS_SDHC_CMDRSP0, regs->cmdrsp0);
ferr(" CMDRSP1[%08x]: %08x\n", KINETIS_SDHC_CMDRSP1, regs->cmdrsp1);
ferr(" CMDRSP2[%08x]: %08x\n", KINETIS_SDHC_CMDRSP2, regs->cmdrsp2);
ferr(" CMDRSP3[%08x]: %08x\n", KINETIS_SDHC_CMDRSP3, regs->cmdrsp3);
ferr(" PRSSTAT[%08x]: %08x\n", KINETIS_SDHC_PRSSTAT, regs->prsstat);
ferr(" PROCTL[%08x]: %08x\n", KINETIS_SDHC_PROCTL, regs->proctl);
ferr(" SYSCTL[%08x]: %08x\n", KINETIS_SDHC_SYSCTL, regs->sysctl);
ferr(" IRQSTAT[%08x]: %08x\n", KINETIS_SDHC_IRQSTAT, regs->irqstat);
ferr("IRQSTATEN[%08x]: %08x\n", KINETIS_SDHC_IRQSTATEN, regs->irqstaten);
ferr(" IRQSIGEN[%08x]: %08x\n", KINETIS_SDHC_IRQSIGEN, regs->irqsigen);
ferr(" AC12ERR[%08x]: %08x\n", KINETIS_SDHC_AC12ERR, regs->ac12err);
ferr(" HTCAPBLT[%08x]: %08x\n", KINETIS_SDHC_HTCAPBLT, regs->htcapblt);
ferr(" WML[%08x]: %08x\n", KINETIS_SDHC_WML, regs->wml);
ferr(" ADMAES[%08x]: %08x\n", KINETIS_SDHC_ADMAES, regs->admaes);
ferr(" ADSADDR[%08x]: %08x\n", KINETIS_SDHC_ADSADDR, regs->adsaddr);
ferr(" VENDOR[%08x]: %08x\n", KINETIS_SDHC_VENDOR, regs->vendor);
ferr(" MMCBOOT[%08x]: %08x\n", KINETIS_SDHC_MMCBOOT, regs->mmcboot);
ferr(" HOSTVER[%08x]: %08x\n", KINETIS_SDHC_HOSTVER, regs->hostver);
}
#endif
@ -1840,7 +1840,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
{
if (--timeout <= 0)
{
fdbg("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
ferr("ERROR: Timeout cmd: %08x PRSSTAT: %08x\n",
cmd, getreg32(KINETIS_SDHC_PRSSTAT));
return -EBUSY;
@ -2079,7 +2079,7 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
if (--timeout <= 0)
{
fdbg("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
ferr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n",
cmd, getreg32(KINETIS_SDHC_IRQSTAT));
return -ETIMEDOUT;
@ -2090,7 +2090,7 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
if ((getreg32(KINETIS_SDHC_IRQSTAT) & errors) != 0)
{
fdbg("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
ferr("ERROR: cmd: %08x errors: %08x IRQSTAT: %08x\n",
cmd, errors, getreg32(KINETIS_SDHC_IRQSTAT));
ret = -EIO;
}
@ -2155,7 +2155,7 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
fdbg("ERROR: rshort=NULL\n");
ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@ -2165,7 +2165,7 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2176,12 +2176,12 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if ((regval & SDHC_INT_CTOE) != 0)
{
fdbg("ERROR: Command timeout: %08x\n", regval);
ferr("ERROR: Command timeout: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDHC_INT_CCE) != 0)
{
fdbg("ERROR: CRC failure: %08x\n", regval);
ferr("ERROR: CRC failure: %08x\n", regval);
ret = -EIO;
}
}
@ -2214,7 +2214,7 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2225,12 +2225,12 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if (regval & SDHC_INT_CTOE)
{
fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
ferr("ERROR: Timeout IRQSTAT: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDHC_INT_CCE)
{
fdbg("ERROR: CRC fail IRQSTAT: %08x\n", regval);
ferr("ERROR: CRC fail IRQSTAT: %08x\n", regval);
ret = -EIO;
}
}
@ -2267,7 +2267,7 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2280,7 +2280,7 @@ static int kinetis_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
regval = getreg32(KINETIS_SDHC_IRQSTAT);
if (regval & SDHC_INT_CTOE)
{
fdbg("ERROR: Timeout IRQSTAT: %08x\n", regval);
ferr("ERROR: Timeout IRQSTAT: %08x\n", regval);
ret = -ETIMEDOUT;
}
}
@ -2416,7 +2416,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
fdbg("ERROR: wd_start failed: %d\n", ret);
ferr("ERROR: wd_start failed: %d\n", ret);
}
}

2
arch/arm/src/kinetis/kinetis_start.c
View file

@ -156,7 +156,7 @@ void __start(void)
/* Show reset status */
dbg("Reset status: %02x:%02x\n",
err("Reset status: %02x:%02x\n",
getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
/* Then start NuttX */

40
arch/arm/src/kinetis/kinetis_usbdev.c
View file

@ -369,7 +369,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# undef CONFIG_KHCI_USBDEV_BDTDEBUG
# define CONFIG_KHCI_USBDEV_BDTDEBUG 1
# define regdbg llerr
# define regerr llerr
# ifdef CONFIG_DEBUG_INFO
# define reginfo llerr
# else
@ -380,7 +380,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# define khci_getreg(addr) getreg8(addr)
# define khci_putreg(val,addr) putreg8(val,addr)
# define regdbg(x...)
# define regerr(x...)
# define reginfo(x...)
#endif
@ -389,7 +389,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG
# define bdtdbg llerr
# define bdterr llerr
# ifdef CONFIG_DEBUG_INFO
# define bdtinfo llerr
# else
@ -398,7 +398,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#else
# define bdtdbg(x...)
# define bdterr(x...)
# define bdtinfo(x...)
#endif
@ -953,7 +953,7 @@ static void khci_epwrite(struct khci_ep_s *privep,
/* And, finally, give the BDT to the USB */
bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
bdterr("EP%d BDT IN [%p] {%08x, %08x}\n",
USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr);
bdt->status = status;
@ -994,7 +994,7 @@ static void khci_wrcomplete(struct khci_usbdev_s *priv,
epno, privreq->req.len, privreq->req.xfrd,
privreq->inflight[0], privreq->inflight[1]);
#endif
bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n",
bdterr("EP%d BDT IN [%p] {%08x, %08x}\n",
epno, bdtin, bdtin->status, bdtin->addr);
/* We should own the BDT that just completed. But NULLify the entire BDT IN.
@ -1419,7 +1419,7 @@ static int khci_rdcomplete(struct khci_usbdev_s *priv,
ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",
bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n",
epno, bdtout, bdtout->status, bdtout->addr);
/* We should own the BDT that just completed */
@ -1563,7 +1563,7 @@ static int khci_ep0rdsetup(struct khci_usbdev_s *priv, uint8_t *dest,
/* Then give the BDT to the USB */
bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
bdterr("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr);
bdtout->status = status;
priv->ctrlstate = CTRLSTATE_RDREQUEST;
@ -1664,7 +1664,7 @@ static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen)
/* Then give the BDT to the USB */
bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr);
bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr);
bdtout->status = status;
return OK;
@ -2676,7 +2676,7 @@ static void khci_ep0transfer(struct khci_usbdev_s *priv, uint16_t ustat)
bdt = &g_bdt[index];
priv->eplist[0].bdtout = bdt;
bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
bdterr("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr);
/* Check the current EP0 OUT buffer contains a SETUP packet */
@ -3299,7 +3299,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
bdterr("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@ -3307,7 +3307,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
bdterr("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
}
if (!epin || bidi)
@ -3321,7 +3321,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
/* Now do the same for the other buffer. */
@ -3329,7 +3329,7 @@ static int khci_epconfigure(struct usbdev_ep_s *ep,
bdt->status = 0;
bdt->addr = 0;
bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
bdterr("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr);
}
/* Get the maxpacket size of the endpoint. */
@ -3666,9 +3666,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = (uint8_t *)physaddr;
bdt->status = (USB_BDT_UOWN | bytecount);
bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
bdterr("EP0 BDT IN [%p] {%08x, %08x}\n",
bdt, bdt->status, bdt->addr);
bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n",
bdterr("EP0 BDT IN [%p] {%08x, %08x}\n",
otherbdt, otherbdt->status, otherbdt->addr);
}
else
@ -3683,9 +3683,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
bdt->addr = 0;
bdt->status = 0;
bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
/* Restart any queued requests (after a delay so that we can be assured
@ -3718,9 +3718,9 @@ static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin)
khci_rqstop(privep);
bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr);
bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n",
bdterr("EP%d BDT %s [%p] {%08x, %08x}\n",
epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr);
}

8
arch/arm/src/kl/kl_irq.c
View file

@ -128,7 +128,7 @@ static void kl_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: kl_nmi, kl_busfault, kl_usagefault, kl_pendsv,
* kl_dbgmonitor, kl_pendsv, kl_reserved
* kl_errmonitor, kl_pendsv, kl_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@ -141,7 +141,7 @@ static void kl_dumpnvic(const char *msg, int irq)
static int kl_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -149,7 +149,7 @@ static int kl_nmi(int irq, FAR void *context)
static int kl_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@ -157,7 +157,7 @@ static int kl_pendsv(int irq, FAR void *context)
static int kl_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}

10
arch/arm/src/kl/kl_pwm.c
View file

@ -80,7 +80,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -92,7 +92,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -483,7 +483,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
break;
default:
pwmdbg("No such channel: %d\n", priv->channel);
pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@ -663,7 +663,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
break;
default:
pwmdbg("No such channel: %d\n", priv->channel);
pwmerr("No such channel: %d\n", priv->channel);
return -EINVAL;
}
@ -750,7 +750,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

8
arch/arm/src/kl/kl_spi.c
View file

@ -71,14 +71,14 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -364,7 +364,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
spidbg("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -687,7 +687,7 @@ FAR struct spi_dev_s *kl_spibus_initialize(int port)
else
#endif
{
spidbg("ERROR: Port %d not configured\n", port);
spierr("ERROR: Port %d not configured\n", port);
return NULL;
}

2
arch/arm/src/lpc11xx/lpc11_i2c.c
View file

@ -485,7 +485,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
if (port > 1)
{
dbg("lpc I2C Only support 0,1\n");
err("lpc I2C Only support 0,1\n");
return NULL;
}

8
arch/arm/src/lpc11xx/lpc11_irq.c
View file

@ -124,7 +124,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc11_nmi, lpc11_busfault, lpc11_usagefault, lpc11_pendsv,
* lpc11_dbgmonitor, lpc11_pendsv, lpc11_reserved
* lpc11_errmonitor, lpc11_pendsv, lpc11_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@ -137,7 +137,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
static int lpc11_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -145,7 +145,7 @@ static int lpc11_nmi(int irq, FAR void *context)
static int lpc11_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
@ -153,7 +153,7 @@ static int lpc11_pendsv(int irq, FAR void *context)
static int lpc11_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}

2
arch/arm/src/lpc11xx/lpc11_serial.c
View file

@ -638,7 +638,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

10
arch/arm/src/lpc11xx/lpc11_spi.c
View file

@ -80,14 +80,14 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -292,7 +292,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev,
priv->frequency = frequency;
priv->actual = actual;
spidbg("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -456,7 +456,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -503,7 +503,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

16
arch/arm/src/lpc11xx/lpc11_ssp.c
View file

@ -81,14 +81,14 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define sspdbg llerr
# define ssperr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define sspdbg(x...)
# define ssperr(x...)
# define spiinfo(x...)
#endif
@ -474,7 +474,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
sspdbg("Frequency %d->%d\n", frequency, actual);
ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -525,7 +525,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
sspdbg("Bad mode: %d\n", mode);
ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@ -613,7 +613,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
sspdbg("%04x->%04x\n", wd, regval);
ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@ -651,7 +651,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
/* Loop while thre are bytes remaining to be sent */
sspdbg("nwords: %d\n", nwords);
ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords > 0)
{
@ -679,7 +679,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
sspdbg("discarding\n");
ssperr("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@ -744,7 +744,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* occurred).
*/
sspdbg("nwords: %d\n", nwords);
ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords || rxpending)
{

24
arch/arm/src/lpc11xx/lpc11_timer.c
View file

@ -89,7 +89,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -101,7 +101,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -245,8 +245,8 @@ static void timer_putreg(struct lpc11_timer_s *priv, int offset,
#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
{
pwmdbg("%s:\n", msg);
pwmdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwmerr("%s:\n", msg);
pwmerr(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@ -254,7 +254,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC11_TMR0)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwmdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwmerr(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC11_PWM_MR0_OFFSET),
timer_getreg(priv, LPC11_PWM_MR1_OFFSET),
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
@ -263,7 +263,7 @@ static void timer_dumpregs(struct lpc11_timer_s *priv, FAR const char *msg)
else
#endif
{
pwmdbg(" DCR: %04x DMAR: %04x\n",
pwmerr(" DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC11_PWM_MR2_OFFSET),
timer_getreg(priv, LPC11_PWM_MR3_OFFSET));
}
@ -469,7 +469,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc11_timer_s *priv = (FAR struct lpc11_timer_s *)dev;
uint32_t pincfg;
pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@ -525,7 +525,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmdbg("TIM%d\n", priv->timid);
pwmerr("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@ -551,7 +551,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@ -580,7 +580,7 @@ static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
/* There are no platform-specific ioctl commands */
pwmdbg("TIM%d\n", priv->timid);
pwmerr("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@ -610,7 +610,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
{
FAR struct lpc11_timer_s *lower;
pwmdbg("TIM%d\n", timer);
pwmerr("TIM%d\n", timer);
switch (timer)
{
@ -624,7 +624,7 @@ FAR struct pwm_lowerhalf_s *lpc11_timerinitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

4
arch/arm/src/lpc17xx/lpc176x_rtc.c
View file

@ -81,12 +81,12 @@
/* Debug ****************************************************************************/
#ifdef CONFIG_DEBUG_RTC
# define rtcdbg dbg
# define rtcerr err
# define rtcinfo info
# define rtcllerr llerr
# define rtcllinfo llinfo
#else
# define rtcdbg(x...)
# define rtcerr(x...)
# define rtcinfo(x...)
# define rtcllerr(x...)
# define rtcllinfo(x...)

16
arch/arm/src/lpc17xx/lpc17_can.c
View file

@ -166,16 +166,16 @@
#ifdef CONFIG_DEBUG_CAN
# ifdef CONFIG_CAN_REGDEBUG
# define candbg llerr
# define canerr llerr
# define caninfo llinfo
# else
# define candbg dbg
# define canerr err
# define caninfo info
# endif
# define canllerr llerr
# define canllinfo llinfo
#else
# define candbg(x...)
# define canerr(x...)
# define caninfo(x...)
# define canllerr(x...)
# define canllinfo(x...)
@ -520,7 +520,7 @@ static void can_reset(FAR struct can_dev_s *dev)
ret = can_bittiming(priv);
if (ret != OK)
{
candbg("ERROR: Failed to set bit timing: %d\n", ret);
canerr("ERROR: Failed to set bit timing: %d\n", ret);
}
/* Restart the CAN */
@ -697,7 +697,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
{
dbg("Fix me:Not Implemented\n");
err("Fix me:Not Implemented\n");
return 0;
}
@ -717,7 +717,7 @@ static int can_ioctl(FAR struct can_dev_s *dev, int cmd, unsigned long arg)
static int can_remoterequest(FAR struct can_dev_s *dev, uint16_t id)
{
dbg("Fix me:Not Implemented\n");
err("Fix me:Not Implemented\n");
return 0;
}
@ -878,7 +878,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
}
else
{
candbg("No available transmission buffer, SR: %08x\n", regval);
canerr("No available transmission buffer, SR: %08x\n", regval);
ret = -EBUSY;
}
@ -1299,7 +1299,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
else
#endif
{
candbg("Unsupported port: %d\n", port);
canerr("Unsupported port: %d\n", port);
leave_critical_section(flags);
return NULL;
}

2
arch/arm/src/lpc17xx/lpc17_dac.c
View file

@ -172,7 +172,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{
dbg("Fix me:Not Implemented\n");
err("Fix me:Not Implemented\n");
return 0;
}

40
arch/arm/src/lpc17xx/lpc17_ethernet.c
View file

@ -415,7 +415,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv);
#ifdef CONFIG_NET_REGDEBUG
static void lpc17_printreg(uint32_t addr, uint32_t val, bool iswrite)
{
dbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
err("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val);
}
#endif
@ -465,7 +465,7 @@ static void lpc17_checkreg(uint32_t addr, uint32_t val, bool iswrite)
{
/* No.. More than one. */
dbg("[repeats %d more times]\n", count);
err("[repeats %d more times]\n", count);
}
}
@ -1720,7 +1720,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
uint32_t regval;
int ret;
ndbg("Bringing up: %d.%d.%d.%d\n",
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
@ -1733,7 +1733,7 @@ static int lpc17_ifup(struct net_driver_s *dev)
ret = lpc17_phyinit(priv);
if (ret != 0)
{
ndbg("lpc17_phyinit failed: %d\n", ret);
nerr("lpc17_phyinit failed: %d\n", ret);
return ret;
}
@ -2319,14 +2319,14 @@ static void lpc17_showpins(void)
#if defined(CONFIG_NET_REGDEBUG) && defined(LPC17_HAVE_PHY)
static void lpc17_showmii(uint8_t phyaddr, const char *msg)
{
dbg("PHY " LPC17_PHYNAME ": %s\n", msg);
dbg(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
dbg(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
dbg(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
dbg(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
dbg(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
err("PHY " LPC17_PHYNAME ": %s\n", msg);
err(" MCR: %04x\n", lpc17_phyread(phyaddr, MII_MCR));
err(" MSR: %04x\n", lpc17_phyread(phyaddr, MII_MSR));
err(" ADVERTISE: %04x\n", lpc17_phyread(phyaddr, MII_ADVERTISE));
err(" LPA: %04x\n", lpc17_phyread(phyaddr, MII_LPA));
err(" EXPANSION: %04x\n", lpc17_phyread(phyaddr, MII_EXPANSION));
#ifdef CONFIG_ETH0_PHY_KS8721
dbg(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
err(" 10BTCR: %04x\n", lpc17_phyread(phyaddr, MII_KS8721_10BTCR));
#endif
}
#endif
@ -2462,7 +2462,7 @@ static inline int lpc17_phyreset(uint8_t phyaddr)
}
}
ndbg("Reset failed. MCR: %04x\n", phyreg);
nerr("Reset failed. MCR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2509,7 +2509,7 @@ static inline int lpc17_phyautoneg(uint8_t phyaddr)
}
}
ndbg("Auto-negotiation failed. MSR: %04x\n", phyreg);
nerr("Auto-negotiation failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2593,7 +2593,7 @@ static int lpc17_phymode(uint8_t phyaddr, uint8_t mode)
#endif
}
ndbg("Link failed. MSR: %04x\n", phyreg);
nerr("Link failed. MSR: %04x\n", phyreg);
return -ETIMEDOUT;
}
#endif
@ -2673,7 +2673,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
{
/* Failed to find PHY at any location */
ndbg("No PHY detected\n");
nerr("No PHY detected\n");
return -ENODEV;
}
ninfo("phyaddr: %d\n", phyaddr);
@ -2760,7 +2760,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
ndbg("Unrecognized mode: %04x\n", phyreg);
nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2788,7 +2788,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
ndbg("Unrecognized mode: %04x\n", phyreg);
nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2816,7 +2816,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
break;
default:
ndbg("Unrecognized mode: %04x\n", phyreg);
nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
@ -2862,7 +2862,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
}
else
{
ndbg("Unrecognized mode: %04x\n", phyreg);
nerr("Unrecognized mode: %04x\n", phyreg);
return -ENODEV;
}
}
@ -2871,7 +2871,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
# warning "PHY Unknown: speed and duplex are bogus"
#endif
ndbg("%dBase-T %s duplex\n",
nerr("%dBase-T %s duplex\n",
(priv->lp_mode & LPC17_SPEED_MASK) == LPC17_SPEED_100 ? 100 : 10,
(priv->lp_mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL ?"full" : "half");

38
arch/arm/src/lpc17xx/lpc17_gpdma.c
View file

@ -707,47 +707,47 @@ void lpc17_dmadump(DMA_HANDLE handle, const struct lpc17_dmaregs_s *regs,
/* Dump the sampled global DMA registers */
dmadbg("Global GPDMA Registers: %s\n", msg);
dmadbg(" INTST[%08x]: %08x\n",
dmaerr("Global GPDMA Registers: %s\n", msg);
dmaerr(" INTST[%08x]: %08x\n",
LPC17_DMA_INTST, regs->gbl.intst);
dmadbg(" INTTCST[%08x]: %08x\n",
dmaerr(" INTTCST[%08x]: %08x\n",
LPC17_DMA_INTTCST, regs->gbl.inttcst);
dmadbg(" INTERRST[%08x]: %08x\n",
dmaerr(" INTERRST[%08x]: %08x\n",
LPC17_DMA_INTERRST, regs->gbl.interrst);
dmadbg(" RAWINTTCST[%08x]: %08x\n",
dmaerr(" RAWINTTCST[%08x]: %08x\n",
LPC17_DMA_RAWINTTCST, regs->gbl.rawinttcst);
dmadbg(" RAWINTERRST[%08x]: %08x\n",
dmaerr(" RAWINTERRST[%08x]: %08x\n",
LPC17_DMA_RAWINTERRST, regs->gbl.rawinterrst);
dmadbg(" ENBLDCHNS[%08x]: %08x\n",
dmaerr(" ENBLDCHNS[%08x]: %08x\n",
LPC17_DMA_ENBLDCHNS, regs->gbl.enbldchns);
dmadbg(" SOFTBREQ[%08x]: %08x\n",
dmaerr(" SOFTBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTBREQ, regs->gbl.softbreq);
dmadbg(" SOFTSREQ[%08x]: %08x\n",
dmaerr(" SOFTSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTSREQ, regs->gbl.softsreq);
dmadbg(" SOFTLBREQ[%08x]: %08x\n",
dmaerr(" SOFTLBREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLBREQ, regs->gbl.softlbreq);
dmadbg(" SOFTLSREQ[%08x]: %08x\n",
dmaerr(" SOFTLSREQ[%08x]: %08x\n",
LPC17_DMA_SOFTLSREQ, regs->gbl.softlsreq);
dmadbg(" CONFIG[%08x]: %08x\n",
dmaerr(" CONFIG[%08x]: %08x\n",
LPC17_DMA_CONFIG, regs->gbl.config);
dmadbg(" SYNC[%08x]: %08x\n",
dmaerr(" SYNC[%08x]: %08x\n",
LPC17_DMA_SYNC, regs->gbl.sync);
/* Dump the DMA channel registers */
base = LPC17_DMACH_BASE((uint32_t)dmach->chn);
dmadbg("Channel GPDMA Registers: %d\n", dmach->chn);
dmaerr("Channel GPDMA Registers: %d\n", dmach->chn);
dmadbg(" SRCADDR[%08x]: %08x\n",
dmaerr(" SRCADDR[%08x]: %08x\n",
base + LPC17_DMACH_SRCADDR_OFFSET, regs->ch.srcaddr);
dmadbg(" DESTADDR[%08x]: %08x\n",
dmaerr(" DESTADDR[%08x]: %08x\n",
base + LPC17_DMACH_DESTADDR_OFFSET, regs->ch.destaddr);
dmadbg(" LLI[%08x]: %08x\n",
dmaerr(" LLI[%08x]: %08x\n",
base + LPC17_DMACH_LLI_OFFSET, regs->ch.lli);
dmadbg(" CONTROL[%08x]: %08x\n",
dmaerr(" CONTROL[%08x]: %08x\n",
base + LPC17_DMACH_CONTROL_OFFSET, regs->ch.control);
dmadbg(" CONFIG[%08x]: %08x\n",
dmaerr(" CONFIG[%08x]: %08x\n",
base + LPC17_DMACH_CONFIG_OFFSET, regs->ch.config);
}
#endif /* CONFIG_DEBUG_DMA */

2
arch/arm/src/lpc17xx/lpc17_i2c.c
View file

@ -485,7 +485,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
if (port > 1)
{
dbg("lpc I2C Only support 0,1\n");
err("lpc I2C Only support 0,1\n");
return NULL;
}

18
arch/arm/src/lpc17xx/lpc17_irq.c
View file

@ -137,7 +137,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc17_nmi, lpc17_busfault, lpc17_usagefault, lpc17_pendsv,
* lpc17_dbgmonitor, lpc17_pendsv, lpc17_reserved
* lpc17_errmonitor, lpc17_pendsv, lpc17_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
@ -150,7 +150,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
static int lpc17_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -158,7 +158,7 @@ static int lpc17_nmi(int irq, FAR void *context)
static int lpc17_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Bus fault recived\n");
err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@ -166,7 +166,7 @@ static int lpc17_busfault(int irq, FAR void *context)
static int lpc17_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Usage fault received\n");
err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@ -174,15 +174,15 @@ static int lpc17_usagefault(int irq, FAR void *context)
static int lpc17_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int lpc17_dbgmonitor(int irq, FAR void *context)
static int lpc17_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Debug Monitor received\n");
err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@ -190,7 +190,7 @@ static int lpc17_dbgmonitor(int irq, FAR void *context)
static int lpc17_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@ -400,7 +400,7 @@ void up_irqinitialize(void)
irq_attach(LPC17_IRQ_BUSFAULT, lpc17_busfault);
irq_attach(LPC17_IRQ_USAGEFAULT, lpc17_usagefault);
irq_attach(LPC17_IRQ_PENDSV, lpc17_pendsv);
irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_dbgmonitor);
irq_attach(LPC17_IRQ_DBGMONITOR, lpc17_errmonitor);
irq_attach(LPC17_IRQ_RESERVED, lpc17_reserved);
#endif

8
arch/arm/src/lpc17xx/lpc17_lcd.c
View file

@ -209,7 +209,7 @@ static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
return OK;
}
gdbg("Returning EINVAL\n");
gerr("Returning EINVAL\n");
return -EINVAL;
}
@ -227,7 +227,7 @@ static int lpc17_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
return OK;
}
gdbg("Returning EINVAL\n");
gerr("Returning EINVAL\n");
return -EINVAL;
}
@ -403,7 +403,7 @@ static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
return OK;
}
gdbg("Returning EINVAL\n");
gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif
@ -443,7 +443,7 @@ static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
return OK;
}
gdbg("Returning EINVAL\n");
gerr("Returning EINVAL\n");
return -EINVAL;
}
#endif

6
arch/arm/src/lpc17xx/lpc17_mcpwm.c
View file

@ -88,7 +88,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -100,7 +100,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -674,7 +674,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

6
arch/arm/src/lpc17xx/lpc17_pwm.c
View file

@ -106,7 +106,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -118,7 +118,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -645,7 +645,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

44
arch/arm/src/lpc17xx/lpc17_sdcard.c
View file

@ -722,16 +722,16 @@ static void lpc17_sample(struct lpc17_dev_s *priv, int index)
#ifdef CONFIG_DEBUG_SDIO
static void lpc17_sdcard_dump(struct lpc17_sdcard_regs_s *regs, const char *msg)
{
fdbg("SD Card Registers: %s\n", msg);
fdbg(" POWER[%08x]: %08x\n", LPC17_SDCARD_PWR, regs->pwr);
fdbg(" CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK, regs->clkcr);
fdbg(" DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL, regs->dctrl);
fdbg(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER, regs->dtimer);
fdbg(" DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN, regs->dlen);
fdbg(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT, regs->dcount);
fdbg(" STA[%08x]: %08x\n", LPC17_SDCARD_STATUS, regs->sta);
fdbg(" MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0, regs->mask);
fdbg("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
ferr("SD Card Registers: %s\n", msg);
ferr(" POWER[%08x]: %08x\n", LPC17_SDCARD_PWR, regs->pwr);
ferr(" CLKCR[%08x]: %08x\n", LPC17_SDCARD_CLOCK, regs->clkcr);
ferr(" DCTRL[%08x]: %08x\n", LPC17_SDCARD_DCTRL, regs->dctrl);
ferr(" DTIMER[%08x]: %08x\n", LPC17_SDCARD_DTIMER, regs->dtimer);
ferr(" DLEN[%08x]: %08x\n", LPC17_SDCARD_DLEN, regs->dlen);
ferr(" DCOUNT[%08x]: %08x\n", LPC17_SDCARD_DCOUNT, regs->dcount);
ferr(" STA[%08x]: %08x\n", LPC17_SDCARD_STATUS, regs->sta);
ferr(" MASK[%08x]: %08x\n", LPC17_SDCARD_MASK0, regs->mask);
ferr("FIFOCNT[%08x]: %08x\n", LPC17_SDCARD_FIFOCNT, regs->fifocnt);
}
#endif
@ -1920,7 +1920,7 @@ static int lpc17_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
{
if (--timeout <= 0)
{
fdbg("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
ferr("ERROR: Timeout cmd: %08x events: %08x STA: %08x\n",
cmd, events, getreg32(LPC17_SDCARD_STATUS));
return -ETIMEDOUT;
@ -1987,7 +1987,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
{
fdbg("ERROR: rshort=NULL\n");
ferr("ERROR: rshort=NULL\n");
ret = -EINVAL;
}
@ -1997,7 +1997,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R1B_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2008,12 +2008,12 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
regval = getreg32(LPC17_SDCARD_STATUS);
if ((regval & SDCARD_STATUS_CTIMEOUT) != 0)
{
fdbg("ERROR: Command timeout: %08x\n", regval);
ferr("ERROR: Command timeout: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if ((regval & SDCARD_STATUS_CCRCFAIL) != 0)
{
fdbg("ERROR: CRC failure: %08x\n", regval);
ferr("ERROR: CRC failure: %08x\n", regval);
ret = -EIO;
}
#ifdef CONFIG_DEBUG_FEATURES
@ -2024,7 +2024,7 @@ static int lpc17_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t
respcmd = getreg32(LPC17_SDCARD_RESPCMD);
if ((uint8_t)(respcmd & SDCARD_RESPCMD_MASK) != (cmd & MMCSD_CMDIDX_MASK))
{
fdbg("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
ferr("ERROR: RESCMD=%02x CMD=%08x\n", respcmd, cmd);
ret = -EINVAL;
}
}
@ -2057,7 +2057,7 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2068,12 +2068,12 @@ static int lpc17_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t rlo
regval = getreg32(LPC17_SDCARD_STATUS);
if (regval & SDCARD_STATUS_CTIMEOUT)
{
fdbg("ERROR: Timeout STA: %08x\n", regval);
ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
else if (regval & SDCARD_STATUS_CCRCFAIL)
{
fdbg("ERROR: CRC fail STA: %08x\n", regval);
ferr("ERROR: CRC fail STA: %08x\n", regval);
ret = -EIO;
}
}
@ -2111,7 +2111,7 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R3_RESPONSE &&
(cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE)
{
fdbg("ERROR: Wrong response CMD=%08x\n", cmd);
ferr("ERROR: Wrong response CMD=%08x\n", cmd);
ret = -EINVAL;
}
else
@ -2124,7 +2124,7 @@ static int lpc17_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *r
regval = getreg32(LPC17_SDCARD_STATUS);
if (regval & SDCARD_STATUS_CTIMEOUT)
{
fdbg("ERROR: Timeout STA: %08x\n", regval);
ferr("ERROR: Timeout STA: %08x\n", regval);
ret = -ETIMEDOUT;
}
}
@ -2269,7 +2269,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
1, (uint32_t)priv);
if (ret != OK)
{
fdbg("ERROR: wd_start failed: %d\n", ret);
ferr("ERROR: wd_start failed: %d\n", ret);
}
}

2
arch/arm/src/lpc17xx/lpc17_serial.c
View file

@ -1153,7 +1153,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

10
arch/arm/src/lpc17xx/lpc17_spi.c
View file

@ -80,14 +80,14 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -287,7 +287,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
spidbg("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -449,7 +449,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -494,7 +494,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

16
arch/arm/src/lpc17xx/lpc17_ssp.c
View file

@ -81,14 +81,14 @@
*/
#ifdef CONFIG_DEBUG_SPI
# define sspdbg llerr
# define ssperr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define sspdbg(x...)
# define ssperr(x...)
# define spiinfo(x...)
#endif
@ -470,7 +470,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
sspdbg("Frequency %d->%d\n", frequency, actual);
ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -521,7 +521,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
sspdbg("Bad mode: %d\n", mode);
ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@ -609,7 +609,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC17_SSP_DR_OFFSET);
sspdbg("%04x->%04x\n", wd, regval);
ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@ -646,7 +646,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Loop while thre are bytes remaining to be sent */
sspdbg("nwords: %d\n", nwords);
ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords > 0)
{
@ -674,7 +674,7 @@ static void ssp_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
/* Then discard all card responses until the RX & TX FIFOs are emptied. */
sspdbg("discarding\n");
ssperr("discarding\n");
do
{
/* Is there anything in the RX fifo? */
@ -735,7 +735,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
/* While there is remaining to be sent (and no synchronization error has occurred) */
sspdbg("nwords: %d\n", nwords);
ssperr("nwords: %d\n", nwords);
u.pv = buffer;
while (nwords || rxpending)
{

24
arch/arm/src/lpc17xx/lpc17_timer.c
View file

@ -89,7 +89,7 @@
#endif
#ifdef CONFIG_DEBUG_PWM
# define pwmdbg dbg
# define pwmerr err
# define pwmllerr llerr
# ifdef CONFIG_DEBUG_INFO
# define pwminfo info
@ -101,7 +101,7 @@
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmerr(x...)
# define pwmllerr(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
@ -245,8 +245,8 @@ static void timer_putreg(struct lpc17_timer_s *priv, int offset,
#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
{
pwmdbg("%s:\n", msg);
pwmdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwmerr("%s:\n", msg);
pwmerr(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@ -254,7 +254,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC17_TMR0)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwmdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwmerr(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC17_PWM_MR0_OFFSET),
timer_getreg(priv, LPC17_PWM_MR1_OFFSET),
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
@ -263,7 +263,7 @@ static void timer_dumpregs(struct lpc17_timer_s *priv, FAR const char *msg)
else
#endif
{
pwmdbg(" DCR: %04x DMAR: %04x\n",
pwmerr(" DCR: %04x DMAR: %04x\n",
timer_getreg(priv, LPC17_PWM_MR2_OFFSET),
timer_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@ -469,7 +469,7 @@ static int timer_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_timer_s *priv = (FAR struct lpc17_timer_s *)dev;
uint32_t pincfg;
pwmdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwmerr("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@ -525,7 +525,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmdbg("TIM%d\n", priv->timid);
pwmerr("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@ -551,7 +551,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwmerr("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");
return OK;
}
@ -579,7 +579,7 @@ static int timer_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long a
/* There are no platform-specific ioctl commands */
pwmdbg("TIM%d\n", priv->timid);
pwmerr("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@ -609,7 +609,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
{
FAR struct lpc17_timer_s *lower;
pwmdbg("TIM%d\n", timer);
pwmerr("TIM%d\n", timer);
switch (timer)
{
@ -623,7 +623,7 @@ FAR struct pwm_lowerhalf_s *lpc17_timerinitialize(int timer)
#endif
default:
pwmdbg("No such timer configured\n");
pwmerr("No such timer configured\n");
return NULL;
}

40
arch/arm/src/lpc17xx/lpc17_usbhost.c
View file

@ -1547,7 +1547,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
return -ENOMEM;
}
@ -1566,7 +1566,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
ret = lpc17_wdhwait(priv, ed);
if (ret < 0)
{
udbg("ERROR: Device disconnected\n");
uerr("ERROR: Device disconnected\n");
goto errout_with_xfrinfo;
}
@ -1607,7 +1607,7 @@ static int lpc17_ctrltd(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed,
}
else
{
udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
ret = xfrinfo->tdstatus == TD_CC_STALL ? -EPERM : -EIO;
}
}
@ -1967,7 +1967,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
udbg("RHport Connected: %s\n",
uerr("RHport Connected: %s\n",
connport->connected ? "YES" : "NO");
return OK;
@ -1987,7 +1987,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
udbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
uerr("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@ -2041,7 +2041,7 @@ static int lpc17_rh_enumerate(struct usbhost_connection_s *conn,
{
/* No, return an error */
udbg("Not connected\n");
uerr("Not connected\n");
return -ENODEV;
}
@ -2093,7 +2093,7 @@ static int lpc17_enumerate(FAR struct usbhost_connection_s *conn,
ret = usbhost_enumerate(hport, &hport->devclass);
if (ret < 0)
{
udbg("ERROR: Enumeration failed: %d\n", ret);
uerr("ERROR: Enumeration failed: %d\n", ret);
}
return ret;
@ -2299,7 +2299,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
{
/* No.. destroy it and report the error */
udbg("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
uerr("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
sem_destroy(&ed->wdhsem);
lpc17_edfree(ed);
}
@ -2947,7 +2947,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
nbytes = -ENOMEM;
goto errout_with_sem;
}
@ -2966,7 +2966,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &alloc);
if (ret < 0)
{
udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
nbytes = (ssize_t)ret;
goto errout_with_xfrinfo;
}
@ -2987,7 +2987,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_wdhwait(priv, ed);
if (ret < 0)
{
udbg("ERROR: Device disconnected\n");
uerr("ERROR: Device disconnected\n");
nbytes = (ssize_t)ret;
goto errout_with_buffers;
}
@ -2997,7 +2997,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_transfer_common(priv, ed, buffer, buflen);
if (ret < 0)
{
udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
nbytes = (ssize_t)ret;
goto errout_with_wdhwait;
}
@ -3021,7 +3021,7 @@ static ssize_t lpc17_transfer(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
* might understand.
*/
udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
switch (xfrinfo->tdstatus)
{
@ -3111,7 +3111,7 @@ static void lpc17_asynch_completion(struct lpc17_usbhost_s *priv,
* might understand.
*/
udbg("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
uerr("ERROR: Bad TD completion status: %d\n", xfrinfo->tdstatus);
switch (xfrinfo->tdstatus)
{
@ -3213,7 +3213,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
xfrinfo = lpc17_alloc_xfrinfo();
if (xfrinfo == NULL)
{
udbg("ERROR: lpc17_alloc_xfrinfo failed\n");
uerr("ERROR: lpc17_alloc_xfrinfo failed\n");
ret = -ENOMEM;
goto errout_with_sem;
}
@ -3234,7 +3234,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_dma_alloc(priv, ed, buffer, buflen, &xfrinfo->alloc);
if (ret < 0)
{
udbg("ERROR: lpc17_dma_alloc failed: %d\n", ret);
uerr("ERROR: lpc17_dma_alloc failed: %d\n", ret);
goto errout_with_sem;
}
@ -3251,7 +3251,7 @@ static int lpc17_asynch(struct usbhost_driver_s *drvr, usbhost_ep_t ep,
ret = lpc17_transfer_common(priv, ed, buffer, buflen);
if (ret < 0)
{
udbg("ERROR: lpc17_transfer_common failed: %d\n", ret);
uerr("ERROR: lpc17_transfer_common failed: %d\n", ret);
goto errout_with_asynch;
}
@ -3695,7 +3695,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
lpc17_configgpio(GPIO_USB_OVRCR); /* USB port Over-Current status */
usbhost_dumpgpio();
udbg("Initializing Host Stack\n");
uerr("Initializing Host Stack\n");
/* Show AHB SRAM memory map */
@ -3825,7 +3825,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
if (irq_attach(LPC17_IRQ_USB, lpc17_usbinterrupt) != 0)
{
udbg("Failed to attach IRQ\n");
uerr("Failed to attach IRQ\n");
return NULL;
}
@ -3850,7 +3850,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
/* Enable interrupts at the interrupt controller */
up_enable_irq(LPC17_IRQ_USB); /* enable USB interrupt */
udbg("USB host Initialized, Device connected:%s\n",
uerr("USB host Initialized, Device connected:%s\n",
priv->connected ? "YES" : "NO");
return &g_usbconn;

2
arch/arm/src/lpc214x/lpc214x_serial.c
View file

@ -549,7 +549,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

2
arch/arm/src/lpc2378/lpc23xx_i2c.c
View file

@ -490,7 +490,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
if (port > 1)
{
dbg("lpc I2C Only support 0,1\n");
err("lpc I2C Only support 0,1\n");
return NULL;
}

2
arch/arm/src/lpc2378/lpc23xx_serial.c
View file

@ -667,7 +667,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

10
arch/arm/src/lpc2378/lpc23xx_spi.c
View file

@ -79,14 +79,14 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -289,7 +289,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
spidbg("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -453,7 +453,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -498,7 +498,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

30
arch/arm/src/lpc31xx/lpc31_ehci.c
View file

@ -1463,11 +1463,11 @@ static int lpc31_qh_flush(struct lpc31_qh_s *qh)
#ifdef CONFIG_LPC31_EHCI_REGDEBUG
static void lpc31_qtd_print(struct lpc31_qtd_s *qtd)
{
udbg(" QTD[%p]:\n", qtd);
udbg(" hw:\n");
udbg(" nqp: %08x alt: %08x token: %08x\n",
uerr(" QTD[%p]:\n", qtd);
uerr(" hw:\n");
uerr(" nqp: %08x alt: %08x token: %08x\n",
qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
udbg(" bpl: %08x %08x %08x %08x %08x\n",
uerr(" bpl: %08x %08x %08x %08x %08x\n",
qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
qtd->hw.bpl[3], qtd->hw.bpl[4]);
}
@ -1487,29 +1487,29 @@ static void lpc31_qh_print(struct lpc31_qh_s *qh)
struct lpc31_epinfo_s *epinfo;
struct ehci_overlay_s *overlay;
udbg("QH[%p]:\n", qh);
udbg(" hw:\n");
udbg(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
uerr("QH[%p]:\n", qh);
uerr(" hw:\n");
uerr(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
overlay = &qh->hw.overlay;
udbg(" overlay:\n");
udbg(" nqp: %08x alt: %08x token: %08x\n",
uerr(" overlay:\n");
uerr(" nqp: %08x alt: %08x token: %08x\n",
overlay->nqp, overlay->alt, overlay->token);
udbg(" bpl: %08x %08x %08x %08x %08x\n",
uerr(" bpl: %08x %08x %08x %08x %08x\n",
overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
overlay->bpl[3], overlay->bpl[4]);
udbg(" fqp:\n", qh->fqp);
uerr(" fqp:\n", qh->fqp);
epinfo = qh->epinfo;
udbg(" epinfo[%p]:\n", epinfo);
uerr(" epinfo[%p]:\n", epinfo);
if (epinfo)
{
udbg(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
uerr(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
epinfo->xfrtype, epinfo->maxpacket);
udbg(" Toggle=%d iocwait=%d speed=%d result=%d\n",
uerr(" Toggle=%d iocwait=%d speed=%d result=%d\n",
epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
}
}
@ -4222,7 +4222,7 @@ static int lpc31_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = lpc31_async_setup(rhport, ep0info, req, buffer, len);
if (ret < 0)
{
udbg("ERROR: lpc31_async_setup failed: %d\n", ret);
uerr("ERROR: lpc31_async_setup failed: %d\n", ret);
goto errout_with_iocwait;
}

2
arch/arm/src/lpc31xx/lpc31_serial.c
View file

@ -560,7 +560,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

2
arch/arm/src/lpc43xx/lpc43_dac.c
View file

@ -173,7 +173,7 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg)
{
dbg("Fix me:Not Implemented\n");
err("Fix me:Not Implemented\n");
return 0;
}

30
arch/arm/src/lpc43xx/lpc43_ehci.c
View file

@ -1350,11 +1350,11 @@ static int lpc43_qh_discard(struct lpc43_qh_s *qh)
#ifdef CONFIG_LPC43_EHCI_REGDEBUG
static void lpc43_qtd_print(struct lpc43_qtd_s *qtd)
{
udbg(" QTD[%p]:\n", qtd);
udbg(" hw:\n");
udbg(" nqp: %08x alt: %08x token: %08x\n",
uerr(" QTD[%p]:\n", qtd);
uerr(" hw:\n");
uerr(" nqp: %08x alt: %08x token: %08x\n",
qtd->hw.nqp, qtd->hw.alt, qtd->hw.token);
udbg(" bpl: %08x %08x %08x %08x %08x\n",
uerr(" bpl: %08x %08x %08x %08x %08x\n",
qtd->hw.bpl[0], qtd->hw.bpl[1], qtd->hw.bpl[2],
qtd->hw.bpl[3], qtd->hw.bpl[4]);
}
@ -1374,29 +1374,29 @@ static void lpc43_qh_print(struct lpc43_qh_s *qh)
struct lpc43_epinfo_s *epinfo;
struct ehci_overlay_s *overlay;
udbg("QH[%p]:\n", qh);
udbg(" hw:\n");
udbg(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
uerr("QH[%p]:\n", qh);
uerr(" hw:\n");
uerr(" hlp: %08x epchar: %08x epcaps: %08x cqp: %08x\n",
qh->hw.hlp, qh->hw.epchar, qh->hw.epcaps, qh->hw.cqp);
overlay = &qh->hw.overlay;
udbg(" overlay:\n");
udbg(" nqp: %08x alt: %08x token: %08x\n",
uerr(" overlay:\n");
uerr(" nqp: %08x alt: %08x token: %08x\n",
overlay->nqp, overlay->alt, overlay->token);
udbg(" bpl: %08x %08x %08x %08x %08x\n",
uerr(" bpl: %08x %08x %08x %08x %08x\n",
overlay->bpl[0], overlay->bpl[1], overlay->bpl[2],
overlay->bpl[3], overlay->bpl[4]);
udbg(" fqp:\n", qh->fqp);
uerr(" fqp:\n", qh->fqp);
epinfo = qh->epinfo;
udbg(" epinfo[%p]:\n", epinfo);
uerr(" epinfo[%p]:\n", epinfo);
if (epinfo)
{
udbg(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
uerr(" EP%d DIR=%s FA=%08x TYPE=%d MaxPacket=%d\n",
epinfo->epno, epinfo->dirin ? "IN" : "OUT", epinfo->devaddr,
epinfo->xfrtype, epinfo->maxpacket);
udbg(" Toggle=%d iocwait=%d speed=%d result=%d\n",
uerr(" Toggle=%d iocwait=%d speed=%d result=%d\n",
epinfo->toggle, epinfo->iocwait, epinfo->speed, epinfo->result);
}
}
@ -4046,7 +4046,7 @@ static int lpc43_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = lpc43_async_setup(rhport, ep0info, req, buffer, len);
if (ret < 0)
{
udbg("ERROR: lpc43_async_setup failed: %d\n", ret);
uerr("ERROR: lpc43_async_setup failed: %d\n", ret);
goto errout_with_iocwait;
}

34
arch/arm/src/lpc43xx/lpc43_ethernet.c
View file

@ -2381,12 +2381,12 @@ static int lpc43_ifup(struct net_driver_s *dev)
int ret;
#ifdef CONFIG_NET_IPv4
ndbg("Bringing up: %d.%d.%d.%d\n",
nerr("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
#endif
#ifdef CONFIG_NET_IPv6
ndbg("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
nerr("Bringing up: %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x\n",
dev->d_ipv6addr[0], dev->d_ipv6addr[1], dev->d_ipv6addr[2],
dev->d_ipv6addr[3], dev->d_ipv6addr[4], dev->d_ipv6addr[5],
dev->d_ipv6addr[6], dev->d_ipv6addr[7]);
@ -2435,7 +2435,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
FAR struct lpc43_ethmac_s *priv = (FAR struct lpc43_ethmac_s *)dev->d_private;
irqstate_t flags;
ndbg("Taking the network down\n");
nerr("Taking the network down\n");
/* Disable the Ethernet interrupt */
@ -3065,7 +3065,7 @@ static int lpc43_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val
}
}
ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x\n",
phydevaddr, phyregaddr);
return -ETIMEDOUT;
@ -3124,7 +3124,7 @@ static int lpc43_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t val
}
}
ndbg("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
nerr("MII transfer timed out: phydevaddr: %04x phyregaddr: %04x value: %04x\n",
phydevaddr, phyregaddr, value);
return -ETIMEDOUT;
@ -3161,7 +3161,7 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_PHYID1, &phyval);
if (ret < 0)
{
ndbg("Failed to read the PHY ID1: %d\n", ret);
nerr("Failed to read the PHY ID1: %d\n", ret);
return ret;
}
@ -3179,7 +3179,7 @@ static inline int lpc43_dm9161(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, 16, &phyval);
if (ret < 0)
{
ndbg("Failed to read the PHY Register 0x10: %d\n", ret);
nerr("Failed to read the PHY Register 0x10: %d\n", ret);
return ret;
}
@ -3236,7 +3236,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_RESET);
if (ret < 0)
{
ndbg("Failed to reset the PHY: %d\n", ret);
nerr("Failed to reset the PHY: %d\n", ret);
return ret;
}
@ -3248,7 +3248,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phy_boardinitialize(0);
if (ret < 0)
{
ndbg("Failed to initialize the PHY: %d\n", ret);
nerr("Failed to initialize the PHY: %d\n", ret);
return ret;
}
#endif
@ -3273,7 +3273,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
ndbg("Failed to read the PHY MSR: %d\n", ret);
nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_LINKSTATUS) != 0)
@ -3284,7 +3284,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
ndbg("Timed out waiting for link status: %04x\n", phyval);
nerr("Timed out waiting for link status: %04x\n", phyval);
return -ETIMEDOUT;
}
@ -3293,7 +3293,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, MII_MCR_ANENABLE);
if (ret < 0)
{
ndbg("Failed to enable auto-negotiation: %d\n", ret);
nerr("Failed to enable auto-negotiation: %d\n", ret);
return ret;
}
@ -3304,7 +3304,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, MII_MSR, &phyval);
if (ret < 0)
{
ndbg("Failed to read the PHY MSR: %d\n", ret);
nerr("Failed to read the PHY MSR: %d\n", ret);
return ret;
}
else if ((phyval & MII_MSR_ANEGCOMPLETE) != 0)
@ -3315,7 +3315,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
if (timeout >= PHY_RETRY_TIMEOUT)
{
ndbg("Timed out waiting for auto-negotiation\n");
nerr("Timed out waiting for auto-negotiation\n");
return -ETIMEDOUT;
}
@ -3324,7 +3324,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phyread(CONFIG_LPC43_PHYADDR, CONFIG_LPC43_PHYSR, &phyval);
if (ret < 0)
{
ndbg("Failed to read PHY status register\n");
nerr("Failed to read PHY status register\n");
return ret;
}
@ -3418,7 +3418,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
ret = lpc43_phywrite(CONFIG_LPC43_PHYADDR, MII_MCR, phyval);
if (ret < 0)
{
ndbg("Failed to write the PHY MCR: %d\n", ret);
nerr("Failed to write the PHY MCR: %d\n", ret);
return ret;
}
@ -3434,7 +3434,7 @@ static int lpc43_phyinit(FAR struct lpc43_ethmac_s *priv)
#endif
#endif
ndbg("Duplex: %s Speed: %d MBps\n",
nerr("Duplex: %s Speed: %d MBps\n",
priv->fduplex ? "FULL" : "HALF",
priv->mbps100 ? 100 : 10);

4
arch/arm/src/lpc43xx/lpc43_gpdma.c
View file

@ -67,7 +67,7 @@
#undef DMA_VERBOSE /* Define to enable verbose debug */
#ifdef DMA_DEBUG
# define dmadbg llerr
# define dmaerr llerr
# ifdef DMA_VERBOSE
# define spiinfo llerr
# else
@ -75,7 +75,7 @@
# endif
#else
# undef DMA_VERBOSE
# define dmadbg(x...)
# define dmaerr(x...)
# define spiinfo(x...)
#endif

2
arch/arm/src/lpc43xx/lpc43_gpio.c
View file

@ -198,7 +198,7 @@ int lpc43_gpio_config(uint16_t gpiocfg)
break;
default :
sdbg("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
serr("ERROR: Unrecognized pin mode: %04x\n", gpiocfg);
ret = -EINVAL;
break;
}

2
arch/arm/src/lpc43xx/lpc43_i2c.c
View file

@ -464,7 +464,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
if (port > 1)
{
dbg("lpc I2C Only support 0,1\n");
err("lpc I2C Only support 0,1\n");
return NULL;
}

18
arch/arm/src/lpc43xx/lpc43_irq.c
View file

@ -146,7 +146,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
/****************************************************************************
* Name: lpc43_nmi, lpc43_busfault, lpc43_usagefault, lpc43_pendsv,
* lpc43_dbgmonitor, lpc43_pendsv, lpc43_reserved
* lpc43_errmonitor, lpc43_pendsv, lpc43_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@ -159,7 +159,7 @@ static void lpc43_dumpnvic(const char *msg, int irq)
static int lpc43_nmi(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! NMI received\n");
err("PANIC!!! NMI received\n");
PANIC();
return 0;
}
@ -167,7 +167,7 @@ static int lpc43_nmi(int irq, FAR void *context)
static int lpc43_busfault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Bus fault recived\n");
err("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
@ -175,7 +175,7 @@ static int lpc43_busfault(int irq, FAR void *context)
static int lpc43_usagefault(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Usage fault received\n");
err("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
@ -183,15 +183,15 @@ static int lpc43_usagefault(int irq, FAR void *context)
static int lpc43_pendsv(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! PendSV received\n");
err("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int lpc43_dbgmonitor(int irq, FAR void *context)
static int lpc43_errmonitor(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Debug Monitor received\n");
err("PANIC!!! Debug Monitor received\n");
PANIC();
return 0;
}
@ -199,7 +199,7 @@ static int lpc43_dbgmonitor(int irq, FAR void *context)
static int lpc43_reserved(int irq, FAR void *context)
{
(void)up_irq_save();
dbg("PANIC!!! Reserved interrupt\n");
err("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
@ -435,7 +435,7 @@ void up_irqinitialize(void)
irq_attach(LPC43_IRQ_BUSFAULT, lpc43_busfault);
irq_attach(LPC43_IRQ_USAGEFAULT, lpc43_usagefault);
irq_attach(LPC43_IRQ_PENDSV, lpc43_pendsv);
irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_dbgmonitor);
irq_attach(LPC43_IRQ_DBGMONITOR, lpc43_errmonitor);
irq_attach(LPC43_IRQ_RESERVED, lpc43_reserved);
#endif

2
arch/arm/src/lpc43xx/lpc43_serial.c
View file

@ -873,7 +873,7 @@ static int up_interrupt(int irq, void *context)
default:
{
dbg("Unexpected IIR: %02x\n", status);
err("Unexpected IIR: %02x\n", status);
break;
}
}

10
arch/arm/src/lpc43xx/lpc43_spi.c
View file

@ -67,7 +67,7 @@
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
# define spidbg llerr
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
@ -75,7 +75,7 @@
# endif
#else
# undef CONFIG_DEBUG_INFO
# define spidbg(x...)
# define spierr(x...)
# define spiinfo(x...)
#endif
@ -274,7 +274,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
spidbg("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -436,7 +436,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
uint8_t data;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write the data to transmitted to the SPI Data Register */
@ -481,7 +481,7 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nw
{
FAR uint8_t *ptr = (FAR uint8_t *)buffer;
spidbg("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
while (nwords)
{
/* Write some dummy data to the SPI Data Register in order to clock the

18
arch/arm/src/lpc43xx/lpc43_spifi.c
View file

@ -388,7 +388,7 @@ static void lpc43_blockerase(struct lpc43_dev_s *priv, off_t sector)
result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
if (result != 0)
{
fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
}
}
@ -417,7 +417,7 @@ static inline int lpc43_chiperase(struct lpc43_dev_s *priv)
result = SPIFI_ERASE(priv, &priv->rom, &priv->operands);
if (result != 0)
{
fdbg("ERROR: SPIFI_ERASE failed: %05x\n", result);
ferr("ERROR: SPIFI_ERASE failed: %05x\n", result);
return -EIO;
}
@ -463,7 +463,7 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
result = SPIFI_PROGRAM(priv, &priv->rom, src, &priv->operands);
if (result != 0)
{
fdbg("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
ferr("ERROR: SPIFI_PROGRAM failed: %05x\n", result);
return -EIO;
}
@ -475,7 +475,7 @@ static int lpc43_pagewrite(FAR struct lpc43_dev_s *priv, FAR uint8_t *dest,
result = lpc43_verify(priv, dest, src, nbytes);
if (result != 0)
{
fdbg("ERROR: lpc43_verify failed: %05x\n", result);
ferr("ERROR: lpc43_verify failed: %05x\n", result);
return -EIO;
}
#endif
@ -523,7 +523,7 @@ static void lpc43_cacheflush(struct lpc43_dev_s *priv)
ret = lpc43_pagewrite(priv, dest, priv->cache, SPIFI_BLKSIZE);
if (ret < 0)
{
fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
}
/* The case is no long dirty and the FLASH is no longer erased */
@ -798,7 +798,7 @@ static ssize_t lpc43_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t
ret = lpc43_pagewrite(priv, dest, buffer, nblocks << SPIFI_512SHIFT);
if (ret < 0)
{
fdbg("ERROR: lpc43_pagewrite failed: %d\n", ret);
ferr("ERROR: lpc43_pagewrite failed: %d\n", ret);
return ret;
}
#endif
@ -1025,7 +1025,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
S_RCVCLK | S_FULLCLK, SCLK_MHZ);
if (result != 0)
{
fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
/* Try again */
@ -1033,7 +1033,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv)
S_RCVCLK | S_FULLCLK, SCLK_MHZ);
if (result != 0)
{
fdbg("ERROR: SPIFI_INIT failed: %05x\n", result);
ferr("ERROR: SPIFI_INIT failed: %05x\n", result);
return -ENODEV;
}
}
@ -1201,7 +1201,7 @@ FAR struct mtd_dev_s *lpc43_spifi_initialize(void)
{
/* Allocation failed! Discard all of that work we just did and return NULL */
fdbg("ERROR: Allocation failed\n");
ferr("ERROR: Allocation failed\n");
return NULL;
}
#endif

12
arch/arm/src/lpc43xx/lpc43_ssp.c
View file

@ -76,7 +76,7 @@
*/
#ifdef CONFIG_SSP_DEBUG
# define sspdbg llerr
# define ssperr llerr
# ifdef CONFIG_SSP_VERBOSE
# define spiinfo llerr
# else
@ -84,7 +84,7 @@
# endif
#else
# undef CONFIG_SSP_VERBOSE
# define sspdbg(x...)
# define ssperr(x...)
# define spiinfo(x...)
#endif
@ -378,7 +378,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
sspdbg("Frequency %d->%d\n", frequency, actual);
ssperr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@ -429,7 +429,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
sspdbg("Bad mode: %d\n", mode);
ssperr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@ -517,7 +517,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
sspdbg("%04x->%04x\n", wd, regval);
ssperr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@ -564,7 +564,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
/* While there is remaining to be sent (and no synchronization error has occurred) */
sspdbg("nwords: %d\n", nwords);
ssperr("nwords: %d\n", nwords);
tx.pv = txbuffer;
rx.pv = rxbuffer;

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