From a7cd6bb401cf51580632cc23ee492421077018ed Mon Sep 17 00:00:00 2001 From: Filipe Cavalcanti Date: Mon, 14 Jul 2025 09:04:33 -0300 Subject: [PATCH] arch/xtensa: add E-Fuse support on ESP32S2 Adds support for e-fuse on ESP32S2 and fixes a gitignore issue. Signed-off-by: Filipe Cavalcanti --- arch/xtensa/src/esp32/.gitignore | 1 - arch/xtensa/src/esp32/bootloader/.gitignore | 1 + arch/xtensa/src/esp32s2/hal.mk | 4 ++++ 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/xtensa/src/esp32/.gitignore b/arch/xtensa/src/esp32/.gitignore index 94940fe623..ab19fe9ea8 100644 --- a/arch/xtensa/src/esp32/.gitignore +++ b/arch/xtensa/src/esp32/.gitignore @@ -1,4 +1,3 @@ /esp-hal-3rdparty -/esp-hal-3rdparty-mcuboot /esp-wireless-drivers-3rdparty /*.zip diff --git a/arch/xtensa/src/esp32/bootloader/.gitignore b/arch/xtensa/src/esp32/bootloader/.gitignore index 5e47dafb03..bfbf2a3d49 100644 --- a/arch/xtensa/src/esp32/bootloader/.gitignore +++ b/arch/xtensa/src/esp32/bootloader/.gitignore @@ -1,3 +1,4 @@ /esp-nuttx-bootloader +/esp-hal-3rdparty-mcuboot /bootloader.conf /mcuboot diff --git a/arch/xtensa/src/esp32s2/hal.mk b/arch/xtensa/src/esp32s2/hal.mk index 695b11e066..fa04f06a82 100644 --- a/arch/xtensa/src/esp32s2/hal.mk +++ b/arch/xtensa/src/esp32s2/hal.mk @@ -98,8 +98,12 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM) CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_table.c +CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)esp_app_desc.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c