bcmf: fix frame not freed when dropped + cleanup

This commit is contained in:
Simon Piriou 2017-05-03 23:19:28 +02:00
parent fa060b7901
commit b5e1ea4bef
15 changed files with 742 additions and 785 deletions

View file

@ -87,20 +87,12 @@ struct __attribute__((packed)) bcmf_event_msg
uint8_t data[0];
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
static const uint8_t bcmf_broadcom_oui[] = {0x00, 0x10, 0x18};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/

View file

@ -41,7 +41,6 @@
#define __DRIVERS_WIRELESS_IEEE80211_BCMF_BDC_H
#include "bcmf_driver.h"
#include "bcmf_ioctl.h"
/* Event frame content */

View file

@ -95,10 +95,6 @@ static int bcmf_cdc_control_request_unsafe(FAR struct bcmf_dev_s *priv,
uint32_t ifidx, bool set, uint32_t cmd,
char *name, uint8_t *data, uint32_t *len);
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/

View file

@ -34,7 +34,8 @@
****************************************************************************/
#include "bcmf_sdio.h"
#include <stdint.h>
#define WRAPPER_REGISTER_OFFSET 0x100000
extern const char bcm43362_nvram_image[];

View file

@ -94,10 +94,6 @@ static int bcmf_upload_binary(FAR struct bcmf_sdio_dev_s *sbusv,
static int bcmf_upload_nvram(FAR struct bcmf_sdio_dev_s *sbus);
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/

View file

@ -62,9 +62,7 @@
* Pre-processor Definitions
****************************************************************************/
// TODO move elsewhere
#define DOT11_BSSTYPE_ANY 2
#define DOT11_BSSTYPE_ANY 2
#define BCMF_SCAN_TIMEOUT_TICK (5*CLOCKS_PER_SEC)
#define BCMF_AUTH_TIMEOUT_MS 10000
@ -107,10 +105,6 @@ static void bcmf_wl_auth_event_handler(FAR struct bcmf_dev_s *priv,
static int bcmf_wl_get_interface(FAR struct bcmf_dev_s *priv,
struct iwreq *iwr);
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -440,10 +434,10 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv,
goto exit_invalid_frame;
}
wlinfo("Scan result: <%.32s> %02x:%02x:%02x:%02x:%02x:%02x\n",
bss->SSID, bss->BSSID.octet[0], bss->BSSID.octet[1],
bss->BSSID.octet[2], bss->BSSID.octet[3],
bss->BSSID.octet[4], bss->BSSID.octet[5]);
wlinfo("Scan result: <%.32s> %02x:%02x:%02x:%02x:%02x:%02x\n", bss->SSID,
bss->BSSID.ether_addr_octet[0], bss->BSSID.ether_addr_octet[1],
bss->BSSID.ether_addr_octet[3], bss->BSSID.ether_addr_octet[3],
bss->BSSID.ether_addr_octet[4], bss->BSSID.ether_addr_octet[5]);
/* Process next bss_info */
@ -473,15 +467,6 @@ wl_escan_result_processed:
wd_cancel(priv->scan_timeout);
if (!priv->scan_params)
{
/* Scan has already timedout */
return;
}
free(priv->scan_params);
priv->scan_params = NULL;
priv->scan_status = BCMF_SCAN_DONE;
sem_post(&priv->control_mutex);
@ -506,8 +491,6 @@ void bcmf_wl_scan_timeout(int argc, wdparm_t arg1, ...)
wlerr("Scan timeout detected\n");
priv->scan_status = BCMF_SCAN_TIMEOUT;
free(priv->scan_params);
priv->scan_params = NULL;
sem_post(&priv->control_mutex);
}
@ -573,15 +556,72 @@ int bcmf_wl_enable(FAR struct bcmf_dev_s *priv, bool enable)
return ret;
}
int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv)
int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv, struct iwreq *iwr)
{
int ret;
uint32_t out_len;
uint32_t value;
int interface;
struct iw_scan_req *req;
struct wl_escan_params scan_params;
interface = bcmf_wl_get_interface(priv, iwr);
if (interface < 0)
{
return -EINVAL;
}
memset(&scan_params, 0, sizeof(scan_params));
scan_params.version = ESCAN_REQ_VERSION;
scan_params.action = WL_SCAN_ACTION_START;
scan_params.sync_id = 0xabcd; /* Not used for now */
memset(&scan_params.params.bssid, 0xFF,
sizeof(scan_params.params.bssid));
scan_params.params.bss_type = DOT11_BSSTYPE_ANY;
scan_params.params.nprobes = -1;
scan_params.params.active_time = -1;
scan_params.params.passive_time = -1;
scan_params.params.home_time = -1;
scan_params.params.channel_num = 0;
if (iwr->u.data.pointer && iwr->u.data.length >= sizeof(*req))
{
req = (struct iw_scan_req*)iwr->u.data.pointer;
memcpy(&scan_params.params.bssid, req->bssid.sa_data,
sizeof(scan_params.params.bssid));
scan_params.params.scan_type =
req->scan_type == IW_SCAN_TYPE_ACTIVE ? 0:1;
if (iwr->u.data.flags & IW_SCAN_THIS_ESSID &&
req->essid_len < sizeof(scan_params.params.ssid.SSID))
{
/* Scan specific ESSID */
memcpy(scan_params.params.ssid.SSID, req->essid, req->essid_len);
scan_params.params.ssid.SSID_len = req->essid_len;
}
}
else
{
/* Default scan parameters */
wlinfo("Use default scan parameters\n");
memset(&scan_params.params.bssid, 0xFF,
sizeof(scan_params.params.bssid));
scan_params.params.scan_type = 0; /* Active scan */
}
/* Set active scan mode */
value = 0;
value = scan_params.params.scan_type;
out_len = 4;
if (bcmf_cdc_ioctl(priv, CHIP_STA_INTERFACE, true,
WLC_SET_PASSIVE_SCAN, (uint8_t*)&value, &out_len))
@ -597,45 +637,18 @@ int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv)
goto exit_failed;
}
/* Default request structure */
priv->scan_params = (struct wl_escan_params*)
kmm_malloc(sizeof(*priv->scan_params));
if (!priv->scan_params)
{
ret = -ENOMEM;
goto exit_sem_post;
}
memset(priv->scan_params, 0, sizeof(*priv->scan_params));
priv->scan_params->version = ESCAN_REQ_VERSION;
priv->scan_params->action = WL_SCAN_ACTION_START;
priv->scan_params->sync_id = 0xabcd; /* Not used for now */
memset(&priv->scan_params->params.bssid, 0xFF,
sizeof(priv->scan_params->params.bssid));
priv->scan_params->params.bss_type = DOT11_BSSTYPE_ANY;
priv->scan_params->params.scan_type = 0; /* Active scan */
priv->scan_params->params.nprobes = -1;
priv->scan_params->params.active_time = -1;
priv->scan_params->params.passive_time = -1;
priv->scan_params->params.home_time = -1;
priv->scan_params->params.channel_num = 0;
wlinfo("start scan\n");
priv->scan_status = BCMF_SCAN_RUN;
out_len = sizeof(*priv->scan_params);
out_len = sizeof(scan_params);
if (bcmf_cdc_iovar_request_unsafe(priv, CHIP_STA_INTERFACE, true,
IOVAR_STR_ESCAN, (uint8_t*)priv->scan_params,
IOVAR_STR_ESCAN, (uint8_t*)&scan_params,
&out_len))
{
ret = -EIO;
goto exit_free_params;
goto exit_sem_post;
}
/* Start scan_timeout timer */
@ -645,9 +658,6 @@ int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv)
return OK;
exit_free_params:
free(priv->scan_params);
priv->scan_params = NULL;
exit_sem_post:
sem_post(&priv->control_mutex);
priv->scan_status = BCMF_SCAN_DISABLED;
@ -656,8 +666,12 @@ exit_failed:
return ret;
}
int bcmf_wl_is_scan_done(FAR struct bcmf_dev_s *priv)
int bcmf_wl_get_scan_results(FAR struct bcmf_dev_s *priv, struct iwreq *iwr)
{
/* Not implemented yet, set len to zero */
iwr->u.data.length = 0;
if (priv->scan_status == BCMF_SCAN_RUN)
{
return -EAGAIN;
@ -896,4 +910,4 @@ int bcmf_wl_set_ssid(FAR struct bcmf_dev_s *priv, struct iwreq *iwr)
return -EINVAL;
}
return OK;
}
}

View file

@ -45,6 +45,8 @@
#include <nuttx/wdog.h>
#include <nuttx/wqueue.h>
#include "bcmf_ioctl.h"
struct bcmf_dev_s;
struct bcmf_frame_s;
@ -91,7 +93,6 @@ struct bcmf_dev_s
int scan_status; /* Current scan status */
WDOG_ID scan_timeout; /* Scan timeout timer */
struct wl_escan_params *scan_params; /* Current scan parameters */
sem_t auth_signal; /* Authentication notification signal */
int auth_status; /* Authentication status */
@ -135,9 +136,9 @@ int bcmf_wl_enable(FAR struct bcmf_dev_s *priv, bool enable);
/* IOCTLs AP scan interface implementation */
int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv);
int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv, struct iwreq *iwr);
int bcmf_wl_is_scan_done(FAR struct bcmf_dev_s *priv);
int bcmf_wl_get_scan_results(FAR struct bcmf_dev_s *priv, struct iwreq *iwr);
/* IOCTLs authentication interface implementation */

File diff suppressed because it is too large Load diff

View file

@ -257,22 +257,17 @@ static void bcmf_receive(FAR struct bcmf_dev_s *priv)
break;
}
if (!priv->bc_bifup)
{
/* Interface down, drop frame */
priv->bus->free_frame(priv, frame);
continue;
}
priv->bc_dev.d_buf = frame->data;
priv->bc_dev.d_len = frame->len - (uint32_t)(frame->data - frame->base);
wlinfo("Got frame ! %p %d\n", frame, priv->bc_dev.d_len);
// bcmf_hexdump(priv->bc_dev.d_buf, priv->bc_dev.d_len,
// (unsigned long)priv->bc_dev.d_buf);
/* Check for errors and update statistics */
/* Check if the packet is a valid size for the network buffer
* configuration.
*/
/* Copy the data data from the hardware to priv->bc_dev.d_buf. Set
* amount of data in priv->bc_dev.d_len
*/
wlinfo("Got frame %p %d\n", frame, priv->bc_dev.d_len);
#ifdef CONFIG_NET_PKT
/* When packet sockets are enabled, feed the frame into the packet tap */
@ -285,7 +280,7 @@ static void bcmf_receive(FAR struct bcmf_dev_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
// ninfo("IPv4 frame\n");
ninfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->bc_dev);
/* Handle ARP on input then give the IPv4 packet to the network
@ -399,6 +394,7 @@ static void bcmf_receive(FAR struct bcmf_dev_s *priv)
{
wlinfo("RX dropped\n");
NETDEV_RXDROPPED(&priv->bc_dev);
priv->bus->free_frame(priv, frame);
}
}
while (1); /* While there are more packets to be processed */
@ -693,12 +689,6 @@ static int bcmf_ifup(FAR struct net_driver_s *dev)
/* Enable the hardware interrupt */
priv->bc_bifup = true;
#warning Missing logic
if (bcmf_wl_enable(priv, true) != OK)
{
return -EIO;
}
return OK;
}
@ -725,8 +715,6 @@ static int bcmf_ifdown(FAR struct net_driver_s *dev)
FAR struct bcmf_dev_s *priv = (FAR struct bcmf_dev_s *)dev->d_private;
irqstate_t flags;
// bcmf_wl_enable(priv, false);
/* Disable the hardware interrupt */
flags = enter_critical_section();
@ -1003,11 +991,11 @@ static int bcmf_ioctl(FAR struct net_driver_s *dev, int cmd,
switch (cmd)
{
case SIOCSIWSCAN:
ret = bcmf_wl_start_scan(priv);
ret = bcmf_wl_start_scan(priv, (struct ifreq*)arg);
break;
case SIOCGIWSCAN:
ret = bcmf_wl_is_scan_done(priv);
ret = bcmf_wl_get_scan_results(priv, (struct ifreq*)arg);
break;
case SIOCSIFHWADDR: /* Set device MAC address */
@ -1144,7 +1132,9 @@ int bcmf_netdev_register(FAR struct bcmf_dev_s *priv)
* the device and/or calling bcmf_ifdown().
*/
if (bcmf_wl_enable(priv, false) != OK)
/* Enable chip */
if (bcmf_wl_enable(priv, true) != OK)
{
return -EIO;
}

View file

@ -66,9 +66,6 @@
#include "bcmf_sdio_core.h"
#include "bcmf_sdio_regs.h"
// TODO remove
#include "bcmf_ioctl.h"
/* Supported chip configurations */
#ifdef CONFIG_IEEE80211_BROADCOM_BCM43362
extern const struct bcmf_sdio_chip bcmf_43362_config_sdio;

View file

@ -14,49 +14,49 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef BCMF_SDIO_CHIP_H_
#define BCMF_SDIO_CHIP_H_
#ifndef __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_CORE_H
#define __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_CORE_H
#include <stdint.h>
#ifndef PAD
#define _PADLINE(line) pad ## line
#define _XSTR(line) _PADLINE(line)
#define PAD _XSTR(__LINE__)
#ifndef PAD
#define _PADLINE(line) pad ## line
#define _XSTR(line) _PADLINE(line)
#define PAD _XSTR(__LINE__)
#endif
/* SDIO device ID */
#define SDIO_DEVICE_ID_BROADCOM_43143 43143
#define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
#define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
#define SDIO_DEVICE_ID_BROADCOM_4334 0x4334
#define SDIO_DEVICE_ID_BROADCOM_4335_4339 0x4335
#define SDIO_DEVICE_ID_BROADCOM_43362 43362
#define SDIO_DEVICE_ID_BROADCOM_43143 43143
#define SDIO_DEVICE_ID_BROADCOM_43241 0x4324
#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329
#define SDIO_DEVICE_ID_BROADCOM_4330 0x4330
#define SDIO_DEVICE_ID_BROADCOM_4334 0x4334
#define SDIO_DEVICE_ID_BROADCOM_4335_4339 0x4335
#define SDIO_DEVICE_ID_BROADCOM_43362 43362
/*
* Core reg address translation.
* Both macro's returns a 32 bits byte address on the backplane bus.
*/
#define CORE_CC_REG(base, field) \
(base + offsetof(struct chipcregs, field))
(base + offsetof(struct chipcregs, field))
#define CORE_BUS_REG(base, field) \
(base + offsetof(struct sdpcmd_regs, field))
(base + offsetof(struct sdpcmd_regs, field))
#define CORE_SB(base, field) \
(base + offsetof(struct sbconfig, field))
(base + offsetof(struct sbconfig, field))
#define BRCMF_MAX_CORENUM 6
#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
#define BRCMF_MAX_CORENUM 6
#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
/* Target state register description */
#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
#define SSB_TMSLOW_REJECT 0x00000002 /* Reject (Standard Backplane) */
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
#define SSB_TMSLOW_BE 0x80000000 /* BIST Enable */
#define SSB_TMSLOW_RESET 0x00000001 /* Reset */
#define SSB_TMSLOW_REJECT 0x00000002 /* Reject (Standard Backplane) */
#define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */
#define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */
#define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */
#define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
#define SSB_TMSLOW_BE 0x80000000 /* BIST Enable */
#define I_HMB_SW_MASK ( (uint32_t) 0x000000F0 )
#define I_HMB_FRAME_IND ( 1<<6 )
@ -78,142 +78,142 @@ enum {
};
struct chip_core_info {
uint16_t id;
uint16_t rev;
uint32_t base;
uint32_t wrapbase;
uint32_t caps;
uint32_t cib;
uint16_t id;
uint16_t rev;
uint32_t base;
uint32_t wrapbase;
uint32_t caps;
uint32_t cib;
};
struct sbconfig {
uint8_t PAD[0xf00];
uint32_t PAD[2];
uint32_t sbipsflag; /* initiator port ocp slave flag */
uint32_t PAD[3];
uint32_t sbtpsflag; /* target port ocp slave flag */
uint32_t PAD[11];
uint32_t sbtmerrloga; /* (sonics >= 2.3) */
uint32_t PAD;
uint32_t sbtmerrlog; /* (sonics >= 2.3) */
uint32_t PAD[3];
uint32_t sbadmatch3; /* address match3 */
uint32_t PAD;
uint32_t sbadmatch2; /* address match2 */
uint32_t PAD;
uint32_t sbadmatch1; /* address match1 */
uint32_t PAD[7];
uint32_t sbimstate; /* initiator agent state */
uint32_t sbintvec; /* interrupt mask */
uint32_t sbtmstatelow; /* target state */
uint32_t sbtmstatehigh; /* target state */
uint32_t sbbwa0; /* bandwidth allocation table0 */
uint32_t PAD;
uint32_t sbimconfiglow; /* initiator configuration */
uint32_t sbimconfighigh; /* initiator configuration */
uint32_t sbadmatch0; /* address match0 */
uint32_t PAD;
uint32_t sbtmconfiglow; /* target configuration */
uint32_t sbtmconfighigh; /* target configuration */
uint32_t sbbconfig; /* broadcast configuration */
uint32_t PAD;
uint32_t sbbstate; /* broadcast state */
uint32_t PAD[3];
uint32_t sbactcnfg; /* activate configuration */
uint32_t PAD[3];
uint32_t sbflagst; /* current sbflags */
uint32_t PAD[3];
uint32_t sbidlow; /* identification */
uint32_t sbidhigh; /* identification */
uint8_t PAD[0xf00];
uint32_t PAD[2];
uint32_t sbipsflag; /* initiator port ocp slave flag */
uint32_t PAD[3];
uint32_t sbtpsflag; /* target port ocp slave flag */
uint32_t PAD[11];
uint32_t sbtmerrloga; /* (sonics >= 2.3) */
uint32_t PAD;
uint32_t sbtmerrlog; /* (sonics >= 2.3) */
uint32_t PAD[3];
uint32_t sbadmatch3; /* address match3 */
uint32_t PAD;
uint32_t sbadmatch2; /* address match2 */
uint32_t PAD;
uint32_t sbadmatch1; /* address match1 */
uint32_t PAD[7];
uint32_t sbimstate; /* initiator agent state */
uint32_t sbintvec; /* interrupt mask */
uint32_t sbtmstatelow; /* target state */
uint32_t sbtmstatehigh; /* target state */
uint32_t sbbwa0; /* bandwidth allocation table0 */
uint32_t PAD;
uint32_t sbimconfiglow; /* initiator configuration */
uint32_t sbimconfighigh; /* initiator configuration */
uint32_t sbadmatch0; /* address match0 */
uint32_t PAD;
uint32_t sbtmconfiglow; /* target configuration */
uint32_t sbtmconfighigh; /* target configuration */
uint32_t sbbconfig; /* broadcast configuration */
uint32_t PAD;
uint32_t sbbstate; /* broadcast state */
uint32_t PAD[3];
uint32_t sbactcnfg; /* activate configuration */
uint32_t PAD[3];
uint32_t sbflagst; /* current sbflags */
uint32_t PAD[3];
uint32_t sbidlow; /* identification */
uint32_t sbidhigh; /* identification */
};
/* sdio core registers */
struct sdpcmd_regs {
uint32_t corecontrol; /* 0x00, rev8 */
uint32_t corestatus; /* rev8 */
uint32_t PAD[1];
uint32_t biststatus; /* rev8 */
uint32_t corecontrol; /* 0x00, rev8 */
uint32_t corestatus; /* rev8 */
uint32_t PAD[1];
uint32_t biststatus; /* rev8 */
/* PCMCIA access */
uint16_t pcmciamesportaladdr; /* 0x010, rev8 */
uint16_t PAD[1];
uint16_t pcmciamesportalmask; /* rev8 */
uint16_t PAD[1];
uint16_t pcmciawrframebc; /* rev8 */
uint16_t PAD[1];
uint16_t pcmciaunderflowtimer; /* rev8 */
uint16_t PAD[1];
/* PCMCIA access */
uint16_t pcmciamesportaladdr; /* 0x010, rev8 */
uint16_t PAD[1];
uint16_t pcmciamesportalmask; /* rev8 */
uint16_t PAD[1];
uint16_t pcmciawrframebc; /* rev8 */
uint16_t PAD[1];
uint16_t pcmciaunderflowtimer; /* rev8 */
uint16_t PAD[1];
/* interrupt */
uint32_t intstatus; /* 0x020, rev8 */
uint32_t hostintmask; /* rev8 */
uint32_t intmask; /* rev8 */
uint32_t sbintstatus; /* rev8 */
uint32_t sbintmask; /* rev8 */
uint32_t funcintmask; /* rev4 */
uint32_t PAD[2];
uint32_t tosbmailbox; /* 0x040, rev8 */
uint32_t tohostmailbox; /* rev8 */
uint32_t tosbmailboxdata; /* rev8 */
uint32_t tohostmailboxdata; /* rev8 */
/* interrupt */
uint32_t intstatus; /* 0x020, rev8 */
uint32_t hostintmask; /* rev8 */
uint32_t intmask; /* rev8 */
uint32_t sbintstatus; /* rev8 */
uint32_t sbintmask; /* rev8 */
uint32_t funcintmask; /* rev4 */
uint32_t PAD[2];
uint32_t tosbmailbox; /* 0x040, rev8 */
uint32_t tohostmailbox; /* rev8 */
uint32_t tosbmailboxdata; /* rev8 */
uint32_t tohostmailboxdata; /* rev8 */
/* synchronized access to registers in SDIO clock domain */
uint32_t sdioaccess; /* 0x050, rev8 */
uint32_t PAD[3];
/* synchronized access to registers in SDIO clock domain */
uint32_t sdioaccess; /* 0x050, rev8 */
uint32_t PAD[3];
/* PCMCIA frame control */
uint8_t pcmciaframectrl; /* 0x060, rev8 */
uint8_t PAD[3];
uint8_t pcmciawatermark; /* rev8 */
uint8_t PAD[155];
/* PCMCIA frame control */
uint8_t pcmciaframectrl; /* 0x060, rev8 */
uint8_t PAD[3];
uint8_t pcmciawatermark; /* rev8 */
uint8_t PAD[155];
/* interrupt batching control */
uint32_t intrcvlazy; /* 0x100, rev8 */
uint32_t PAD[3];
/* interrupt batching control */
uint32_t intrcvlazy; /* 0x100, rev8 */
uint32_t PAD[3];
/* counters */
uint32_t cmd52rd; /* 0x110, rev8 */
uint32_t cmd52wr; /* rev8 */
uint32_t cmd53rd; /* rev8 */
uint32_t cmd53wr; /* rev8 */
uint32_t abort; /* rev8 */
uint32_t datacrcerror; /* rev8 */
uint32_t rdoutofsync; /* rev8 */
uint32_t wroutofsync; /* rev8 */
uint32_t writebusy; /* rev8 */
uint32_t readwait; /* rev8 */
uint32_t readterm; /* rev8 */
uint32_t writeterm; /* rev8 */
uint32_t PAD[40];
uint32_t clockctlstatus; /* rev8 */
uint32_t PAD[7];
/* counters */
uint32_t cmd52rd; /* 0x110, rev8 */
uint32_t cmd52wr; /* rev8 */
uint32_t cmd53rd; /* rev8 */
uint32_t cmd53wr; /* rev8 */
uint32_t abort; /* rev8 */
uint32_t datacrcerror; /* rev8 */
uint32_t rdoutofsync; /* rev8 */
uint32_t wroutofsync; /* rev8 */
uint32_t writebusy; /* rev8 */
uint32_t readwait; /* rev8 */
uint32_t readterm; /* rev8 */
uint32_t writeterm; /* rev8 */
uint32_t PAD[40];
uint32_t clockctlstatus; /* rev8 */
uint32_t PAD[7];
uint32_t PAD[128]; /* DMA engines */
uint32_t PAD[128]; /* DMA engines */
/* SDIO/PCMCIA CIS region */
char cis[512]; /* 0x400-0x5ff, rev6 */
/* SDIO/PCMCIA CIS region */
char cis[512]; /* 0x400-0x5ff, rev6 */
/* PCMCIA function control registers */
char pcmciafcr[256]; /* 0x600-6ff, rev6 */
uint16_t PAD[55];
/* PCMCIA function control registers */
char pcmciafcr[256]; /* 0x600-6ff, rev6 */
uint16_t PAD[55];
/* PCMCIA backplane access */
uint16_t backplanecsr; /* 0x76E, rev6 */
uint16_t backplaneaddr0; /* rev6 */
uint16_t backplaneaddr1; /* rev6 */
uint16_t backplaneaddr2; /* rev6 */
uint16_t backplaneaddr3; /* rev6 */
uint16_t backplanedata0; /* rev6 */
uint16_t backplanedata1; /* rev6 */
uint16_t backplanedata2; /* rev6 */
uint16_t backplanedata3; /* rev6 */
uint16_t PAD[31];
/* PCMCIA backplane access */
uint16_t backplanecsr; /* 0x76E, rev6 */
uint16_t backplaneaddr0; /* rev6 */
uint16_t backplaneaddr1; /* rev6 */
uint16_t backplaneaddr2; /* rev6 */
uint16_t backplaneaddr3; /* rev6 */
uint16_t backplanedata0; /* rev6 */
uint16_t backplanedata1; /* rev6 */
uint16_t backplanedata2; /* rev6 */
uint16_t backplanedata3; /* rev6 */
uint16_t PAD[31];
/* sprom "size" & "blank" info */
uint16_t spromstatus; /* 0x7BE, rev2 */
uint32_t PAD[464];
/* sprom "size" & "blank" info */
uint16_t spromstatus; /* 0x7BE, rev2 */
uint32_t PAD[464];
uint16_t PAD[0x80];
uint16_t PAD[0x80];
};
#endif /* _BCMF_SDIO_CHIP_H_ */
#endif /* __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_CORE_H */

View file

@ -14,163 +14,158 @@
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _BRCM_SDH_H_
#define _BRCM_SDH_H_
#ifndef __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_REGS_H
#define __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_REGS_H
#define SDIO_FUNC_0 0
#define SDIO_FUNC_1 1
#define SDIO_FUNC_2 2
#define SDIO_FUNC_0 0
#define SDIO_FUNC_1 1
#define SDIO_FUNC_2 2
#define SDIOD_FBR_SIZE 0x100
#define SDIOD_FBR_SIZE 0x100
/* io_en */
#define SDIO_FUNC_ENABLE_1 0x02
#define SDIO_FUNC_ENABLE_2 0x04
#define SDIO_FUNC_ENABLE_1 0x02
#define SDIO_FUNC_ENABLE_2 0x04
/* io_rdys */
#define SDIO_FUNC_READY_1 0x02
#define SDIO_FUNC_READY_2 0x04
#define SDIO_FUNC_READY_1 0x02
#define SDIO_FUNC_READY_2 0x04
/* intr_status */
#define INTR_STATUS_FUNC1 0x2
#define INTR_STATUS_FUNC2 0x4
#define INTR_STATUS_FUNC1 0x2
#define INTR_STATUS_FUNC2 0x4
/* Maximum number of I/O funcs */
#define SDIOD_MAX_IOFUNCS 7
#define SDIOD_MAX_IOFUNCS 7
/* mask of register map */
#define REG_F0_REG_MASK 0x7FF
#define REG_F1_MISC_MASK 0x1FFFF
#define REG_F0_REG_MASK 0x7FF
#define REG_F1_MISC_MASK 0x1FFFF
/* as of sdiod rev 0, supports 3 functions */
#define SBSDIO_NUM_FUNCTION 3
#define SBSDIO_NUM_FUNCTION 3
/* function 0 vendor specific CCCR registers */
#define SDIO_CCCR_BRCM_CARDCAP 0xf0
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
#define SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08
#define SDIO_CCCR_BRCM_CARDCTRL 0xf1
#define SDIO_CCCR_BRCM_CARDCTRL_WLANRESET 0x02
#define SDIO_CCCR_BRCM_SEPINT 0xf2
#define SDIO_CCCR_BRCM_CARDCAP 0xf0
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
#define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
#define SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC 0x08
#define SDIO_CCCR_BRCM_CARDCTRL 0xf1
#define SDIO_CCCR_BRCM_CARDCTRL_WLANRESET 0x02
#define SDIO_CCCR_BRCM_SEPINT 0xf2
#define SDIO_SEPINT_MASK 0x01
#define SDIO_SEPINT_OE 0x02
#define SDIO_SEPINT_ACT_HI 0x04
#define SDIO_SEPINT_MASK 0x01
#define SDIO_SEPINT_OE 0x02
#define SDIO_SEPINT_ACT_HI 0x04
/* function 1 miscellaneous registers */
/* sprom command and status */
#define SBSDIO_SPROM_CS 0x10000
#define SBSDIO_SPROM_CS 0x10000
/* sprom info register */
#define SBSDIO_SPROM_INFO 0x10001
#define SBSDIO_SPROM_INFO 0x10001
/* sprom indirect access data byte 0 */
#define SBSDIO_SPROM_DATA_LOW 0x10002
#define SBSDIO_SPROM_DATA_LOW 0x10002
/* sprom indirect access data byte 1 */
#define SBSDIO_SPROM_DATA_HIGH 0x10003
#define SBSDIO_SPROM_DATA_HIGH 0x10003
/* sprom indirect access addr byte 0 */
#define SBSDIO_SPROM_ADDR_LOW 0x10004
#define SBSDIO_SPROM_ADDR_LOW 0x10004
/* sprom indirect access addr byte 0 */
#define SBSDIO_SPROM_ADDR_HIGH 0x10005
#define SBSDIO_SPROM_ADDR_HIGH 0x10005
/* xtal_pu (gpio) output */
#define SBSDIO_CHIP_CTRL_DATA 0x10006
#define SBSDIO_CHIP_CTRL_DATA 0x10006
/* xtal_pu (gpio) enable */
#define SBSDIO_CHIP_CTRL_EN 0x10007
#define SBSDIO_CHIP_CTRL_EN 0x10007
/* rev < 7, watermark for sdio device */
#define SBSDIO_WATERMARK 0x10008
#define SBSDIO_WATERMARK 0x10008
/* control busy signal generation */
#define SBSDIO_DEVICE_CTL 0x10009
#define SBSDIO_DEVICE_CTL 0x10009
/* SB Address Window Low (b15) */
#define SBSDIO_FUNC1_SBADDRLOW 0x1000A
#define SBSDIO_FUNC1_SBADDRLOW 0x1000A
/* SB Address Window Mid (b23:b16) */
#define SBSDIO_FUNC1_SBADDRMID 0x1000B
#define SBSDIO_FUNC1_SBADDRMID 0x1000B
/* SB Address Window High (b31:b24) */
#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C
/* Frame Control (frame term/abort) */
#define SBSDIO_FUNC1_FRAMECTRL 0x1000D
#define SBSDIO_FUNC1_FRAMECTRL 0x1000D
/* Read Frame Terminate */
#define SFC_RF_TERM (1 << 0)
#define SFC_RF_TERM (1 << 0)
/* Write Frame Terminate */
#define SFC_WF_TERM (1 << 1)
#define SFC_WF_TERM (1 << 1)
/* CRC error for write out of sync */
#define SFC_CRC4WOOS (1 << 2)
#define SFC_CRC4WOOS (1 << 2)
/* Abort all in-progress frames */
#define SFC_ABORTALL (1 << 3)
#define SFC_ABORTALL (1 << 3)
/* ChipClockCSR (ALP/HT ctl/status) */
#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E
/* Force ALP request to backplane */
#define SBSDIO_FORCE_ALP 0x01
#define SBSDIO_FORCE_ALP 0x01
/* Force HT request to backplane */
#define SBSDIO_FORCE_HT 0x02
#define SBSDIO_FORCE_HT 0x02
/* Force ILP request to backplane */
#define SBSDIO_FORCE_ILP 0x04
#define SBSDIO_FORCE_ILP 0x04
/* Make ALP ready (power up xtal) */
#define SBSDIO_ALP_AVAIL_REQ 0x08
#define SBSDIO_ALP_AVAIL_REQ 0x08
/* Make HT ready (power up PLL) */
#define SBSDIO_HT_AVAIL_REQ 0x10
#define SBSDIO_HT_AVAIL_REQ 0x10
/* Squelch clock requests from HW */
#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
/* Status: ALP is ready */
#define SBSDIO_ALP_AVAIL 0x40
#define SBSDIO_ALP_AVAIL 0x40
/* Status: HT is ready */
#define SBSDIO_HT_AVAIL 0x80
#define SBSDIO_HT_AVAIL 0x80
/* SdioPullUp (on cmd, d0-d2) */
#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F
/* Write Frame Byte Count Low */
#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019
/* Write Frame Byte Count High */
#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A
/* Read Frame Byte Count Low */
#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B
/* Read Frame Byte Count High */
#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C
/* MesBusyCtl (rev 11) */
#define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D
#define SBSDIO_FUNC1_MESBUSYCTRL 0x1001D
/* Sdio Core Rev 12 */
#define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0
#define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK 0x2
#define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT 1
#define SBSDIO_FUNC1_SLEEPCSR 0x1001F
#define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1
#define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0
#define SBSDIO_FUNC1_SLEEPCSR_KSO_EN 1
#define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2
#define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT 1
#define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_MASK 0x1
#define SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT 0
#define SBSDIO_FUNC1_WCTRL_HTWAIT_MASK 0x2
#define SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT 1
#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
#define SBSDIO_FUNC1_SLEEPCSR 0x1001F
#define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1
#define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0
#define SBSDIO_FUNC1_SLEEPCSR_KSO_EN 1
#define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2
#define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT 1
#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
#define SBSDIO_CLKAV(regval, alponly) \
(SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
(SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001F /* f1 misc register end */
#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */
#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001F /* f1 misc register end */
/* function 1 OCP space */
/* sb offset addr is <= 15 bits, 32k */
#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF
#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000
/* with b15, maps to 32-bit SB access */
#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */
#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */
#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */
/* Address bits from SBADDR regs */
#define SBSDIO_SBWINDOW_MASK 0xffff8000
#define SBSDIO_SBWINDOW_MASK 0xffff8000
/* Packet alignment for most efficient SDIO (can change based on platform) */
#define BRCMF_SDALIGN (1 << 6)
/* watchdog polling interval in ms */
#define BRCMF_WD_POLL_MS 10
#endif /* _BRCM_SDH_H_ */
#endif /* __DRIVERS_WIRELESS_IEEE80211_BCMF_SDIO_REGS_H */

View file

@ -163,23 +163,5 @@ dq_entry_t* bcmf_dqueue_pop_tail(dq_queue_t *queue)
entry->blink->flink = queue->head;
}
return entry;
}
void bcmf_squeue_push(sq_queue_t *queue, sq_entry_t *entry)
{
entry->flink = queue->head;
queue->head = entry;
}
sq_entry_t* bcmf_squeue_pop(sq_queue_t *queue)
{
sq_entry_t *entry = queue->head;
if (queue->head != NULL)
{
queue->head = entry->flink;
}
return entry;
}

View file

@ -55,9 +55,6 @@ void bcmf_hexdump(uint8_t *data, unsigned int len, unsigned long offset);
int bcmf_sem_wait(sem_t *sem, unsigned int timeout_ms);
sq_entry_t* bcmf_squeue_pop(sq_queue_t *queue);
void bcmf_squeue_push(sq_queue_t *queue, sq_entry_t *entry);
dq_entry_t* bcmf_dqueue_pop_tail(dq_queue_t *queue);
void bcmf_dqueue_push(dq_queue_t *queue, dq_entry_t *entry);

View file

@ -195,7 +195,33 @@
/* Scan-related */
#define IW_SCAN_MAX_DATA 4096 /* Maximum size of returned data */
/* Scanning request flags */
#define IW_SCAN_DEFAULT 0x0000 /* Default scan of the driver */
#define IW_SCAN_ALL_ESSID 0x0001 /* Scan all ESSIDs */
#define IW_SCAN_THIS_ESSID 0x0002 /* Scan only this ESSID */
#define IW_SCAN_ALL_FREQ 0x0004 /* Scan all Frequencies */
#define IW_SCAN_THIS_FREQ 0x0008 /* Scan only this Frequency */
#define IW_SCAN_ALL_MODE 0x0010 /* Scan all Modes */
#define IW_SCAN_THIS_MODE 0x0020 /* Scan only this Mode */
#define IW_SCAN_ALL_RATE 0x0040 /* Scan all Bit-Rates */
#define IW_SCAN_THIS_RATE 0x0080 /* Scan only this Bit-Rate */
/* struct iw_scan_req scan_type */
#define IW_SCAN_TYPE_ACTIVE 0
#define IW_SCAN_TYPE_PASSIVE 1
/* Maximum size of returned data */
#define IW_SCAN_MAX_DATA 4096 /* In bytes */
/* Scan capability flags - in (struct iw_range *)->scan_capa */
#define IW_SCAN_CAPA_NONE 0x00
#define IW_SCAN_CAPA_ESSID 0x01
#define IW_SCAN_CAPA_BSSID 0x02
#define IW_SCAN_CAPA_CHANNEL 0x04
#define IW_SCAN_CAPA_MODE 0x08
#define IW_SCAN_CAPA_RATE 0x10
#define IW_SCAN_CAPA_TYPE 0x20
#define IW_SCAN_CAPA_TIME 0x40
#define IW_SCAN_MAX_DATA 4096 /* Maximum size of returned data */
/* SIOCSIWAUTH/SIOCGIWAUTH struct iw_param flags */
@ -398,5 +424,52 @@ struct iw_encode_ext
uint8_t key[0];
};
/*
* Optional data for scan request
*
* Note: these optional parameters are controlling parameters for the
* scanning behavior, these do not apply to getting scan results
* (SIOCGIWSCAN). Drivers are expected to keep a local BSS table and
* provide a merged results with all BSSes even if the previous scan
* request limited scanning to a subset, e.g., by specifying an SSID.
* Especially, scan results are required to include an entry for the
* current BSS if the driver is in Managed mode and associated with an AP.
*/
struct iw_scan_req
{
uint8_t scan_type; /* IW_SCAN_TYPE_{ACTIVE,PASSIVE} */
uint8_t essid_len;
uint8_t num_channels; /* num entries in channel_list;
* 0 = scan all allowed channels */
uint8_t flags; /* reserved as padding; use zero, this may
* be used in the future for adding flags
* to request different scan behavior */
struct sockaddr bssid; /* ff:ff:ff:ff:ff:ff for broadcast BSSID or
* individual address of a specific BSS */
/*
* Use this ESSID if IW_SCAN_THIS_ESSID flag is used instead of using
* the current ESSID. This allows scan requests for specific ESSID
* without having to change the current ESSID and potentially breaking
* the current association.
*/
uint8_t essid[IW_ESSID_MAX_SIZE];
/*
* Optional parameters for changing the default scanning behavior.
* These are based on the MLME-SCAN.request from IEEE Std 802.11.
* TU is 1.024 ms. If these are set to 0, driver is expected to use
* reasonable default values. min_channel_time defines the time that
* will be used to wait for the first reply on each channel. If no
* replies are received, next channel will be scanned after this. If
* replies are received, total time waited on the channel is defined by
* max_channel_time.
*/
uint32_t min_channel_time; /* in TU */
uint32_t max_channel_time; /* in TU */
struct iw_freq channel_list[IW_MAX_FREQUENCIES];
};
#endif /* CONFIG_DRIVERS_WIRELESS */
#endif /* __INCLUDE_NUTTX_WIRELESS_WIRELESS_H */