diff --git a/arch/risc-v/src/common/riscv_exception.c b/arch/risc-v/src/common/riscv_exception.c index db27d20720..84162ed97d 100644 --- a/arch/risc-v/src/common/riscv_exception.c +++ b/arch/risc-v/src/common/riscv_exception.c @@ -25,7 +25,6 @@ #include #include -#include #include #include @@ -34,6 +33,10 @@ #include "riscv_internal.h" +/**************************************************************************** + * Private Data + ****************************************************************************/ + static const char *g_reasons_str[RISCV_MAX_EXCEPTION + 1] = { "Instruction address misaligned", @@ -46,7 +49,7 @@ static const char *g_reasons_str[RISCV_MAX_EXCEPTION + 1] = "Store/AMO access fault", "Environment call from U-mode", "Environment call from S-mode", - "Reserved", + "Environment call from H-mode", "Environment call from M-mode", "Instruction page fault", "Load page fault",