arch/arm/rp2040: Fix typos in ADC and GPIO macros usage
The strings "RPC2040" and "RP2040_IO_BANK0_GPIO0", presumably typos, were used in place of respectively "RP2040" and "RP2040_IO_BANK0_GPIO". Signed-off-by: Niccolò Maggioni <nicco.maggioni+nuttx@gmail.com>
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2 changed files with 22 additions and 22 deletions
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@ -73,9 +73,9 @@
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/* Register bit definitions *************************************************/
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#define RP2040_ADC_CS_RROBIN_SHIFT (16)
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#define RP2040_ADC_CS_RROBIN_MASK (0x001fl << RPC2040_ADC_CS_RROBIN_SHIFT)
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#define RP2040_ADC_CS_RROBIN_MASK (0x001fl << RP2040_ADC_CS_RROBIN_SHIFT)
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#define RP2040_ADC_CS_AINSEL_SHIFT (12)
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#define RP2040_ADC_CS_AINSEL_MASK (0x0007l << RPC2040_ADC_CS_AINSEL_SHIFT)
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#define RP2040_ADC_CS_AINSEL_MASK (0x0007l << RP2040_ADC_CS_AINSEL_SHIFT)
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#define RP2040_ADC_CS_ERR_STICKY (1 << 10)
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#define RP2040_ADC_CS_ERR (1 << 9)
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#define RP2040_ADC_CS_READY (1 << 8)
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@ -82,29 +82,29 @@
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#define RP2040_IO_BANK0_GPIO_STATUS_OUTFROMPERI (1 << 8) /* output signal from selected peripheral, before register override is applied */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT (28)
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* don't invert the interrupt */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* invert the interrupt */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* drive interrupt low */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* drive interrupt high */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* don't invert the interrupt */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* invert the interrupt */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* drive interrupt low */
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#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* drive interrupt high */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT (16)
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* don't invert the peri input */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* invert the peri input */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* drive peri input low */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* drive peri input high */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* don't invert the peri input */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* invert the peri input */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* drive peri input low */
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#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* drive peri input high */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT (12)
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* drive output enable from peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* drive output enable from inverse of peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_DISABLE (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* disable output */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_ENABLE (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* enable output */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* drive output enable from peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* drive output enable from inverse of peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_DISABLE (0x2 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* disable output */
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#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_ENABLE (0x3 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* enable output */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT (8)
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output from peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output from inverse of peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output low */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output high */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT)
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output from peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output from inverse of peripheral signal selected by funcsel */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output low */
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#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output high */
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#define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_MASK (0x1f)
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#define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_JTAG (0x0)
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#define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_SPI (0x1)
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