drivers/spi_slave: call SPIS_DEV_NOTIFY when rx or tx complete for all spi slave driver

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
This commit is contained in:
dongjiuzhu1 2024-10-19 23:08:21 +08:00 committed by Alan C. Assis
parent 9c1e0d3d64
commit c4780f1a69
7 changed files with 16 additions and 0 deletions

View file

@ -462,6 +462,7 @@ static int spi_interrupt(int irq, void *context, void *arg)
SPIS_DEV_RECEIVE(priv->dev, (const uint16_t *)&data,
sizeof(data));
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
/* When a transfer starts, the data shifted out is the data present
@ -509,6 +510,7 @@ static int spi_interrupt(int irq, void *context, void *arg)
regval = spi_dequeue(priv);
spi_putreg(priv, regval, SAM_SPI_TDR_OFFSET);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
/* The SPI slave hardware provides only an event when NSS rises

View file

@ -710,6 +710,7 @@ static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
/* Wake-up the SPI driver */
priv->rxresult = isr | 0x080; /* OR'ed with 0x80 to assure non-zero */
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
#endif
@ -729,6 +730,7 @@ static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t isr, void *arg)
/* Wake-up the SPI driver */
priv->txresult = isr | 0x080; /* OR'ed with 0x80 to assure non-zero */
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
#endif

View file

@ -578,6 +578,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
{
spi_slave_hal_store_result(&priv->ctx);
priv->rx_length += transfer_size;
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
#ifdef CONFIG_ESPRESSIF_SPI2_DMA
@ -592,6 +593,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (transfer_size > 0 && priv->is_tx_enabled)
{
spislave_evict_sent_data(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
priv->ctx.bitlen = priv->tx_length;

View file

@ -863,6 +863,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (transfer_size > 0)
{
spislave_store_result(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
spislave_prepare_next_rx(priv);
@ -872,6 +873,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (transfer_size > 0 && priv->is_tx_enabled)
{
spislave_evict_sent_data(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
spislave_prepare_next_tx(priv);

View file

@ -840,6 +840,8 @@ static int esp32_spislv_interrupt(int irq, void *context, void *arg)
tmp = esp32_spi_get_reg(priv, SPI_W0_OFFSET + i);
memcpy(priv->rxbuffer + priv->rxlen + i, &tmp, 4);
}
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
priv->rxlen += n;
@ -861,6 +863,8 @@ static int esp32_spislv_interrupt(int irq, void *context, void *arg)
priv->txlen = 0;
priv->txen = false;
}
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
if (priv->txlen)

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@ -966,6 +966,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (transfer_size > 0)
{
spislave_store_result(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
#ifdef CONFIG_ESP32S2_SPI_DMA
@ -977,6 +978,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (priv->is_tx_enabled && transfer_size > 0)
{
spislave_evict_sent_data(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
spislave_prepare_next_tx(priv);

View file

@ -1054,6 +1054,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (transfer_size > 0)
{
spislave_store_result(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_RX_COMPLETE);
}
#ifdef CONFIG_ESP32S3_SPI_DMA
@ -1074,6 +1075,7 @@ static int spislave_periph_interrupt(int irq, void *context, void *arg)
if (priv->is_tx_enabled && transfer_size > 0)
{
spislave_evict_sent_data(priv, transfer_size);
SPIS_DEV_NOTIFY(priv->dev, SPISLAVE_TX_COMPLETE);
}
spislave_prepare_next_tx(priv);