arch/arm/stm32h5: Initial Driver for STM32H5 Digital Temperature Sensor (DTS)
- Committing initial code for DTS. Missing ISR. Works for PCLK1. Cannot get to work for LSE. - Pushing everything. Working with LSE now. - Many fixes. Fixed interrupt setting. Added data structures. - Changed interrupt handling. Removed FARs. Added Kconfig options for selecting interrupts. - Updated info and formatting. - Formatting fixes. - Formatting. - Changed iten to regval. - Removed Triggger - Formatting fixes per Pull request. - Changed private_types to have stm32_ prefix. Used depends on for DTS Kconfig Menu. Fixed formatting per PR. - Fixed spacing of function prototypes. - Fixed indent on line - Added documentation for STM32H5 and Nucleo-H563ZI regarding DTS. Also added GPDMA support to STM32H5 documentation (previous PR). Made stm32_dts.c more modular. stm32_dts_activate is now much more readable. Added comments/descriptions to private functions. Lastly, added a nucleo-h563zi:dts configuration.
This commit is contained in:
kywwilson11
Xiang Xiao
parent
b5ef0871d9
commit
cbd033ae90
15 changed files with 904 additions and 18 deletions
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@ -145,6 +145,13 @@ usbnsh:
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This configuration provides a basic NuttShell through the USB User interface.
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dts:
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--------
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This configuration configures the digital temperature sensor (DTS)
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at /dev/uorb/sensor_temp0 and provides the test application
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sensortest. E.g. sensortest -n 10 temp0
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References
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===========
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@ -35,8 +35,10 @@ Peripheral Support Notes
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========== ======= =====
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ADC Yes
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ETH Yes
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DTS Yes Software trigger only.
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FLASH Yes Hardware defines only.
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FDCAN Yes
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GPDMA Yes
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GPIO Yes
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I2C Yes
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ICACHE Yes
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@ -59,11 +61,9 @@ DBG No
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DCACHE No
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DCMI No
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DLYB No
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DTS No
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EXTI No
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FMAC No
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FSMC No
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GPDMA No
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GTZC No
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HASH No
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I3C No
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@ -359,6 +359,14 @@ config STM32H5_DMA2
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select STM32H5_DMA
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select ARCH_DMA
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config STM32H5_DTS
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bool "DTS"
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default n
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---help---
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Enable support for the on‑die digital temperature sensor (DTS)
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built into STM32H5 devices. When enabled, the driver will register
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a `/dev/sensor_tempX` device using the common NuttX sensor framework.
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config STM32H5_ETHMAC
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bool "Ethernet MAC"
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default n
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@ -625,6 +633,107 @@ config STM32H5_USBFS
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endmenu # STM32H5 Peripheral Selection
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menu "DTS Configuration"
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depends on STM32H5_DTS
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config STM32H5_DTS_REFCLK_LSE
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bool "Use LSE (32.768 kHz crystal) as DTS reference clock"
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default n
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---help---
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Select the low‑speed external (LSE) oscillator as the reference clock
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for the DTS. When enabled, DTS_CFGR1.REFCLK_SEL=1 and the driver will
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measure FM(T) pulses over N LSE cycles.
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If disabled, the DTS will use the APB‑bus clock (PCLK) as the reference
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(REFCLK_SEL=0) and you must supply a valid HSREF_CLK_DIV to keep the
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calibration prescaler ≤ 1 MHz.
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config STM32H5_DTS_SMP_TIME
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int "DTS sampling time (TS1_SMP_TIME[3:0])"
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default 1
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range 1 15
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---help---
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Number of reference‑clock cycles (PCLK or LSE) counted per
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DTS measurement. Valid range 1 (1 cycle) through 15 (15 cycles).
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config STM32H5_DTS_TRIGGER
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int "DTS hardware trigger source (TS1_INTRIG_SEL[3:0])"
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default 0
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---help---
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If non‑zero, DTS will start measurements on the rising edge of
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the selected hardware line. Values match RM0481 Table 275:
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0=Software Trigger, 1=LPTIM1_CH1,
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2=LPTIM2_CH1, 3=LPTIM3_CH1, 4=EXTI13, 5-15 are reserved.
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config STM32H5_DTS_LOW_THRESHOLD
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int "DTS low‑threshold (°C)"
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default 0
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---help---
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The temperature (in whole °C) below which the DTS window comparator will
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assert the low‑threshold flag (TS1_ITLF). To disable, set equal to 0.
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config STM32H5_DTS_HIGH_THRESHOLD
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int "DTS high‑threshold (°C)"
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default 100
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---help---
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The temperature (in whole °C) above which the DTS window comparator will
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assert the high‑threshold flag (TS1_ITHF). Must be >= LOW_THRESHOLD.
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config STM32H5_DTS_ITEN_ITEF
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bool "Enable DTS end‑of‑measurement interrupt (TS1_ITEF)"
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default y
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---help---
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Enable the synchronous “end of measurement” interrupt for the
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digital temperature sensor. When set, the driver will attach
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and unmask TS1_ITEF and will call your ISR on every fresh sample.
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config STM32H5_DTS_ITEN_ITLF
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bool "Enable DTS low‑threshold interrupt (TS1_ITLF)"
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default n
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---help---
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Enable the synchronous “low threshold crossed” interrupt for the
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digital temperature sensor. When set, the driver will unmask
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TS1_ITLF so you can get notified whenever the measured value
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drops below your programmed low‑threshold.
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config STM32H5_DTS_ITEN_ITHF
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bool "Enable DTS high‑threshold interrupt (TS1_ITHF)"
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default n
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---help---
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Enable the synchronous “high threshold crossed” interrupt for the
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digital temperature sensor. When set, the driver will unmask
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TS1_ITHF so you can get notified whenever the measured value
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exceeds your programmed high‑threshold.
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config STM32H5_DTS_AITEN_AITEF
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bool "Enable DTS asynchronous end‑of‑measurement interrupt (TS1_AITEF)"
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depends on STM32H5_DTS_REFCLK_LSE
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default n
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---help---
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Enable the asynchronous end‑of‑measurement interrupt. This will
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set TS1_AITEEN in DTS_ITENR and cause an _asynchronous_ wakeup
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event when a conversion completes (in Stop/Sleep modes).
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config STM32H5_DTS_AITEN_AITLF
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bool "Enable DTS asynchronous low‑threshold interrupt (TS1_AITLF)"
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depends on STM32H5_DTS_REFCLK_LSE
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default n
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---help---
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Enable the asynchronous low‑threshold comparator interrupt. This
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will set TS1_AITLEN in DTS_ITENR and generate a wakeup event
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when the measurement drops below your low threshold.
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config STM32H5_DTS_AITEN_AITHF
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bool "Enable DTS asynchronous high‑threshold interrupt (TS1_AITHF)"
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depends on STM32H5_DTS_REFCLK_LSE
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default n
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---help---
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Enable the asynchronous high‑threshold comparator interrupt. This
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will set TS1_AITHEN in DTS_ITENR and generate a wakeup event
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when the measurement exceeds your high threshold.
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endmenu # DTS Configuration
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config STM32H5_FLASH_PREFETCH
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bool "Enable FLASH Pre-fetch"
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default y
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@ -92,6 +92,10 @@ ifeq ($(CONFIG_STM32H5_DMA),y)
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CHIP_CSRCS += stm32_dma.c
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endif
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ifeq ($(CONFIG_STM32H5_DTS),y)
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CHIP_CSRCS += stm32_dts.c
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endif
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# Required chip type specific files
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ifeq ($(CONFIG_STM32H5_STM32H5XXXX),y)
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@ -71,6 +71,8 @@
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# define DTS_CFGR1_TS1_INTRIG_SEL_LPTIM2_CH1 (0x2 << DTS_CFGR1_TS1_INTRIG_SEL_SHIFT)
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# define DTS_CFGR1_TS1_INTRIG_SEL_LPTIM3_CH1 (0x3 << DTS_CFGR1_TS1_INTRIG_SEL_SHIFT)
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# define DTS_CFGR1_TS1_INTRIG_SEL_EXTI13 (0x4 << DTS_CFGR1_TS1_INTRIG_SEL_SHIFT)
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#define DTS_CFGR1_TS1_INTRIG(n) \
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(((n) << DTS_CFGR1_TS1_INTRIG_SEL_SHIFT) & DTS_CFGR1_TS1_INTRIG_SEL_MASK)
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#define DTS_CFGR1_TS1_SMP_TIME_SHIFT (16) /* Bits 16-19: Sampling time */
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#define DTS_CFGR1_TS1_SMP_TIME_MASK (0xf << DTS_CFGR1_TS1_SMP_TIME_SHIFT)
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@ -86,26 +88,26 @@
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/* Temperature sensor T0 value register 1 */
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#define DTS_T0VALR1_TS1_FMT0_SHIFT (0) /* Engineering value for frequency at T0 */
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#define DTS_T0VALR1_TS1_FMT0_MASK (0xff << DTS_T0VALR1_TS1_FMT0_SHIFT)
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#define DTS_T0VALR1_TS1_FMT0_MASK (0xffff << DTS_T0VALR1_TS1_FMT0_SHIFT)
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#define DTS_T0VALR1_TS1_T0_SHIFT (16) /* Engineering value of T0 */
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#define DTS_T0VALR1_TS1_T0_MASK (0b11 << DTS_T0VALR1_TS1_T0_SHIFT)
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/* Temperature sensor ramp value register */
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#define DTS_RAMPVALR_TS1_RAMP_COEFF_SHIFT (0) /* Engineering value of ramp coefficient */
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#define DTS_RAMPVALR_TS1_RAMP_COEFF_MASK (0xff << DTS_RAMPVALR_TS1_RAMP_COEFF_SHIFT)
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#define DTS_RAMPVALR_TS1_RAMP_COEFF_MASK (0xffff << DTS_RAMPVALR_TS1_RAMP_COEFF_SHIFT)
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/* Temperature sensor interrupt threshold register 1 */
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#define DTS_ITR1_TS1_LITTHD_SHIFT (0) /* High interrupt threshold */
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#define DTS_ITR1_TS1_LITTHD_MASK (0xff << DTS_ITR1_TS1_LITTHD_SHIFT)
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#define DTS_ITR1_TS1_LITTHD_MASK (0xffff << DTS_ITR1_TS1_LITTHD_SHIFT)
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#define DTS_ITR1_TS1_HITTHD_SHIFT (16) /* Low interrupt threshold */
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#define DTS_ITR1_TS1_HITTHD_MASK (0xff << DTS_ITR1_TS1_HITTHD_SHIFT)
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#define DTS_ITR1_TS1_HITTHD_MASK (0xffff << DTS_ITR1_TS1_HITTHD_SHIFT)
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/* Temperature sensor data register */
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#define DTS_DR_TS1_MFREQ_SHIFT (0)
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#define DTS_DR_TS1_MFREQ_MASK (0xff << DTS_DR_TS1_MFREQ_SHIFT)
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#define DTS_DR_TS1_MFREQ_MASK (0xffff << DTS_DR_TS1_MFREQ_SHIFT)
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/* Temperature sensor status register */
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@ -134,6 +136,7 @@
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#define DTS_ICIFR_CAITEF (1 << 4) /* Asynchronous interrupt clear flag: end of measurement */
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#define DTS_ICIFR_CAITLF (1 << 5) /* Asynchronous interrupt clear flag: low threshold */
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#define DTS_ICIFR_CAITHF (1 << 6) /* Asynchronous interrupt clear flag: high threshold */
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#define DTS_ICIFR_ALL (0x77) /* All interrupts */
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/* Temperature sensor option register */
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@ -264,13 +264,13 @@
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# define RCC_CFGR2_HPRE_SYSCLKd256 (14 << RCC_CFGR2_HPRE_SHIFT) /* 1110: SYSCLK divided by 256 */
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# define RCC_CFGR2_HPRE_SYSCLKd512 (15 << RCC_CFGR2_HPRE_SHIFT) /* 1111: SYSCLK divided by 512 */
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#define RCC_CFGR2_PPRE1_SHIFT (0) /* Bits 6-4: PPRE1 Prescaler */
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#define RCC_CFGR2_PPRE1_SHIFT (4) /* Bits 6-4: PPRE1 Prescaler */
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#define RCC_CFGR2_PPRE1_MASK (0x7 << RCC_CFGR2_PPRE1_SHIFT)
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# define RCC_CFGR2_PPRE1_HCLK1 (0 << RCC_CFGR2_PPRE1_SHIFT) /* 0xx: HCLK1 not divided */
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# define RCC_CFGR2_PPRE1_HCLK1d2 (4 << RCC_CFGR2_PPRE1_SHIFT) /* 1000: HCLK1 divided by 2 */
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# define RCC_CFGR2_PPRE1_HCLK1d4 (5 << RCC_CFGR2_PPRE1_SHIFT) /* 1001: HCLK1 divided by 4 */
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# define RCC_CFGR2_PPRE1_HCLK1d8 (6 << RCC_CFGR2_PPRE1_SHIFT) /* 1010: HCLK1 divided by 8 */
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# define RCC_CFGR2_PPRE1_HCLK1d16 (7 << RCC_CFGR2_PPRE1_SHIFT) /* 1011: HCLK1 divided by 16 */
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# define RCC_CFGR2_PPRE1_HCLK1d2 (4 << RCC_CFGR2_PPRE1_SHIFT) /* 100: HCLK1 divided by 2 */
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# define RCC_CFGR2_PPRE1_HCLK1d4 (5 << RCC_CFGR2_PPRE1_SHIFT) /* 101: HCLK1 divided by 4 */
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# define RCC_CFGR2_PPRE1_HCLK1d8 (6 << RCC_CFGR2_PPRE1_SHIFT) /* 110: HCLK1 divided by 8 */
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# define RCC_CFGR2_PPRE1_HCLK1d16 (7 << RCC_CFGR2_PPRE1_SHIFT) /* 111: HCLK1 divided by 16 */
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#define RCC_CFGR2_PPRE2_SHIFT (8) /* Bits 10-8: PPRE2 Prescaler */
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#define RCC_CFGR2_PPRE2_MASK (0x7 << RCC_CFGR2_PPRE2_SHIFT)
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@ -39,6 +39,7 @@
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#include "chip.h"
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#include "stm32_adc.h"
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#include "stm32_dbgmcu.h"
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#include "stm32_dts.h"
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#include "stm32_flash.h"
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#include "stm32_gpio.h"
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#include "stm32_i2c.h"
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556
arch/arm/src/stm32h5/stm32_dts.c
Normal file
556
arch/arm/src/stm32h5/stm32_dts.c
Normal file
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@ -0,0 +1,556 @@
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/****************************************************************************
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* arch/arm/src/stm32h5/stm32_dts.c
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <errno.h>
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#include <nuttx/sensors/sensor.h>
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#include <nuttx/uorb.h>
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#include <arch/board/board.h>
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#include "stm32_rcc.h"
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#include "hardware/stm32_dts.h"
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#include "stm32_dts.h"
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static float dts_get_fmt_hz (uint16_t mfreq);
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static float dts_get_temp_celsius (float fmt_hz);
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static void dts_handle_result (struct sensor_lowerhalf_s *lower);
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static void dts_configure_cfgr1 (void);
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static void dts_get_cal_data (void);
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static void dts_get_cfg_data (void);
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static int stm32_dts_activate (struct sensor_lowerhalf_s *lower,
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struct file *filep, bool enable);
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static int stm32_dts_set_interval (struct sensor_lowerhalf_s *lower,
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struct file *filep,
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uint32_t *period_us);
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#if CONFIG_STM32H5_DTS_TRIGGER == 0
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static ssize_t stm32_dts_fetch (struct sensor_lowerhalf_s *lower,
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struct file *filep,
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char *buffer, size_t buflen);
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#endif
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static int stm32_dts_get_info (struct sensor_lowerhalf_s *lower,
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struct file *filep,
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struct sensor_device_info_s *info);
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static int stm32_dts_isr (int irq, void *context, void *arg);
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if CONFIG_STM32H5_DTS_TRIGGER != 0
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# error "Hardware triggers not implemented. Need LP Timers first."
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct stm32_dts_cal_s g_dts_cal =
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{
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.fmt0 = 0.0f,
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.ramp = 1.0f,
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.t0 = 30.0f,
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};
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static struct stm32_dts_cfg_s g_dts_cfg =
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{
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.samples = 1,
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.lse = false,
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.clk_frequency = 0,
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};
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static struct sensor_lowerhalf_s g_dts_lower =
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{
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.type = SENSOR_TYPE_TEMPERATURE,
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.nbuffer = 1,
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.ops = NULL, /* bound in register() */
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.persist = false,
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};
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static const struct sensor_ops_s g_dts_ops =
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{
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.open = NULL, /* no per‑open activation */
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.close = NULL,
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.activate = stm32_dts_activate,
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.set_interval = stm32_dts_set_interval,
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.batch = NULL,
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#if CONFIG_STM32H5_DTS_TRIGGER == 0
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.fetch = stm32_dts_fetch,
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#else
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.fetch = NULL,
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#endif
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.selftest = NULL,
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.set_calibvalue = NULL,
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.calibrate = NULL,
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.get_info = stm32_dts_get_info,
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.control = NULL,
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: dts_get_fmt_hz
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*
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* Description:
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* Compute the value of FM(T) based on the REF_CLK and mfreq.
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* See RM0481, Rev 4, section 27.3.7
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*
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* Input Parameters:
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* mfreq - The value of TS1_MFREQ in DTS_DR.
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*
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* Returned Value:
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* The value of FM(T) in Hz.
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*
|
||||
****************************************************************************/
|
||||
|
||||
static float dts_get_fmt_hz(uint16_t mfreq)
|
||||
{
|
||||
/* Convert mfreq -> fmt_hz
|
||||
* fmt_hz is proportional to clk_ptat based on temperature
|
||||
*/
|
||||
|
||||
if (g_dts_cfg.lse)
|
||||
{
|
||||
/* (LSE) mode: count FM pulses in (samp) LSE cycles */
|
||||
|
||||
return ((float)mfreq * (float)STM32_LSE_FREQUENCY
|
||||
/ (float)(g_dts_cfg.samples));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* (PCLK) mode: count PCLK ticks in (samp) FM(T) cycles */
|
||||
|
||||
return ((float)STM32_PCLK1_FREQUENCY * (float)(g_dts_cfg.samples)
|
||||
/ (float)mfreq);
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_get_temp_celcius
|
||||
*
|
||||
* Description:
|
||||
* Uses calibration data (T0, FM(T0), Ramp Coefficient) and the derived
|
||||
* FM(T) to compute the temperature measured by the DTS in degrees
|
||||
* celsius. See RM0481, Rev 4, section 27.3.7
|
||||
*
|
||||
* Input Parameters:
|
||||
* fmt_hz - The value of FM(T) in Hz.
|
||||
*
|
||||
* Returned Value:
|
||||
* The temperature read by the DTS in degrees celsius
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static float dts_get_temp_celsius(float fmt_hz)
|
||||
{
|
||||
/* Convert fmt_hz -> temperature in degrees Celsius */
|
||||
|
||||
return g_dts_cal.t0 +
|
||||
((fmt_hz - ((float)g_dts_cal.fmt0 * 100.0f)) /
|
||||
(float)g_dts_cal.ramp);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_handle_result
|
||||
*
|
||||
* Description:
|
||||
* Put the computed temperature and timestamp in a sensor_temp structure
|
||||
* and push the sensor event
|
||||
*
|
||||
* Input Parameters:
|
||||
* *lower - Pointer to sensor lower_half driver
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dts_handle_result(struct sensor_lowerhalf_s *lower)
|
||||
{
|
||||
struct sensor_temp report;
|
||||
uint16_t mfreq = getreg32(STM32_DTS_DR) & DTS_DR_TS1_MFREQ_MASK;
|
||||
float fmt_hz = dts_get_fmt_hz(mfreq);
|
||||
|
||||
/* Build the report */
|
||||
|
||||
report.timestamp = sensor_get_timestamp();
|
||||
report.temperature = dts_get_temp_celsius(fmt_hz);
|
||||
|
||||
/* Push into NuttX sensor framework */
|
||||
|
||||
lower->push_event(lower->priv, &report, sizeof(report));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_configure_cfgr1
|
||||
*
|
||||
* Description:
|
||||
* Write DTS_CFGR1 register based on Kconfig options and the REF_CLK.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dts_configure_cfgr1(void)
|
||||
{
|
||||
/* Compute PCLK prescaler <= 1MHz */
|
||||
|
||||
#if !defined(CONFIG_STM32H5_DTS_REFCLK_LSE)
|
||||
uint32_t div = (STM32_PCLK1_FREQUENCY + 1000000 - 1) / 1000000;
|
||||
|
||||
if (div > 127)
|
||||
{
|
||||
div = 127;
|
||||
}
|
||||
else if (div == 0)
|
||||
{
|
||||
div = 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
uint32_t cfgr1 =
|
||||
DTS_CFGR1_TS1_EN
|
||||
| DTS_CFGR1_TS1_SMP_TIME(CONFIG_STM32H5_DTS_SMP_TIME)
|
||||
#if !defined(CONFIG_STM32H5_DTS_REFCLK_LSE)
|
||||
| DTS_CFGR1_HSREF_CLK_DIV_RATIO(div)
|
||||
#else
|
||||
| DTS_CFGR1_REFCLK_SEL
|
||||
#endif
|
||||
| DTS_CFGR1_TS1_INTRIG(CONFIG_STM32H5_DTS_TRIGGER);
|
||||
|
||||
putreg32(cfgr1, STM32_DTS_CFGR1);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_get_cal_data
|
||||
*
|
||||
* Description:
|
||||
* Obtain DTS Calibration data (T0, FM(T0), Ramp Coefficient).
|
||||
* Store the calibration data in a global data structure. This data is
|
||||
* constant and needs to be loaded only once.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dts_get_cal_data(void)
|
||||
{
|
||||
uint32_t t0valr1 = getreg32(STM32_DTS_T0VALR1);
|
||||
|
||||
g_dts_cal.fmt0 = (t0valr1
|
||||
& DTS_T0VALR1_TS1_FMT0_MASK) >> DTS_T0VALR1_TS1_FMT0_SHIFT;
|
||||
|
||||
g_dts_cal.ramp = (getreg32(STM32_DTS_RAMPVALR)
|
||||
& DTS_RAMPVALR_TS1_RAMP_COEFF_MASK)
|
||||
>> DTS_RAMPVALR_TS1_RAMP_COEFF_SHIFT;
|
||||
|
||||
uint8_t t0valr1_t0 = (t0valr1
|
||||
& DTS_T0VALR1_TS1_T0_MASK) >> DTS_T0VALR1_TS1_T0_SHIFT;
|
||||
|
||||
g_dts_cal.t0 = (t0valr1_t0 == 0) ? 30.0f : 130.0f;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_get_cfg_data
|
||||
*
|
||||
* Description:
|
||||
* Store select configuration data for later use.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dts_get_cfg_data(void)
|
||||
{
|
||||
uint32_t cfgr1 = getreg32(STM32_DTS_CFGR1);
|
||||
|
||||
#if defined(CONFIG_STM32H5_DTS_REFCLK_LSE)
|
||||
g_dts_cfg.lse = true;
|
||||
#else
|
||||
g_dts_cfg.lse = false;
|
||||
#endif
|
||||
|
||||
g_dts_cfg.samples = ((cfgr1 & DTS_CFGR1_TS1_SMP_TIME_MASK) >>
|
||||
DTS_CFGR1_TS1_SMP_TIME_SHIFT);
|
||||
g_dts_cfg.samples = (g_dts_cfg.samples == 0) ? 1 : g_dts_cfg.samples;
|
||||
|
||||
g_dts_cfg.clk_frequency = (g_dts_cfg.lse) ? STM32_LSE_FREQUENCY :
|
||||
STM32_PCLK1_FREQUENCY;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: dts_configure_interrupts
|
||||
*
|
||||
* Description:
|
||||
* Write the DTS_ITENR register based on Kconfig options.
|
||||
*
|
||||
* Input Parameters:
|
||||
* *lower - Pointer to sensor lower_half driver
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void dts_configure_interrupts(struct sensor_lowerhalf_s *lower)
|
||||
{
|
||||
uint32_t itenr = 0;
|
||||
|
||||
#ifdef CONFIG_STM32H5_DTS_ITEN_ITEF
|
||||
itenr |= DTS_ITENR_ITEEN;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H5_DTS_ITEN_ITLF
|
||||
itenr |= DTS_ITENR_ITLEN;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H5_DTS_ITEN_ITHF
|
||||
itenr |= DTS_ITENR_ITHEN;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H5_DTS_AITEN_AITEF
|
||||
itenr |= DTS_ITENR_AITEEN;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H5_DTS_AITEN_AITLF
|
||||
itenr |= DTS_ITENR_AITLEN;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H5_DTS_AITEN_AITHF
|
||||
itenr |= DTS_ITENR_AITHEN;
|
||||
#endif
|
||||
|
||||
putreg32(itenr, STM32_DTS_ITENR);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_activate
|
||||
*
|
||||
* Description:
|
||||
* Enable or disable the DTS block and its clock. Configure CFGR1 for
|
||||
* sample time, reference clock, and trigger mode. Wait for the initial
|
||||
* calibration to complete (TS1_RDY = 1).
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_dts_activate(struct sensor_lowerhalf_s *lower,
|
||||
struct file *filep, bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
modifyreg32(STM32_RCC_APB1HENR, 0, RCC_APB1HENR_DTSEN);
|
||||
|
||||
dts_configure_cfgr1();
|
||||
|
||||
/* Wait for initial calibration (TS1_RDY=1) */
|
||||
|
||||
while (!(getreg32(STM32_DTS_SR) & DTS_SR_TS1_RDY));
|
||||
|
||||
dts_get_cal_data();
|
||||
|
||||
dts_get_cfg_data();
|
||||
|
||||
dts_configure_interrupts(lower);
|
||||
|
||||
irq_attach(STM32_IRQ_DTS, stm32_dts_isr, lower);
|
||||
|
||||
up_enable_irq(STM32_IRQ_DTS);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable block‑level IRQ, NVIC, clock */
|
||||
|
||||
putreg32(0, STM32_DTS_ITENR);
|
||||
up_disable_irq(STM32_IRQ_DTS);
|
||||
modifyreg32(STM32_RCC_APB1HENR, RCC_APB1HENR_DTSEN, 0);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#if CONFIG_STM32H5_DTS_TRIGGER == 0
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_fetch
|
||||
*
|
||||
* Description:
|
||||
* Perform one software‐triggered temperature measurement
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static ssize_t stm32_dts_fetch(struct sensor_lowerhalf_s *lower,
|
||||
struct file *filep,
|
||||
char *buffer, size_t buflen)
|
||||
{
|
||||
struct sensor_temp report;
|
||||
uint16_t mfreq;
|
||||
float fmt_hz;
|
||||
|
||||
/* Wait for sensor to be ready before starting */
|
||||
|
||||
while (!(getreg32(STM32_DTS_SR) & DTS_SR_TS1_RDY));
|
||||
|
||||
/* Set START = 1 to initiate one measurement */
|
||||
|
||||
modifyreg32(STM32_DTS_CFGR1, 0, DTS_CFGR1_TS1_START);
|
||||
|
||||
/* Wait for TS1_RDY -> 1: conversion complete */
|
||||
|
||||
while (!(getreg32(STM32_DTS_SR) & DTS_SR_TS1_RDY));
|
||||
|
||||
/* Set START = 0 to stop measurements */
|
||||
|
||||
modifyreg32(STM32_DTS_CFGR1, DTS_CFGR1_TS1_START, 0);
|
||||
|
||||
mfreq = getreg32(STM32_DTS_DR) & DTS_DR_TS1_MFREQ_MASK;
|
||||
fmt_hz = dts_get_fmt_hz(mfreq);
|
||||
|
||||
report.timestamp = sensor_get_timestamp();
|
||||
report.temperature = dts_get_temp_celsius(fmt_hz);
|
||||
|
||||
if (buflen < sizeof(report))
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memcpy(buffer, &report, sizeof(report));
|
||||
return sizeof(report);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_set_interval
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_dts_set_interval(struct sensor_lowerhalf_s *lower,
|
||||
struct file *filep,
|
||||
uint32_t *period_us)
|
||||
{
|
||||
/* TODO - Requires LP Timer Driver */
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_get_info
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_dts_get_info(struct sensor_lowerhalf_s *lower,
|
||||
struct file *filep,
|
||||
struct sensor_device_info_s *info)
|
||||
{
|
||||
/* One factory‐calibrated internal sensor on the STM32H5:
|
||||
*
|
||||
* Power: ≈0.5 mW typical when measuring (≈150 uA@3.3 V)
|
||||
* Max range: –40 C…+125 C
|
||||
* Resolution: ≈0.15 C => approximation with 15 samples at 125 MHz
|
||||
* Min delay: ≈200 us per conversion (default sample time)
|
||||
* Max delay: 0 (one‑shot, not batched)
|
||||
* FIFO events 1 (no hardware FIFO)
|
||||
*/
|
||||
|
||||
DEBUGASSERT(info);
|
||||
info->version = 1;
|
||||
info->power = 0.5f;
|
||||
info->max_range = 165.0f;
|
||||
info->resolution = 0.15f;
|
||||
info->min_delay = 200;
|
||||
info->max_delay = 0;
|
||||
info->fifo_reserved_event_count = 1;
|
||||
info->fifo_max_event_count = 1;
|
||||
strlcpy(info->name, "STM32H5 DTS", SENSOR_INFO_NAME_SIZE);
|
||||
strlcpy(info->vendor, "STMicro", SENSOR_INFO_NAME_SIZE);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_isr
|
||||
****************************************************************************/
|
||||
|
||||
static int stm32_dts_isr(int irq, void *context, void *arg)
|
||||
{
|
||||
struct sensor_lowerhalf_s *lower = (struct sensor_lowerhalf_s *)arg;
|
||||
uint32_t sr = getreg32(STM32_DTS_SR);
|
||||
bool pushed = false;
|
||||
|
||||
/* End‑of‑measurement interrupt? */
|
||||
|
||||
if (sr & DTS_SR_TS1_ITEF)
|
||||
{
|
||||
putreg32(DTS_ICIFR_CITEF, STM32_DTS_ICIFR);
|
||||
dts_handle_result(lower);
|
||||
pushed = true;
|
||||
}
|
||||
|
||||
/* Low‑threshold crossed? */
|
||||
|
||||
if (sr & DTS_SR_TS1_ITLF)
|
||||
{
|
||||
putreg32(DTS_ICIFR_CITLF, STM32_DTS_ICIFR);
|
||||
if (!pushed)
|
||||
{
|
||||
dts_handle_result(lower);
|
||||
}
|
||||
|
||||
pushed = true;
|
||||
}
|
||||
|
||||
/* High‑threshold crossed? */
|
||||
|
||||
if (sr & DTS_SR_TS1_ITHF)
|
||||
{
|
||||
putreg32(DTS_ICIFR_CITHF, STM32_DTS_ICIFR);
|
||||
if (!pushed)
|
||||
{
|
||||
dts_handle_result(lower);
|
||||
}
|
||||
}
|
||||
|
||||
lower->notify_event(lower->priv);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_register
|
||||
****************************************************************************/
|
||||
|
||||
int stm32h5_dts_register(int devno)
|
||||
{
|
||||
int ret;
|
||||
|
||||
g_dts_lower.ops = &g_dts_ops;
|
||||
|
||||
/* Register the driver at /dev/uorb/sensor_tempN */
|
||||
|
||||
ret = sensor_register(&g_dts_lower, devno);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
|
@ -28,7 +28,49 @@
|
|||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include "chip.h"
|
||||
#include "hardware/stm32_dts.h"
|
||||
#include <nuttx/sensors/sensor.h> /* For struct sensor_lowerhalf_s */
|
||||
#include <nuttx/sensors/ioctl.h> /* SNIOC_* if needed */
|
||||
#include <nuttx/uorb.h> /* SENSOR_TYPE_AMBIENT_TEMPERATURE */
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32H5_STM32_DTS_H */
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
struct stm32_dts_cal_s
|
||||
{
|
||||
uint16_t fmt0;
|
||||
uint16_t ramp;
|
||||
float t0;
|
||||
};
|
||||
|
||||
struct stm32_dts_cfg_s
|
||||
{
|
||||
uint8_t samples;
|
||||
bool lse;
|
||||
uint32_t clk_frequency;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
int stm32h5_dts_register(int devno);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_STM32H5_STM32_DTS_H */
|
||||
|
|
|
|||
55
boards/arm/stm32h5/nucleo-h563zi/configs/dts/defconfig
Normal file
55
boards/arm/stm32h5/nucleo-h563zi/configs/dts/defconfig
Normal file
|
|
@ -0,0 +1,55 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_STANDARD_SERIAL is not set
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="nucleo-h563zi"
|
||||
CONFIG_ARCH_BOARD_NUCLEO_H563ZI=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_ARCH_CHIP="stm32h5"
|
||||
CONFIG_ARCH_CHIP_STM32H563ZI=y
|
||||
CONFIG_ARCH_CHIP_STM32H5=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=2048
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV8M_STACKCHECK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=9251
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_ASSERTIONS=y
|
||||
CONFIG_DEBUG_FEATURES=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_FS_PROCFS_REGISTER=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_LINE_MAX=64
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=655360
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_SENSORS=y
|
||||
CONFIG_STACK_COLORATION=y
|
||||
CONFIG_STM32H5_DTS=y
|
||||
CONFIG_STM32H5_DTS_SMP_TIME=15
|
||||
CONFIG_STM32H5_USART3=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_SYSTEM_SENSORTEST=y
|
||||
CONFIG_TASK_NAME_SIZE=0
|
||||
CONFIG_UORB=y
|
||||
CONFIG_USART3_SERIAL_CONSOLE=y
|
||||
CONFIG_USENSOR=y
|
||||
|
|
@ -172,8 +172,8 @@
|
|||
|
||||
/* Configure the APB1 prescaler */
|
||||
|
||||
#define STM32_RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_HCLK1 /* PCLK1 = HCLK / 1 */
|
||||
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY / 1)
|
||||
#define STM32_RCC_CFGR2_PPRE1 RCC_CFGR2_PPRE1_HCLK1d2 /* PCLK1 = HCLK / 2 */
|
||||
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
|
||||
|
||||
#define STM32_APB1_TIM2_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
#define STM32_APB1_TIM3_CLKIN (STM32_PCLK1_FREQUENCY)
|
||||
|
|
@ -199,7 +199,7 @@
|
|||
|
||||
/* Configure the APB3 prescaler */
|
||||
|
||||
#define STM32_RCC_CFGR2_PPRE3 RCC_CFGR2_PPRE3_HCLK1 /* PCLK2 = HCLK / 1 */
|
||||
#define STM32_RCC_CFGR2_PPRE3 RCC_CFGR2_PPRE3_HCLK1 /* PCLK3 = HCLK / 1 */
|
||||
#define STM32_PCLK3_FREQUENCY (STM32_HCLK_FREQUENCY / 1)
|
||||
|
||||
#define STM32_APB3_LPTIM1_CLKIN (STM32_PCLK3_FREQUENCY)
|
||||
|
|
|
|||
|
|
@ -43,4 +43,8 @@ ifeq ($(CONFIG_ADC),y)
|
|||
CSRCS += stm32_adc.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STM32H5_DTS),y)
|
||||
CSRCS += stm32_dts.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
|
|
|||
|
|
@ -129,5 +129,9 @@ int stm32_bringup(void);
|
|||
int stm32_adc_setup(void);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32H5_DTS
|
||||
int stm32_dts_setup(int devno);
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_ARM_STM32H5_NUCLEO_H563ZI_SRC_NUCLEO_H563ZI_H */
|
||||
|
|
|
|||
|
|
@ -110,6 +110,16 @@ int stm32_bringup(void)
|
|||
}
|
||||
#endif /* CONFIG_ADC*/
|
||||
|
||||
#ifdef CONFIG_STM32H5_DTS
|
||||
/* devno == 0 creates /dev/sensor_temp0 */
|
||||
|
||||
ret = stm32_dts_setup(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
UNUSED(ret);
|
||||
return OK;
|
||||
}
|
||||
|
|
|
|||
91
boards/arm/stm32h5/nucleo-h563zi/src/stm32_dts.c
Normal file
91
boards/arm/stm32h5/nucleo-h563zi/src/stm32_dts.c
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
/****************************************************************************
|
||||
* boards/arm/stm32h5/nucleo-h563zi/src/stm32_dts.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "stm32.h"
|
||||
|
||||
#if defined(CONFIG_STM32H5_DTS)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: stm32_dts_setup
|
||||
*
|
||||
* Description:
|
||||
* Initialize DTS and register the DTS driver.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int stm32_dts_setup(int devno)
|
||||
{
|
||||
static bool initialized = false;
|
||||
int ret;
|
||||
|
||||
/* Check if we have already initialized */
|
||||
|
||||
if (!initialized)
|
||||
{
|
||||
/* Register the DTS driver at "/dev/sensor_temp0" */
|
||||
|
||||
ret = stm32h5_dts_register(0);
|
||||
if (ret < 0)
|
||||
{
|
||||
aerr("ERROR: dts_register /dev/dts0 failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Reference in a new issue