From d2eb3db5b6e82980f175b746583ee0001f7bb55c Mon Sep 17 00:00:00 2001 From: Eren Terzioglu Date: Tue, 20 May 2025 14:27:04 +0200 Subject: [PATCH] Docs/espressif: Add crypto defconfig docs for esp32[-c3|-c6|-h2] Docs/espressif: Add crypto defconfig docs for risc-v based Espressif chips Signed-off-by: Eren Terzioglu --- .../esp32c3/boards/esp32c3-generic/index.rst | 18 ++++++++++++++++++ .../platforms/risc-v/esp32c3/index.rst | 2 +- .../esp32c6/boards/esp32c6-devkitc/index.rst | 18 ++++++++++++++++++ .../platforms/risc-v/esp32c6/index.rst | 2 +- .../esp32h2/boards/esp32h2-devkit/index.rst | 18 ++++++++++++++++++ .../platforms/risc-v/esp32h2/index.rst | 2 +- 6 files changed, 57 insertions(+), 3 deletions(-) diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst index d5fa696ac5..8e288070ac 100644 --- a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-generic/index.rst @@ -163,6 +163,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32c3/index.rst b/Documentation/platforms/risc-v/esp32c3/index.rst index 054e78ae94..208996149a 100644 --- a/Documentation/platforms/risc-v/esp32c3/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/index.rst @@ -365,7 +365,7 @@ RMT Yes RNG Yes RSA No RTC Yes -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No diff --git a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst index 98479fa4fe..9fea2b3370 100644 --- a/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst +++ b/Documentation/platforms/risc-v/esp32c6/boards/esp32c6-devkitc/index.rst @@ -146,6 +146,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32c6/index.rst b/Documentation/platforms/risc-v/esp32c6/index.rst index f130f90733..2403f8ef0a 100644 --- a/Documentation/platforms/risc-v/esp32c6/index.rst +++ b/Documentation/platforms/risc-v/esp32c6/index.rst @@ -356,7 +356,7 @@ RNG Yes RSA No RTC Yes SDIO No -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No diff --git a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst index 12910ad40b..59fa74bc53 100644 --- a/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst +++ b/Documentation/platforms/risc-v/esp32h2/boards/esp32h2-devkit/index.rst @@ -129,6 +129,24 @@ disables the NuttShell to get the best possible score. .. note:: As the NSH is disabled, the application will start as soon as the system is turned on. +crypto +------ + +This configuration enables support for the cryptographic hardware and +the ``/dev/crypto`` device file. Currently, we are supporting SHA-1, +SHA-224 and SHA-256 algorithms using hardware. +To test hardware acceleration, you can use `hmac` example and following output +should look like this:: + + nsh> hmac + ... + hmac sha1 success + hmac sha1 success + hmac sha1 success + hmac sha256 success + hmac sha256 success + hmac sha256 success + efuse ----- diff --git a/Documentation/platforms/risc-v/esp32h2/index.rst b/Documentation/platforms/risc-v/esp32h2/index.rst index e44a0f7b28..91695f6d65 100644 --- a/Documentation/platforms/risc-v/esp32h2/index.rst +++ b/Documentation/platforms/risc-v/esp32h2/index.rst @@ -357,7 +357,7 @@ RMT Yes RNG Yes RSA No RTC Yes -SHA No +SHA Yes SPI Yes SPIFLASH Yes SPIRAM No