From d557b87b2530461181628efc1dbbde4566559709 Mon Sep 17 00:00:00 2001 From: Richard Tucker Date: Thu, 24 Mar 2022 14:06:51 +1100 Subject: [PATCH] arch/risc-v/litex: add cache_invalidate --- arch/risc-v/Kconfig | 1 + arch/risc-v/src/litex/Make.defs | 1 + arch/risc-v/src/litex/litex_cache.S | 82 +++++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 arch/risc-v/src/litex/litex_cache.S diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index b199d393e9..6bc640e706 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -36,6 +36,7 @@ config ARCH_CHIP_LITEX select ARCH_RV32 select ARCH_RV_ISA_M select ARCH_RV_ISA_A + select ARCH_DCACHE ---help--- Enjoy Digital LITEX VEXRISCV softcore processor (RV32IMA). diff --git a/arch/risc-v/src/litex/Make.defs b/arch/risc-v/src/litex/Make.defs index 13754a65bc..a482354390 100644 --- a/arch/risc-v/src/litex/Make.defs +++ b/arch/risc-v/src/litex/Make.defs @@ -52,3 +52,4 @@ CHIP_CSRCS = litex_allocateheap.c litex_clockconfig.c CHIP_CSRCS += litex_irq.c litex_irq_dispatch.c CHIP_CSRCS += litex_lowputc.c litex_serial.c CHIP_CSRCS += litex_start.c litex_timerisr.c +CHIP_ASRCS += litex_cache.S diff --git a/arch/risc-v/src/litex/litex_cache.S b/arch/risc-v/src/litex/litex_cache.S new file mode 100644 index 0000000000..33acb50430 --- /dev/null +++ b/arch/risc-v/src/litex/litex_cache.S @@ -0,0 +1,82 @@ +/**************************************************************************** + * arch/risc-v/src/litex/litex_cache.S + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + + .file "litex_cache.S" + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Cache Operations + ****************************************************************************/ + + .text + +/**************************************************************************** + * Name: up_invalidate_dcache_all + * + * Description: + * Invalidate the entire contents of D cache. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_DCACHE + .globl up_invalidate_dcache_all + .type up_invalidate_dcache_all, function + +up_invalidate_dcache_all: + .word 0x500F +#endif + +/**************************************************************************** + * Name: up_invalidate_icache_all + * + * Description: + * Invalidate the entire contents of I cache. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_ICACHE + .globl up_invalidate_icache_all + .type up_invalidate_icache_all, function + +up_invalidate_dcaup_invalidate_icache_allhe_all: + .word 0x100F + nop + nop + nop + nop + nop +#endif