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arch: Replace critical section with nxmutex in i2c/spi/1wire initialization

Browse source 
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
anjiahao 2022-09-06 14:18:45 +08:00 • committed by Masayuki Ishikawa
parent d1d46335df
commit dee38ce3e8
47 changed files with 347 additions and 537 deletions
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22
arch/arm/src/am335x/am335x_i2c.c
View file

@ -247,7 +247,7 @@ static inline void am335x_i2c_sendstop(struct am335x_i2c_priv_s *priv);
static inline uint32_t
am335x_i2c_getstatus(struct am335x_i2c_priv_s *priv);
static int am335x_i2c_isr_process(struct am335x_i2c_priv_s * priv);
static int am335x_i2c_isr_process(struct am335x_i2c_priv_s *priv);
#ifndef CONFIG_I2C_POLLED
static int am335x_i2c_isr(int irq, void *context, void *arg);
@ -1576,8 +1576,7 @@ out:
struct i2c_master_s *am335x_i2cbus_initialize(int port)
{
struct am335x_i2c_priv_s * priv = NULL;
irqstate_t flags;
struct am335x_i2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -1606,15 +1605,13 @@ struct i2c_master_s *am335x_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
am335x_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1629,7 +1626,6 @@ struct i2c_master_s *am335x_i2cbus_initialize(int port)
int am335x_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct am335x_i2c_priv_s *priv = (struct am335x_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1640,19 +1636,17 @@ int am335x_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs > 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
am335x_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

17
arch/arm/src/cxd56xx/cxd56_i2c.c
View file

@ -933,10 +933,6 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
{
struct cxd56_i2cdev_s *priv;
irqstate_t flags;
flags = enter_critical_section();
#ifdef CONFIG_CXD56_I2C0
if (port == 0)
{
@ -970,18 +966,17 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
else
#endif
{
leave_critical_section(flags);
i2cerr("I2C Only support 0,1,2\n");
return NULL;
}
priv->refs++;
nxmutex_lock(&priv->lock);
/* Test if already initialized or not */
if (1 < priv->refs)
if (1 < ++priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return &priv->dev;
}
@ -1011,8 +1006,6 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
cxd56_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY);
leave_critical_section(flags);
/* Configure pin */
cxd56_i2c_pincontrol(port, true);
@ -1037,6 +1030,7 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
cxd56_i2c_clock_gate_enable(port);
nxmutex_unlock(&priv->lock);
return &priv->dev;
}
@ -1059,8 +1053,10 @@ int cxd56_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
nxmutex_unlock(&priv->lock);
return OK;
}
@ -1079,6 +1075,7 @@ int cxd56_i2cbus_uninitialize(struct i2c_master_s *dev)
irq_detach(priv->irqid);
wd_cancel(&priv->timeout);
nxmutex_unlock(&priv->lock);
return OK;
}

17
arch/arm/src/efm32/efm32_i2c.c
View file

@ -1615,7 +1615,6 @@ out:
struct i2c_master_s *efm32_i2cbus_initialize(int port)
{
struct efm32_i2c_priv_s *priv = NULL;
irqstate_t flags;
/* Get I2C private structure */
@ -1641,14 +1640,13 @@ struct i2c_master_s *efm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
efm32_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1663,7 +1661,6 @@ struct i2c_master_s *efm32_i2cbus_initialize(int port)
int efm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct efm32_i2c_priv_s *priv = (struct efm32_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1674,19 +1671,17 @@ int efm32_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
efm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

20
arch/arm/src/imxrt/imxrt_lpi2c.c
View file

@ -2257,8 +2257,7 @@ out:
struct i2c_master_s *imxrt_i2cbus_initialize(int port)
{
struct imxrt_lpi2c_priv_s * priv = NULL;
irqstate_t flags;
struct imxrt_lpi2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -2292,9 +2291,8 @@ struct i2c_master_s *imxrt_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
imxrt_lpi2c_init(priv);
@ -2308,8 +2306,7 @@ struct i2c_master_s *imxrt_i2cbus_initialize(int port)
#endif
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -2324,7 +2321,6 @@ struct i2c_master_s *imxrt_i2cbus_initialize(int port)
int imxrt_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct imxrt_lpi2c_priv_s *priv = (struct imxrt_lpi2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -2335,16 +2331,13 @@ int imxrt_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs > 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
#ifdef CONFIG_IMXRT_LPI2C_DMA
@ -2357,6 +2350,7 @@ int imxrt_i2cbus_uninitialize(struct i2c_master_s *dev)
#endif
imxrt_lpi2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

18
arch/arm/src/kinetis/kinetis_i2c.c
View file

@ -1306,7 +1306,6 @@ out:
struct i2c_master_s *kinetis_i2cbus_initialize(int port)
{
struct kinetis_i2cdev_s *priv;
irqstate_t flags;
i2cinfo("port=%d\n", port);
@ -1341,14 +1340,13 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
return NULL;
}
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
kinetis_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return &priv->dev;
}
@ -1363,7 +1361,6 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port)
int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev;
irqstate_t flags;
DEBUGASSERT(priv != NULL);
@ -1374,20 +1371,19 @@ int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
kinetis_i2c_deinit(priv);
wd_cancel(&priv->timeout);
nxmutex_unlock(&priv->lock);
return OK;
}

18
arch/arm/src/lc823450/lc823450_i2c.c
View file

@ -1069,7 +1069,6 @@ exit:
struct i2c_master_s *lc823450_i2cbus_initialize(int port)
{
struct lc823450_i2c_priv_s *priv = NULL;
irqstate_t flags;
switch (port)
{
@ -1092,14 +1091,13 @@ struct i2c_master_s *lc823450_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
lc823450_i2c_init(priv, port);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1114,7 +1112,6 @@ struct i2c_master_s *lc823450_i2cbus_initialize(int port)
int lc823450_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct lc823450_i2c_priv_s *priv = (struct lc823450_i2c_priv_s *)dev;
irqstate_t flags;
int port = -1;
DEBUGASSERT(dev);
@ -1126,16 +1123,13 @@ int lc823450_i2cbus_uninitialize(struct i2c_master_s *dev)
return OK;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
#ifdef CONFIG_LC823450_I2C0
if (priv == &lc823450_i2c0_priv)
{
@ -1153,12 +1147,14 @@ int lc823450_i2cbus_uninitialize(struct i2c_master_s *dev)
if (-1 == port)
{
DEBUGPANIC();
nxmutex_unlock(&priv->lock);
return -EFAULT;
}
/* Disable power and other HW resource */
lc823450_i2c_deinit(priv, port);
nxmutex_unlock(&priv->lock);
return OK;
}

4
arch/arm/src/lpc54xx/lpc54_dma.c
View file

@ -308,7 +308,7 @@ int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
if (dmach->inuse)
{
ret = -EBUSY;
goto errout_with_excllock;
goto errout_with_lock;
}
dmach->inuse = true;
@ -438,7 +438,7 @@ int lpc54_dma_setup(int ch, uint32_t cfg, uint32_t xfrcfg, uint8_t trigsrc,
putreg32(xfrcfg, base + LPC54_DMA_XFERCFG_OFFSET);
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&g_dma.lock);
return ret;
}

15
arch/arm/src/nrf52/nrf52_i2c.c
View file

@ -780,8 +780,7 @@ struct i2c_master_s *nrf52_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
/* Initialize I2C */
@ -789,8 +788,7 @@ struct i2c_master_s *nrf52_i2cbus_initialize(int port)
nrf52_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -805,7 +803,6 @@ struct i2c_master_s *nrf52_i2cbus_initialize(int port)
int nrf52_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct nrf52_i2c_priv_s *priv = (struct nrf52_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -816,19 +813,17 @@ int nrf52_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
nrf52_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

17
arch/arm/src/rp2040/rp2040_i2c.c
View file

@ -854,10 +854,6 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
{
struct rp2040_i2cdev_s *priv;
irqstate_t flags;
flags = enter_critical_section();
#ifdef CONFIG_RP2040_I2C0
if (port == 0)
{
@ -875,18 +871,17 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
else
#endif
{
leave_critical_section(flags);
i2cerr("I2C Only support 0,1\n");
return NULL;
}
priv->refs++;
nxmutex_lock(&priv->lock);
/* Test if already initialized or not */
if (1 < priv->refs)
if (1 < ++priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return &priv->dev;
}
@ -899,8 +894,6 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
rp2040_i2c_init(priv);
rp2040_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY);
leave_critical_section(flags);
/* Attach Interrupt Handler */
irq_attach(priv->irqid, rp2040_i2c_interrupt, priv);
@ -909,6 +902,7 @@ struct i2c_master_s *rp2040_i2cbus_initialize(int port)
up_enable_irq(priv->irqid);
nxmutex_unlock(&priv->lock);
return &priv->dev;
}
@ -931,8 +925,10 @@ int rp2040_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
nxmutex_unlock(&priv->lock);
return OK;
}
@ -942,6 +938,7 @@ int rp2040_i2cbus_uninitialize(struct i2c_master_s *dev)
irq_detach(priv->irqid);
wd_cancel(&priv->timeout);
nxmutex_unlock(&priv->lock);
return OK;
}

20
arch/arm/src/s32k1xx/s32k1xx_lpi2c.c
View file

@ -2156,8 +2156,7 @@ out:
struct i2c_master_s *s32k1xx_i2cbus_initialize(int port)
{
struct s32k1xx_lpi2c_priv_s * priv = NULL;
irqstate_t flags;
struct s32k1xx_lpi2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -2183,9 +2182,8 @@ struct i2c_master_s *s32k1xx_i2cbus_initialize(int port)
* power-up hardware and configure pins.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
s32k1xx_lpi2c_init(priv);
@ -2206,8 +2204,7 @@ struct i2c_master_s *s32k1xx_i2cbus_initialize(int port)
#endif
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -2222,7 +2219,6 @@ struct i2c_master_s *s32k1xx_i2cbus_initialize(int port)
int s32k1xx_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct s32k1xx_lpi2c_priv_s *priv = (struct s32k1xx_lpi2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -2233,16 +2229,13 @@ int s32k1xx_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs > 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
#ifdef CONFIG_S32K1XX_LPI2C_DMA
@ -2262,6 +2255,7 @@ int s32k1xx_i2cbus_uninitialize(struct i2c_master_s *dev)
#endif
s32k1xx_lpi2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

2
arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.c
View file

@ -862,7 +862,7 @@ struct i2c_slave_s *s32k1xx_i2cbus_slave_initialize(int port)
flags = enter_critical_section();
if ((volatile int) priv->refs == 0)
if (priv->refs == 0)
{
/* Initialize private data for the first time, increment reference
* count, power-up hardware and configure pins.

20
arch/arm/src/s32k3xx/s32k3xx_lpi2c.c
View file

@ -1673,8 +1673,7 @@ out:
struct i2c_master_s *s32k3xx_i2cbus_initialize(int port)
{
struct s32k3xx_lpi2c_priv_s * priv = NULL;
irqstate_t flags;
struct s32k3xx_lpi2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -1700,15 +1699,13 @@ struct i2c_master_s *s32k3xx_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
s32k3xx_lpi2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1723,7 +1720,6 @@ struct i2c_master_s *s32k3xx_i2cbus_initialize(int port)
int s32k3xx_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct s32k3xx_lpi2c_priv_s *priv = (struct s32k3xx_lpi2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1734,19 +1730,17 @@ int s32k3xx_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs > 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
s32k3xx_lpi2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

8
arch/arm/src/sama5/sam_ssc.c
View file

@ -2164,7 +2164,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -2195,7 +2195,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:
@ -2387,7 +2387,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -2418,7 +2418,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:

8
arch/arm/src/samv7/sam_ssc.c
View file

@ -2147,7 +2147,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SSC%d has no receiver\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -2178,7 +2178,7 @@ static int ssc_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:
@ -2373,7 +2373,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SSC%d has no transmitter\n", priv->sscno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -2404,7 +2404,7 @@ static int ssc_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:

15
arch/arm/src/samv7/sam_twihs.c
View file

@ -1363,7 +1363,6 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
struct twi_dev_s *priv;
uint32_t frequency;
const struct twi_attr_s *attr = 0;
irqstate_t flags;
int ret;
i2cinfo("Initializing TWIHS%d\n", bus);
@ -1415,11 +1414,11 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
return NULL;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
/* Has the device already been initialized? */
if ((volatile int)priv->refs++ == 0)
if (priv->refs++ == 0)
{
/* Perform one-time TWIHS initialization */
@ -1443,12 +1442,12 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
twi_hw_initialize(priv, frequency);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return &priv->dev;
errout_with_lock:
priv->refs--;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1463,7 +1462,6 @@ errout_with_lock:
int sam_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
irqstate_t flags;
DEBUGASSERT(priv);
@ -1478,8 +1476,7 @@ int sam_i2cbus_uninitialize(struct i2c_master_s *dev)
/* Disable TWIHS interrupts */
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs == 0)
{
up_disable_irq(priv->attr->irq);
@ -1493,7 +1490,7 @@ int sam_i2cbus_uninitialize(struct i2c_master_s *dev)
irq_detach(priv->attr->irq);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}

14
arch/arm/src/stm32/stm32_1wire.c
View file

@ -1165,7 +1165,6 @@ struct onewire_dev_s *stm32_1wireinitialize(int port)
{
struct stm32_1wire_priv_s *priv = NULL; /* Private data of device with multiple instances */
struct stm32_1wire_inst_s *inst = NULL; /* Device, single instance */
int irqs;
/* Get 1-Wire private structure */
@ -1232,14 +1231,13 @@ struct onewire_dev_s *stm32_1wireinitialize(int port)
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_1wire_init(priv);
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct onewire_dev_s *)inst;
}
@ -1261,7 +1259,6 @@ struct onewire_dev_s *stm32_1wireinitialize(int port)
int stm32_1wireuninitialize(struct onewire_dev_s *dev)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
int irqs;
DEBUGASSERT(priv);
@ -1272,17 +1269,14 @@ int stm32_1wireuninitialize(struct onewire_dev_s *dev)
return ERROR;
}
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(priv);
return OK;
}
leave_critical_section(irqs);
/* Disable power and other HW resource (GPIO's) */
stm32_1wire_deinit(priv);

2
arch/arm/src/stm32/stm32_dma2d.c
View file

@ -111,7 +111,7 @@ struct stm32_dma2d_s
uint32_t *clut; /* Color lookup table */
#endif
mutex_t *lock; /* Ensure mutually exclusive access */
mutex_t *lock; /* Ensure mutually exclusive access */
};
/* Interrupt handling */

19
arch/arm/src/stm32/stm32_i2c.c
View file

@ -1855,8 +1855,7 @@ out:
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL;
irqstate_t flags;
struct stm32_i2c_priv_s *priv = NULL;
#if STM32_PCLK1_FREQUENCY < 4000000
# warning STM32_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
@ -1894,14 +1893,13 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1916,7 +1914,6 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1927,19 +1924,17 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

17
arch/arm/src/stm32/stm32_i2c_alt.c
View file

@ -2368,7 +2368,6 @@ out:
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s *priv = NULL;
irqstate_t flags;
#if STM32_PCLK1_FREQUENCY < 4000000
# warning STM32_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
@ -2406,14 +2405,13 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -2428,7 +2426,6 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -2439,19 +2436,17 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

46
arch/arm/src/stm32/stm32_i2c_v2.c
View file

@ -2703,12 +2703,8 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s * inst = NULL; /* device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
struct stm32_i2c_priv_s *priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s *inst = NULL; /* device, single instance */
#if STM32_HSI_FREQUENCY != 8000000 || defined(INVALID_CLOCK_SOURCE)
# warning STM32_I2C_INIT: Peripheral clock is HSI and it must be 16mHz or the speed/timing calculations need to be redone.
@ -2752,29 +2748,26 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
/* Initialize instance */
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
/* Init private data for the first time, increment refs count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)inst;
}
@ -2786,41 +2779,38 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
*
****************************************************************************/
int stm32_i2cbus_uninitialize(struct i2c_master_s * dev)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t irqs;
struct stm32_i2c_priv_s *priv;
DEBUGASSERT(dev);
priv = ((struct stm32_i2c_inst_s *)dev)->priv;
/* Decrement refs and check for underflow */
if (((struct stm32_i2c_inst_s *)dev)->priv->refs == 0)
if (priv->refs == 0)
{
return ERROR;
}
irqs = enter_critical_section();
if (--((struct stm32_i2c_inst_s *)dev)->priv->refs)
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
pm_unregister(&((struct stm32_i2c_inst_s *)dev)->priv->pm_cb);
pm_unregister(&priv->pm_cb);
#endif
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
/* Release unused resources */
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;

8
arch/arm/src/stm32/stm32_i2s.c
View file

@ -1853,7 +1853,7 @@ static int stm32_i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: I2S%d has no receiver\n", priv->i2sno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -1883,7 +1883,7 @@ static int stm32_i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:
@ -2065,7 +2065,7 @@ static int stm32_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: I2S%d has no transmitter\n", priv->i2sno);
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Add a reference to the audio buffer */
@ -2095,7 +2095,7 @@ static int stm32_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
errout_with_buf:

19
arch/arm/src/stm32/stm32f40xxx_i2c.c
View file

@ -2583,8 +2583,7 @@ out:
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL;
irqstate_t flags;
struct stm32_i2c_priv_s *priv = NULL;
#if STM32_PCLK1_FREQUENCY < 4000000
# warning STM32_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation.
@ -2622,9 +2621,8 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
@ -2645,7 +2643,7 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
#endif /* CONFIG_STM32_I2C_DMA */
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -2660,7 +2658,6 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct stm32_i2c_priv_s *priv = (struct stm32_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -2671,16 +2668,13 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(priv);
@ -2690,6 +2684,7 @@ int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
stm32_dmafree(priv->txdma);
#endif
nxmutex_unlock(&priv->lock);
return OK;
}

43
arch/arm/src/stm32f0l0g0/stm32_i2c.c
View file

@ -2699,12 +2699,8 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s * inst = NULL; /* device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
struct stm32_i2c_priv_s *priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s *inst = NULL; /* device, single instance */
#if 0 /* REVISIT: this is not true for all STM32 M0 */
#if STM32_HSI_FREQUENCY != 8000000 || defined(INVALID_CLOCK_SOURCE)
@ -2750,29 +2746,27 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
/* Initialize instance */
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
/* Init private data for the first time, increment refs count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if ((volatile int)priv->refs++ == 0)
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)inst;
}
@ -2784,39 +2778,38 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
*
****************************************************************************/
int stm32_i2cbus_uninitialize(struct i2c_master_s * dev)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t irqs;
struct stm32_i2c_priv_s *priv;
DEBUGASSERT(dev);
priv = ((struct stm32_i2c_inst_s *)dev)->priv;
/* Decrement refs and check for underflow */
if (((struct stm32_i2c_inst_s *)dev)->priv->refs == 0)
if (priv->refs == 0)
{
return ERROR;
}
irqs = enter_critical_section();
if (--((struct stm32_i2c_inst_s *)dev)->priv->refs)
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
pm_unregister(&((struct stm32_i2c_inst_s *)dev)->priv->pm_cb);
pm_unregister(&priv->pm_cb);
#endif
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;

43
arch/arm/src/stm32f7/stm32_i2c.c
View file

@ -2740,12 +2740,8 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s * inst = NULL; /* device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
struct stm32_i2c_priv_s *priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s *inst = NULL; /* device, single instance */
#if STM32_HSI_FREQUENCY != 16000000 || defined(INVALID_CLOCK_SOURCE)
# warning STM32_I2C_INIT: Peripheral clock is HSI and it must be 16mHz or the speed/timing calculations need to be redone.
@ -2789,29 +2785,27 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
/* Initialize instance */
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
/* Init private data for the first time, increment refs count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if ((volatile int)priv->refs++ == 0)
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)inst;
}
@ -2823,39 +2817,38 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
*
****************************************************************************/
int stm32_i2cbus_uninitialize(struct i2c_master_s * dev)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t irqs;
struct stm32_i2c_priv_s *priv;
DEBUGASSERT(dev);
priv = ((struct stm32_i2c_inst_s *)dev)->priv;
/* Decrement refs and check for underflow */
if (((struct stm32_i2c_inst_s *)dev)->priv->refs == 0)
if (priv->refs == 0)
{
return ERROR;
}
irqs = enter_critical_section();
if (--((struct stm32_i2c_inst_s *)dev)->priv->refs)
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
pm_unregister(&((struct stm32_i2c_inst_s *)dev)->priv->pm_cb);
pm_unregister(&priv->pm_cb);
#endif
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;

8
arch/arm/src/stm32f7/stm32_sai.c
View file

@ -1228,7 +1228,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SAI has no receiver\n");
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
mode = priv->syncen ? SAI_CR1_MODE_SLAVE_RX : SAI_CR1_MODE_MASTER_RX;
@ -1264,7 +1264,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
sai_buf_free(priv, bfcontainer);
return ret;
@ -1328,7 +1328,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SAI has no transmitter\n");
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
mode = priv->syncen ? SAI_CR1_MODE_SLAVE_TX : SAI_CR1_MODE_MASTER_TX;
@ -1364,7 +1364,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
sai_buf_free(priv, bfcontainer);
return ret;

44
arch/arm/src/stm32h7/stm32_i2c.c
View file

@ -2704,12 +2704,8 @@ static int stm32_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
struct i2c_master_s *stm32_i2cbus_initialize(int port)
{
struct stm32_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s * inst = NULL; /* device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
struct stm32_i2c_priv_s *priv = NULL; /* private data of device with multiple instances */
struct stm32_i2c_inst_s *inst = NULL; /* device, single instance */
#if STM32_HSI_FREQUENCY != 16000000 || defined(INVALID_CLOCK_SOURCE)
# warning STM32_I2C_INIT: Peripheral clock is HSI and it must be 16mHz or the speed/timing calculations need to be redone.
@ -2753,29 +2749,26 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
/* Initialize instance */
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
inst->ops = &stm32_i2c_ops;
inst->priv = priv;
/* Init private data for the first time, increment refs count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_i2c_init(priv);
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)inst;
}
@ -2787,39 +2780,38 @@ struct i2c_master_s *stm32_i2cbus_initialize(int port)
*
****************************************************************************/
int stm32_i2cbus_uninitialize(struct i2c_master_s * dev)
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t irqs;
struct stm32_i2c_priv_s *priv;
DEBUGASSERT(dev);
priv = ((struct stm32_i2c_inst_s *)dev)->priv;
/* Decrement refs and check for underflow */
if (((struct stm32_i2c_inst_s *)dev)->priv->refs == 0)
if (priv->refs == 0)
{
return ERROR;
}
irqs = enter_critical_section();
if (--((struct stm32_i2c_inst_s *)dev)->priv->refs)
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
pm_unregister(&((struct stm32_i2c_inst_s *)dev)->priv->pm_cb);
pm_unregister(&priv->pm_cb);
#endif
/* Disable power and other HW resource (GPIO's) */
stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
stm32_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;

26
arch/arm/src/stm32l4/stm32l4_1wire.c
View file

@ -1143,10 +1143,6 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
{
struct stm32_1wire_priv_s *priv = NULL; /* Private data of device with multiple instances */
struct stm32_1wire_inst_s *inst = NULL; /* Device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
/* Get 1-Wire private structure */
@ -1196,15 +1192,14 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
/* Initialize instance */
inst->ops = &stm32_1wire_ops;
inst->priv = priv;
inst->ops = &stm32_1wire_ops;
inst->priv = priv;
/* Initialize private data for the first time, increment reference count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32_1wire_init(priv);
@ -1212,13 +1207,11 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct onewire_dev_s *)inst;
}
@ -1240,7 +1233,6 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
int stm32l4_1wireuninitialize(struct onewire_dev_s *dev)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
irqstate_t irqs;
DEBUGASSERT(priv != NULL);
@ -1251,17 +1243,14 @@ int stm32l4_1wireuninitialize(struct onewire_dev_s *dev)
return ERROR;
}
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(priv);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
@ -1271,6 +1260,7 @@ int stm32l4_1wireuninitialize(struct onewire_dev_s *dev)
/* Disable power and other HW resource (GPIO's) */
stm32_1wire_deinit(priv);
nxmutex_unlock(&priv->lock);
/* Free instance */

44
arch/arm/src/stm32l4/stm32l4_i2c.c
View file

@ -2914,12 +2914,8 @@ static int stm32l4_i2c_pm_prepare(struct pm_callback_s *cb, int domain,
struct i2c_master_s *stm32l4_i2cbus_initialize(int port)
{
struct stm32l4_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */
struct stm32l4_i2c_inst_s * inst = NULL; /* device, single instance */
irqstate_t irqs;
#ifdef CONFIG_PM
int ret;
#endif
struct stm32l4_i2c_priv_s *priv = NULL; /* private data of device with multiple instances */
struct stm32l4_i2c_inst_s *inst = NULL; /* device, single instance */
/* Get I2C private structure */
@ -2958,29 +2954,26 @@ struct i2c_master_s *stm32l4_i2cbus_initialize(int port)
/* Initialize instance */
inst->ops = &stm32l4_i2c_ops;
inst->priv = priv;
inst->ops = &stm32l4_i2c_ops;
inst->priv = priv;
/* Init private data for the first time, increment refs count,
* power-up hardware and configure GPIOs.
*/
irqs = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
stm32l4_i2c_init(priv);
#ifdef CONFIG_PM
/* Register to receive power management callbacks */
ret = pm_register(&priv->pm_cb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
DEBUGVERIFY(pm_register(&priv->pm_cb));
#endif
}
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)inst;
}
@ -2992,39 +2985,38 @@ struct i2c_master_s *stm32l4_i2cbus_initialize(int port)
*
****************************************************************************/
int stm32l4_i2cbus_uninitialize(struct i2c_master_s * dev)
int stm32l4_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t irqs;
struct stm32l4_i2c_priv_s *priv;
DEBUGASSERT(dev);
priv = ((struct stm32l4_i2c_inst_s *)dev)->priv;
/* Decrement refs and check for underflow */
if (((struct stm32l4_i2c_inst_s *)dev)->priv->refs == 0)
if (priv->refs == 0)
{
return ERROR;
}
irqs = enter_critical_section();
if (--((struct stm32l4_i2c_inst_s *)dev)->priv->refs)
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(irqs);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;
}
leave_critical_section(irqs);
#ifdef CONFIG_PM
/* Unregister power management callbacks */
pm_unregister(&((struct stm32l4_i2c_inst_s *)dev)->priv->pm_cb);
pm_unregister(&priv->pm_cb);
#endif
/* Disable power and other HW resource (GPIO's) */
stm32l4_i2c_deinit(((struct stm32l4_i2c_inst_s *)dev)->priv);
stm32l4_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
kmm_free(dev);
return OK;

8
arch/arm/src/stm32l4/stm32l4_sai.c
View file

@ -967,7 +967,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SAI has no receiver\n");
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
mode = priv->syncen ? SAI_CR1_MODE_SLAVE_RX : SAI_CR1_MODE_MASTER_RX;
@ -1003,7 +1003,7 @@ static int sai_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
sai_buf_free(priv, bfcontainer);
return ret;
@ -1072,7 +1072,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
{
i2serr("ERROR: SAI has no transmitter\n");
ret = -EAGAIN;
goto errout_with_excllock;
goto errout_with_lock;
}
mode = priv->syncen ? SAI_CR1_MODE_SLAVE_TX : SAI_CR1_MODE_MASTER_TX;
@ -1108,7 +1108,7 @@ static int sai_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb,
nxmutex_unlock(&priv->lock);
return OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
sai_buf_free(priv, bfcontainer);
return ret;

14
arch/arm/src/tiva/common/tiva_i2c.c
View file

@ -1872,7 +1872,6 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
{
struct tiva_i2c_priv_s *priv = NULL;
const struct tiva_i2c_config_s *config;
int flags;
i2cinfo("I2C%d: Initialize\n", port);
@ -1963,10 +1962,8 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
priv->refs++;
if (priv->refs == 1)
nxmutex_lock(&priv->lock);
if (++priv->refs == 1)
{
/* Initialize the device structure */
@ -1977,7 +1974,7 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
tiva_i2c_initialize(priv, 100000);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1992,7 +1989,6 @@ struct i2c_master_s *tiva_i2cbus_initialize(int port)
int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct tiva_i2c_priv_s *priv = (struct tiva_i2c_priv_s *)dev;
int flags;
DEBUGASSERT(priv && priv->config && priv->refs > 0);
@ -2000,7 +1996,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
/* Decrement reference count and check for underflow */
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
/* Check if the reference count will decrement to zero */
@ -2018,7 +2014,7 @@ int tiva_i2cbus_uninitialize(struct i2c_master_s *dev)
priv->refs--;
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}

19
arch/mips/src/pic32mz/pic32mz_i2c.c
View file

@ -1774,8 +1774,7 @@ out:
struct i2c_master_s *pic32mz_i2cbus_initialize(int port)
{
struct pic32mz_i2c_priv_s * priv = NULL;
irqstate_t flags;
struct pic32mz_i2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -1818,14 +1817,13 @@ struct i2c_master_s *pic32mz_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ == 0)
{
pic32mz_i2c_init(priv);
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1840,7 +1838,6 @@ struct i2c_master_s *pic32mz_i2cbus_initialize(int port)
int pic32mz_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct pic32mz_i2c_priv_s *priv = (struct pic32mz_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1851,19 +1848,17 @@ int pic32mz_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable I2C hardware */
pic32mz_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

19
arch/renesas/src/rx65n/rx65n_riic.c
View file

@ -3034,8 +3034,7 @@ static int rx65n_i2c_reset(FAR struct i2c_master_s *dev)
FAR struct i2c_master_s *rx65n_i2cbus_initialize(int channel)
{
struct rx65n_i2c_priv_s * priv = NULL;
irqstate_t irqs;
struct rx65n_i2c_priv_s *priv = NULL;
/* Get I2C private structure */
@ -3074,17 +3073,18 @@ FAR struct i2c_master_s *rx65n_i2cbus_initialize(int channel)
* initialize RIIC registers and attach IRQs
*/
irqs = enter_critical_section();
nxmutex_lock(&priv->lock);
if ((volatile int)priv->refs++ == 0)
if (priv->refs++ == 0)
{
/* Initialize the RIIC registers */
rx65n_riic_init(priv);
}
leave_critical_section(irqs);
riic_mpc_disable();
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -3099,7 +3099,6 @@ FAR struct i2c_master_s *rx65n_i2cbus_initialize(int channel)
int rx65n_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
{
FAR struct rx65n_i2c_priv_s *priv = (struct rx65n_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -3110,16 +3109,13 @@ int rx65n_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */
rx65n_riic_int_disable(priv);
@ -3129,6 +3125,7 @@ int rx65n_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
irq_detach(priv->dev->tei_irq);
irq_detach(priv->dev->eei_irq);
nxmutex_unlock(&priv->lock);
return OK;
}

21
arch/risc-v/src/bl602/bl602_i2c.c
View file

@ -943,7 +943,6 @@ static int bl602_i2c_irq(int cpuint, void *context, void *arg)
struct i2c_master_s *bl602_i2cbus_initialize(int port)
{
irqstate_t flags;
struct bl602_i2c_priv_s * priv;
const struct bl602_i2c_config_s *config;
@ -960,13 +959,10 @@ struct i2c_master_s *bl602_i2cbus_initialize(int port)
config = priv->config;
flags = enter_critical_section();
priv->refs++;
if (priv->refs > 1)
nxmutex_lock(&priv->lock);
if (++priv->refs > 1)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -979,7 +975,7 @@ struct i2c_master_s *bl602_i2cbus_initialize(int port)
bl602_i2c_intmask(I2C_INT_ALL, 1);
irq_attach(BL602_IRQ_I2C, bl602_i2c_irq, priv);
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -994,7 +990,6 @@ struct i2c_master_s *bl602_i2cbus_initialize(int port)
int bl602_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t flags;
struct bl602_i2c_priv_s *priv = (struct bl602_i2c_priv_s *)dev;
DEBUGASSERT(dev);
@ -1004,17 +999,15 @@ int bl602_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
bl602_swrst_ahb_slave1(AHB_SLAVE1_I2C);
nxmutex_unlock(&priv->lock);
return OK;
}

28
arch/risc-v/src/bl602/bl602_spi.c
View file

@ -235,11 +235,12 @@ static struct bl602_spi_priv_s bl602_spi_priv =
{
.spi_dev =
{
.ops = &bl602_spi_ops
.ops = &bl602_spi_ops
},
.config = &bl602_spi_config,
.lock = NXMUTEX_INITIALIZER,
.sem_isr = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.config = &bl602_spi_config,
.lock = NXMUTEX_INITIALIZER,
.sem_isr_tx = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.sem_isr_rx = NXSEM_INITIALIZER(0, PRIOINHERIT_FLAGS_DISABLE),
.dma_rxchan = -1,
.dma_txchan = -1,
};
@ -1652,7 +1653,6 @@ struct spi_dev_s *bl602_spibus_initialize(int port)
{
struct spi_dev_s *spi_dev;
struct bl602_spi_priv_s *priv;
irqstate_t flags;
switch (port)
{
@ -1667,21 +1667,19 @@ struct spi_dev_s *bl602_spibus_initialize(int port)
spi_dev = (struct spi_dev_s *)priv;
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs != 0)
{
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return spi_dev;
}
bl602_spi_init(spi_dev);
priv->refs++;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1695,7 +1693,6 @@ struct spi_dev_s *bl602_spibus_initialize(int port)
int bl602_spibus_uninitialize(struct spi_dev_s *dev)
{
irqstate_t flags;
struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev;
DEBUGASSERT(dev);
@ -1705,16 +1702,13 @@ int bl602_spibus_uninitialize(struct spi_dev_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
bl602_spi_deinit(dev);
return OK;
}

25
arch/risc-v/src/esp32c3/esp32c3_i2c.c
View file

@ -1452,7 +1452,6 @@ static inline void esp32c3_i2c_process(struct esp32c3_i2c_priv_s *priv,
struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
{
irqstate_t flags;
struct esp32c3_i2c_priv_s *priv;
#ifndef CONFIG_I2C_POLLED
const struct esp32c3_i2c_config_s *config;
@ -1470,11 +1469,11 @@ struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
return NULL;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if ((volatile int)priv->refs++ != 0)
if (priv->refs++ != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
i2cinfo("Returning previously initialized I2C bus. "
"Handler: %" PRIxPTR "\n", (uintptr_t)priv);
@ -1498,7 +1497,8 @@ struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
{
/* Failed to allocate a CPU interrupt of this type. */
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1510,7 +1510,8 @@ struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
esp32c3_free_cpuint(config->periph);
priv->cpuint = -ENOMEM;
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1521,8 +1522,7 @@ struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
#endif
esp32c3_i2c_init(priv);
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
i2cinfo("I2C bus initialized! Handler: %" PRIxPTR "\n", (uintptr_t)priv);
@ -1547,7 +1547,6 @@ struct i2c_master_s *esp32c3_i2cbus_initialize(int port)
int esp32c3_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t flags;
struct esp32c3_i2c_priv_s *priv = (struct esp32c3_i2c_priv_s *)dev;
DEBUGASSERT(dev);
@ -1557,16 +1556,13 @@ int esp32c3_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
#ifndef CONFIG_I2C_POLLED
up_disable_irq(priv->cpuint);
esp32c3_free_cpuint(priv->config->periph);
@ -1574,6 +1570,7 @@ int esp32c3_i2cbus_uninitialize(struct i2c_master_s *dev)
#endif
esp32c3_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

27
arch/risc-v/src/esp32c3/esp32c3_spi.c
View file

@ -1358,7 +1358,6 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
{
struct spi_dev_s *spi_dev;
struct esp32c3_spi_priv_s *priv;
irqstate_t flags;
switch (port)
{
@ -1373,12 +1372,11 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
spi_dev = (struct spi_dev_s *)priv;
flags = enter_critical_section();
if ((volatile int)priv->refs != 0)
nxmutex_lock(&priv->lock);
if (priv->refs != 0)
{
leave_critical_section(flags);
priv->refs++;
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1397,8 +1395,7 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
{
/* Failed to allocate a CPU interrupt of this type. */
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1408,7 +1405,7 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
esp32c3_free_cpuint(priv->config->periph);
priv->cpuint = -ENOMEM;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1419,11 +1416,9 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
#endif
esp32c3_spi_init(spi_dev);
priv->refs++;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1443,7 +1438,6 @@ struct spi_dev_s *esp32c3_spibus_initialize(int port)
int esp32c3_spibus_uninitialize(struct spi_dev_s *dev)
{
irqstate_t flags;
struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev;
DEBUGASSERT(dev);
@ -1453,16 +1447,13 @@ int esp32c3_spibus_uninitialize(struct spi_dev_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
#ifdef CONFIG_ESP32C3_SPI2_DMA
up_disable_irq(priv->cpuint);
esp32c3_free_cpuint(priv->config->periph);

28
arch/risc-v/src/mpfs/mpfs_i2c.c
View file

@ -780,7 +780,6 @@ static int mpfs_i2c_setfrequency(struct mpfs_i2c_priv_s *priv,
struct i2c_master_s *mpfs_i2cbus_initialize(int port)
{
struct mpfs_i2c_priv_s *priv;
irqstate_t flags;
int ret;
switch (port)
@ -799,15 +798,13 @@ struct i2c_master_s *mpfs_i2cbus_initialize(int port)
return NULL;
}
flags = enter_critical_section();
if ((volatile int)priv->refs++ != 0)
nxmutex_lock(&priv->lock);
if (priv->refs++ != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
i2cinfo("Returning previously initialized I2C bus. "
"Handler: %" PRIxPTR "\n",
(uintptr_t)priv);
"Handler: %" PRIxPTR "\n", (uintptr_t)priv);
return (struct i2c_master_s *)priv;
}
@ -815,18 +812,20 @@ struct i2c_master_s *mpfs_i2cbus_initialize(int port)
ret = irq_attach(priv->plic_irq, mpfs_i2c_irq, priv);
if (ret != OK)
{
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return NULL;
}
ret = mpfs_i2c_init(priv);
if (ret != OK)
{
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return NULL;
}
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
i2cinfo("I2C bus initialized! Handler: %" PRIxPTR "\n", (uintptr_t)priv);
@ -852,7 +851,6 @@ struct i2c_master_s *mpfs_i2cbus_initialize(int port)
int mpfs_i2cbus_uninitialize(struct i2c_master_s *dev)
{
struct mpfs_i2c_priv_s *priv = (struct mpfs_i2c_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -861,17 +859,15 @@ int mpfs_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
mpfs_i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

22
arch/risc-v/src/mpfs/mpfs_spi.c
View file

@ -1488,7 +1488,6 @@ struct spi_dev_s *mpfs_spibus_initialize(int port)
{
struct spi_dev_s *spi_dev;
struct mpfs_spi_priv_s *priv;
irqstate_t flags;
int ret;
switch (port)
@ -1509,11 +1508,11 @@ struct spi_dev_s *mpfs_spibus_initialize(int port)
spi_dev = (struct spi_dev_s *)priv;
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs != 0)
{
leave_critical_section(flags);
priv->refs++;
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1521,16 +1520,14 @@ struct spi_dev_s *mpfs_spibus_initialize(int port)
ret = irq_attach(priv->plic_irq, mpfs_spi_irq, priv);
if (ret != OK)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
mpfs_spi_init(spi_dev);
priv->refs++;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1545,7 +1542,6 @@ struct spi_dev_s *mpfs_spibus_initialize(int port)
int mpfs_spibus_uninitialize(struct spi_dev_s *dev)
{
struct mpfs_spi_priv_s *priv = (struct mpfs_spi_priv_s *)dev;
irqstate_t flags;
DEBUGASSERT(dev);
@ -1554,17 +1550,15 @@ int mpfs_spibus_uninitialize(struct spi_dev_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
mpfs_spi_deinit(dev);
nxmutex_unlock(&priv->lock);
return OK;
}

26
arch/xtensa/src/esp32s2/esp32s2_i2c.c
View file

@ -1504,7 +1504,6 @@ static void i2c_process(struct esp32s2_i2c_priv_s *priv, uint32_t status)
struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
{
irqstate_t flags;
struct esp32s2_i2c_priv_s *priv;
#ifndef CONFIG_I2C_POLLED
const struct esp32s2_i2c_config_s *config;
@ -1527,12 +1526,10 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
return NULL;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (priv->refs++ != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1546,7 +1543,8 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
{
/* Failed to allocate a CPU interrupt of this type */
leave_critical_section(flags);
priv->refs--;
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1555,9 +1553,9 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
if (ret != OK)
{
esp32s2_teardown_irq(config->periph, priv->cpuint);
priv->refs--;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1565,8 +1563,7 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
#endif
i2c_init(priv);
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return (struct i2c_master_s *)priv;
}
@ -1589,7 +1586,6 @@ struct i2c_master_s *esp32s2_i2cbus_initialize(int port)
int esp32s2_i2cbus_uninitialize(struct i2c_master_s *dev)
{
irqstate_t flags;
struct esp32s2_i2c_priv_s *priv = (struct esp32s2_i2c_priv_s *)dev;
DEBUGASSERT(dev != NULL);
@ -1599,22 +1595,20 @@ int esp32s2_i2cbus_uninitialize(struct i2c_master_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
#ifndef CONFIG_I2C_POLLED
up_disable_irq(priv->config->irq);
esp32s2_teardown_irq(priv->config->periph, priv->cpuint);
#endif
i2c_deinit(priv);
nxmutex_unlock(&priv->lock);
return OK;
}

17
arch/xtensa/src/esp32s2/esp32s2_spi.c
View file

@ -1133,7 +1133,6 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
{
struct spi_dev_s *spi_dev;
struct esp32s2_spi_priv_s *priv;
irqstate_t flags;
switch (port)
{
@ -1152,15 +1151,12 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
}
spi_dev = (struct spi_dev_s *)priv;
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
esp32s2_spi_init(spi_dev);
priv->refs++;
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1180,7 +1176,6 @@ struct spi_dev_s *esp32s2_spibus_initialize(int port)
int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
{
irqstate_t flags;
struct esp32s2_spi_priv_s *priv = (struct esp32s2_spi_priv_s *)dev;
DEBUGASSERT(dev);
@ -1190,17 +1185,15 @@ int esp32s2_spibus_uninitialize(struct spi_dev_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
esp32s2_spi_deinit(dev);
nxmutex_unlock(&priv->lock);
return OK;
}

26
arch/xtensa/src/esp32s3/esp32s3_spi.c
View file

@ -1482,7 +1482,6 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
{
struct spi_dev_s *spi_dev;
struct esp32s3_spi_priv_s *priv;
irqstate_t flags;
switch (port)
{
@ -1502,12 +1501,11 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
spi_dev = (struct spi_dev_s *)priv;
flags = spin_lock_irqsave(&priv->lock);
nxmutex_lock(&priv->lock);
if (priv->refs != 0)
{
spin_unlock_irqrestore(&priv->lock, flags);
priv->refs++;
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1536,8 +1534,7 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
{
/* Failed to allocate a CPU interrupt of this type. */
spin_unlock_irqrestore(&priv->lock, flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1549,7 +1546,7 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
priv->cpuint = -ENOMEM;
spin_unlock_irqrestore(&priv->lock, flags);
nxmutex_unlock(&priv->lock);
return NULL;
}
@ -1560,11 +1557,9 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
#endif
esp32s3_spi_init(spi_dev);
priv->refs++;
spin_unlock_irqrestore(&priv->lock, flags);
nxmutex_unlock(&priv->lock);
return spi_dev;
}
@ -1584,7 +1579,6 @@ struct spi_dev_s *esp32s3_spibus_initialize(int port)
int esp32s3_spibus_uninitialize(struct spi_dev_s *dev)
{
irqstate_t flags;
struct esp32s3_spi_priv_s *priv = (struct esp32s3_spi_priv_s *)dev;
DEBUGASSERT(dev);
@ -1594,16 +1588,13 @@ int esp32s3_spibus_uninitialize(struct spi_dev_s *dev)
return ERROR;
}
flags = enter_critical_section();
nxmutex_lock(&priv->lock);
if (--priv->refs != 0)
{
leave_critical_section(flags);
nxmutex_unlock(&priv->lock);
return OK;
}
leave_critical_section(flags);
#ifdef CONFIG_ESP32S3_SPI2_DMA
up_disable_irq(priv->config->irq);
esp32s3_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint);
@ -1614,6 +1605,7 @@ int esp32s3_spibus_uninitialize(struct spi_dev_s *dev)
#endif
esp32s3_spi_deinit(dev);
nxmutex_unlock(&priv->lock);
return OK;
}

8
drivers/input/nunchuck.c
View file

@ -301,7 +301,7 @@ static int nunchuck_open(FAR struct file *filep)
{
ierr("ERROR: Failed to allocate open structure\n");
ret = -ENOMEM;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Attach the open structure to the device */
@ -314,7 +314,7 @@ static int nunchuck_open(FAR struct file *filep)
filep->f_priv = (FAR void *)opriv;
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}
@ -382,7 +382,7 @@ static int nunchuck_close(FAR struct file *filep)
{
ierr("ERROR: Failed to find open entry\n");
ret = -ENOENT;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Remove the structure from the device */
@ -402,7 +402,7 @@ static int nunchuck_close(FAR struct file *filep)
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}

4
drivers/leds/userled_upper.c
View file

@ -229,7 +229,7 @@ static int userled_close(FAR struct file *filep)
{
lederr("ERROR: Failed to find open entry\n");
ret = -ENOENT;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Remove the structure from the device */
@ -248,7 +248,7 @@ static int userled_close(FAR struct file *filep)
kmm_free(opriv);
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lu_lock);
return ret;
}

8
fs/mount/fs_automount.c
View file

@ -223,7 +223,7 @@ static int automount_open(FAR struct file *filep)
{
ierr("ERROR: Failed to allocate open structure\n");
ret = -ENOMEM;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Attach the open structure to the device */
@ -236,7 +236,7 @@ static int automount_open(FAR struct file *filep)
filep->f_priv = (FAR void *)opriv;
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}
@ -280,7 +280,7 @@ static int automount_close(FAR struct file *filep)
{
ierr("ERROR: Failed to find open entry\n");
ret = -ENOENT;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Remove the structure from the device */
@ -304,7 +304,7 @@ static int automount_close(FAR struct file *filep)
ret = OK;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&priv->lock);
return ret;
}

4
fs/nxffs/nxffs_ioctl.c
View file

@ -86,7 +86,7 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
ferr("ERROR: Open files\n");
ret = -EBUSY;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Re-format the volume -- all is lost */
@ -109,7 +109,7 @@ int nxffs_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
ret = MTD_IOCTL(volume->mtd, cmd, arg);
}
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&volume->lock);
errout:
return ret;

20
fs/nxffs/nxffs_open.c
View file

@ -416,7 +416,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
ferr("ERROR: File is open for reading\n");
ret = -ENOSYS;
goto errout_with_excllock;
goto errout_with_lock;
}
/* It would be an error if we are asked to create the file
@ -427,7 +427,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
{
ferr("ERROR: File exists, can't create O_EXCL\n");
ret = -EEXIST;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Were we asked to truncate the file? NOTE: Don't truncate the
@ -455,7 +455,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
ferr("ERROR: File %s exists and we were not asked to "
"truncate it\n", name);
ret = -ENOSYS;
goto errout_with_excllock;
goto errout_with_lock;
}
}
@ -467,7 +467,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
{
ferr("ERROR: Not asked to create the file\n");
ret = -ENOENT;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Make sure that the length of the file name will fit in a uint8_t */
@ -477,7 +477,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
{
ferr("ERROR: Name is too long: %d\n", namlen);
ret = -EINVAL;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Yes.. Create a new structure that will describe the state of this open
@ -494,7 +494,7 @@ static inline int nxffs_wropen(FAR struct nxffs_volume_s *volume,
if (!wrfile)
{
ret = -ENOMEM;
goto errout_with_excllock;
goto errout_with_lock;
}
#endif
@ -660,7 +660,7 @@ errout_with_ofile:
kmm_free(wrfile);
#endif
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&volume->lock);
errout_with_wrsem:
nxsem_post(&volume->wrsem);
@ -707,7 +707,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
{
ferr("ERROR: File is open for writing\n");
ret = -ENOSYS;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Just increment the reference count on the ofile */
@ -731,7 +731,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
{
ferr("ERROR: ofile allocation failed\n");
ret = -ENOMEM;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Initialize the open file state structure */
@ -762,7 +762,7 @@ static inline int nxffs_rdopen(FAR struct nxffs_volume_s *volume,
errout_with_ofile:
kmm_free(ofile);
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&volume->lock);
errout:
return ret;

6
fs/nxffs/nxffs_read.c
View file

@ -170,7 +170,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
{
ferr("ERROR: File not open for read access\n");
ret = -EACCES;
goto errout_with_excllock;
goto errout_with_lock;
}
/* Loop until all bytes have been read */
@ -194,7 +194,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
{
ferr("ERROR: nxffs_rdseek failed: %d\n", -ret);
ret = -EACCES;
goto errout_with_excllock;
goto errout_with_lock;
}
/* How many bytes are available at this offset */
@ -222,7 +222,7 @@ ssize_t nxffs_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
nxmutex_unlock(&volume->lock);
return total;
errout_with_excllock:
errout_with_lock:
nxmutex_unlock(&volume->lock);
errout:
return (ssize_t)ret;