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esp32_spiflash.c: Pause the other CPU during flash operation.

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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2021-09-29 14:08:17 +02:00 • committed by Xiang Xiao
parent 1de17c364f
commit dfe1637864
1 changed files with 2 additions and 0 deletions
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2
arch/xtensa/src/esp32/esp32_spiflash.c
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@ -419,6 +419,7 @@ static inline void IRAM_ATTR
DEBUGASSERT(state->cpu == 0 || state->cpu == 1);
#ifdef CONFIG_SMP
DEBUGASSERT(other == 0 || other == 1);
up_cpu_pause(other);
#endif
spi_disable_cache(state->cpu, &state->val[state->cpu]);
@ -454,6 +455,7 @@ static inline void IRAM_ATTR
spi_enable_cache(state->cpu, state->val[state->cpu]);
#ifdef CONFIG_SMP
spi_enable_cache(other, state->val[other]);
up_cpu_resume(other);
#endif
leave_critical_section(state->flags);