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arch/risc-v: update lower-half drivers for ESP32-C3|C6|H2

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This commit is contained in:
Filipe Cavalcanti 2025-06-13 16:14:07 -03:00 • committed by Xiang Xiao
parent 187a386cc7
commit e57d2a5247
41 changed files with 1534 additions and 1200 deletions
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8
arch/risc-v/src/common/espressif/Bootloader.mk
View file

@ -61,6 +61,7 @@ $(BOOTLOADER_SRCDIR):
$(BOOTLOADER_CONFIG): $(TOPDIR)/.config $(BOOTLOADER_SRCDIR)
$(Q) echo "Creating Bootloader configuration"
$(Q) { \
$(call cfg_en,NON_OS_BUILD) \
$(if $(CONFIG_ESPRESSIF_FLASH_2M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHSIZE_2MB)) \
$(if $(CONFIG_ESPRESSIF_FLASH_4M),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHSIZE_4MB)) \
$(if $(CONFIG_ESPRESSIF_FLASH_MODE_DIO),$(call cfg_en,CONFIG_ESPTOOLPY_FLASHMODE_DIO)) \
@ -77,18 +78,23 @@ $(BOOTLOADER_CONFIG): $(TOPDIR)/.config $(BOOTLOADER_SRCDIR)
} > $(BOOTLOADER_CONFIG)
ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y)
$(Q) { \
$(call cfg_en,CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT) \
$(call cfg_val,CONFIG_ESP_BOOTLOADER_OFFSET,0x0000) \
$(call cfg_val,CONFIG_ESP_BOOTLOADER_SIZE,0xF000) \
$(call cfg_val,CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS,$(CONFIG_ESPRESSIF_OTA_PRIMARY_SLOT_OFFSET)) \
$(call cfg_val,CONFIG_ESP_APPLICATION_SIZE,$(CONFIG_ESPRESSIF_OTA_SLOT_SIZE)) \
$(call cfg_val,CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS,$(CONFIG_ESPRESSIF_OTA_SECONDARY_SLOT_OFFSET)) \
$(call cfg_en,CONFIG_ESP_MCUBOOT_WDT_ENABLE) \
$(call cfg_en,CONFIG_LIBC_NEWLIB) \
$(call cfg_val,CONFIG_ESP_SCRATCH_OFFSET,$(CONFIG_ESPRESSIF_OTA_SCRATCH_OFFSET)) \
$(call cfg_val,CONFIG_ESP_SCRATCH_SIZE,$(CONFIG_ESPRESSIF_OTA_SCRATCH_SIZE)) \
$(call cfg_en,CONFIG_ESP_CONSOLE_UART) \
$(if $(CONFIG_UART0_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,0)) \
$(if $(CONFIG_ESPRESSIF_USBSERIAL),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,0)) \
$(if $(CONFIG_UART1_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,1)) \
$(if $(CONFIG_UART0_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM,0)) \
$(if $(CONFIG_UART1_SERIAL_CONSOLE),$(call cfg_val,CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM,1)) \
$(if $(CONFIG_ESPRESSIF_USBSERIAL),$(call cfg_val,CONFIG_ESP_CONSOLE_UART_NUM,0)) \
$(call cfg_val,CONFIG_BOOTLOADER_LOG_LEVEL,3) \
} >> $(BOOTLOADER_CONFIG)
endif

6
arch/risc-v/src/common/espressif/Kconfig
View file

@ -1018,6 +1018,12 @@ config ESPRESSIF_WIFI_ENABLE_SAE_PK
---help---
Select this option to enable SAE-PK
config ESPRESSIF_WIFI_ENABLE_SAE_H2E
bool "Enable SAE-H2E"
default y
---help---
Select this option to enable SAE-H2E
config ESPRESSIF_WIFI_SOFTAP_SAE_SUPPORT
bool "Enable WPA3 Personal(SAE) SoftAP"
default y

5
arch/risc-v/src/common/espressif/Make.defs
View file

@ -178,7 +178,7 @@ endif
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
ifndef ESP_HAL_3RDPARTY_VERSION
ESP_HAL_3RDPARTY_VERSION = 0b15e1a642d7005ad11c3c0394c784959f478f5f
ESP_HAL_3RDPARTY_VERSION = e9a78c811578545e2bc673862d885a15bd6cbf67
endif
ifndef ESP_HAL_3RDPARTY_URL
@ -208,9 +208,10 @@ chip/$(ESP_HAL_3RDPARTY_REPO):
$(Q) $(call CLONE_ESP_HAL_3RDPARTY_REPO)
$(Q) echo "Espressif HAL for 3rd Party Platforms: ${ESP_HAL_3RDPARTY_VERSION}"
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) checkout --quiet $(ESP_HAL_3RDPARTY_VERSION)
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init $(GIT_DEPTH_PARAMETER) components/mbedtls/mbedtls
ifeq ($(CONFIG_ESP_WIRELESS),y)
$(Q) echo "Espressif HAL for 3rd Party Platforms: initializing submodules..."
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init $(GIT_DEPTH_PARAMETER) components/mbedtls/mbedtls components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/esp_coex/lib
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO) submodule --quiet update --init $(GIT_DEPTH_PARAMETER) components/esp_phy/lib components/esp_wifi/lib components/bt/controller/lib_esp32c3_family components/esp_coex/lib
$(Q) git -C chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls reset --quiet --hard
$(Q) echo "Applying patches..."
$(Q) cd chip/$(ESP_HAL_3RDPARTY_REPO)/components/mbedtls/mbedtls && git apply ../../../nuttx/patches/components/mbedtls/mbedtls/*.patch

17
arch/risc-v/src/common/espressif/Wireless.mk
View file

@ -31,7 +31,7 @@ EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)lib$(DELIM)$(CHIP_SERIES)
EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)lib$(DELIM)$(CHIP_SERIES)
EXTRA_LIBS += -lphy -lcoexist -lmesh
EXTRA_LIBS += -lphy -lcoexist -lmesh -lespnow
ifeq ($(CONFIG_ESPRESSIF_WIFI),y)
@ -115,13 +115,20 @@ CFLAGS += $(DEFINE_PREFIX)ESPRESSIF_USE
CFLAGS += $(DEFINE_PREFIX)IEEE8021X_EAPOL
CFLAGS += $(DEFINE_PREFIX)USE_WPA2_TASK
CFLAGS += $(DEFINE_PREFIX)CONFIG_SHA256
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE
CFLAGS += $(DEFINE_PREFIX)USE_WPS_TASK
ifeq ($(CONFIG_ESPRESSIF_WIFI_SOFTAP_SAE_SUPPORT),y)
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE
endif
ifeq ($(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_PK),y)
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE_PK
endif
ifeq ($(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_H2E),y)
CFLAGS += $(DEFINE_PREFIX)CONFIG_SAE_H2E
endif
ifeq ($(CONFIG_ESPRESSIF_WIFI_ENABLE_WPA3_OWE_STA),y)
CFLAGS += $(DEFINE_PREFIX)CONFIG_OWE_STA
endif
@ -156,7 +163,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)$(WIFI_WPA_SUPPLICANT)$(DELIM)
CHIP_CSRCS += dragonfly.c
CHIP_CSRCS += sae.c
CHIP_CSRCS += wpa_common.c
ifeq ($(CONFIG_ESPRESSIF_WIFI_ENABLE_SAE_PK),y)
CHIP_CSRCS += sae_pk.c
endif
CHIP_CSRCS += bss.c
CHIP_CSRCS += scan.c
CHIP_CSRCS += ieee802_11_common.c
@ -244,4 +253,8 @@ CHIP_CSRCS += crypto_mbedtls.c
CHIP_CSRCS += tls_mbedtls.c
CHIP_CSRCS += aes-siv.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)src$(DELIM)wifi_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)src$(DELIM)lib_printf.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)regulatory$(DELIM)esp_wifi_regulatory.c
endif

20
arch/risc-v/src/common/espressif/esp_dma.c
View file

@ -56,7 +56,7 @@
/* DMA channel number */
#define ESPRESSIF_DMA_CHAN_MAX (SOC_GDMA_PAIRS_PER_GROUP)
#define ESPRESSIF_DMA_CHAN_MAX (SOC_GDMA_PAIRS_PER_GROUP_MAX)
/****************************************************************************
* Private Data
@ -104,7 +104,7 @@ int32_t esp_dma_request(enum esp_dma_periph_e periph,
nxmutex_lock(&g_dma_lock);
for (chan = 0; chan < SOC_GDMA_PAIRS_PER_GROUP; chan++)
for (chan = 0; chan < ESPRESSIF_DMA_CHAN_MAX; chan++)
{
if (!g_dma_chan_used[chan])
{
@ -113,7 +113,7 @@ int32_t esp_dma_request(enum esp_dma_periph_e periph,
}
}
if (chan == SOC_GDMA_PAIRS_PER_GROUP)
if (chan == ESPRESSIF_DMA_CHAN_MAX)
{
dmaerr("No available GDMA channel for allocation\n");
@ -332,11 +332,11 @@ int esp_dma_get_interrupt(int chan, bool tx)
if (tx)
{
intr_status = gdma_ll_tx_get_interrupt_status(ctx.dev, chan);
intr_status = gdma_ll_tx_get_interrupt_status(ctx.dev, chan, false);
}
else
{
intr_status = gdma_ll_rx_get_interrupt_status(ctx.dev, chan);
intr_status = gdma_ll_rx_get_interrupt_status(ctx.dev, chan, false);
}
return intr_status;
@ -474,11 +474,11 @@ void esp_dma_wait_idle(int chan, bool tx)
{
if (tx)
{
while (gdma_ll_tx_is_fsm_idle(ctx.dev, chan) == 0);
while (gdma_ll_tx_is_desc_fsm_idle(ctx.dev, chan) == 0);
}
else
{
while (gdma_ll_rx_is_fsm_idle(ctx.dev, chan) == 0);
while (gdma_ll_rx_is_desc_fsm_idle(ctx.dev, chan) == 0);
}
}
@ -526,8 +526,8 @@ void esp_dma_reset_channel(int chan, bool tx)
void esp_dma_init(void)
{
periph_module_enable(PERIPH_GDMA_MODULE);
gdma_hal_init(&ctx, 0);
gdma_ll_enable_clock(ctx.dev, true);
ctx.dev = GDMA_LL_GET_HW(0);
gdma_ll_force_enable_reg_clock(ctx.dev, true);
}
/****************************************************************************
@ -550,7 +550,7 @@ void esp_dma_deinit(void)
/* Disable DMA clock gating */
gdma_ll_enable_clock(ctx.dev, false);
gdma_ll_force_enable_reg_clock(ctx.dev, false);
/* Disable DMA module by gating the clock and asserting the reset
* signal.

4
arch/risc-v/src/common/espressif/esp_gpio.c
View file

@ -238,11 +238,11 @@ int esp_configgpio(int pin, gpio_pinattr_t attr)
if ((attr & FUNCTION_MASK) != 0)
{
uint32_t val = ((attr & FUNCTION_MASK) >> FUNCTION_SHIFT) - 1;
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], val);
gpio_hal_func_sel(&g_gpio_hal, pin, val);
}
else
{
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[pin], PIN_FUNC_GPIO);
gpio_hal_func_sel(&g_gpio_hal, pin, PIN_FUNC_GPIO);
}
return OK;

63
arch/risc-v/src/common/espressif/esp_hr_timer.c
View file

@ -351,11 +351,11 @@ int IRAM_ATTR esp_hr_timer_create(const struct esp_hr_timer_args_s *args,
* repeat - Repeat mode (true: enabled, false: disabled).
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
int IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
uint64_t timeout,
bool repeat)
{
@ -364,12 +364,22 @@ void IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
uint64_t counter;
struct esp_hr_timer_s *p;
irqstate_t flags = spin_lock_irqsave(&priv->lock);
int ret = ERROR;
if (timer == NULL)
{
return ret;
}
/* Only idle timer can be started */
if (timer->state != HR_TIMER_IDLE)
{
esp_hr_timer_stop_nolock(timer);
ret = esp_hr_timer_stop_nolock(timer);
if (ret != OK)
{
return ret;
}
}
/* Calculate the timer's alarm value */
@ -424,6 +434,7 @@ void IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
}
spin_unlock_irqrestore(&priv->lock, flags);
return OK;
}
/****************************************************************************
@ -437,13 +448,14 @@ void IRAM_ATTR esp_hr_timer_start(struct esp_hr_timer_s *timer,
* timeout - Timeout value.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout)
int esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout)
{
esp_hr_timer_start(timer, timeout, false);
int ret = esp_hr_timer_start(timer, timeout, false);
return ret;
}
/****************************************************************************
@ -457,14 +469,15 @@ void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout)
* timeout - Timeout value.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
int esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
uint64_t timeout)
{
esp_hr_timer_start(timer, timeout, true);
int ret = esp_hr_timer_start(timer, timeout, true);
return ret;
}
/****************************************************************************
@ -477,14 +490,19 @@ void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
* timer - HR Timer pointer.
*
* Returned Value:
* None.
* OK on success, ERROR on failure.
*
****************************************************************************/
void IRAM_ATTR esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer)
int IRAM_ATTR esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer)
{
struct esp_hr_timer_context_s *priv = &g_hr_timer_context;
if (timer == NULL)
{
return ERROR;
}
/* "start" function can set the timer's repeat flag, and "stop" function
* should remove this flag.
*/
@ -546,15 +564,24 @@ void IRAM_ATTR esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer)
timer->state = HR_TIMER_IDLE;
timer->callback(timer->arg);
}
return OK;
}
void IRAM_ATTR esp_hr_timer_stop(struct esp_hr_timer_s *timer)
int IRAM_ATTR esp_hr_timer_stop(struct esp_hr_timer_s *timer)
{
int ret = ERROR;
struct esp_hr_timer_context_s *priv = &g_hr_timer_context;
irqstate_t flags = spin_lock_irqsave(&priv->lock);
esp_hr_timer_stop_nolock(timer);
if (timer == NULL)
{
return ret;
}
ret = esp_hr_timer_stop_nolock(timer);
spin_unlock_irqrestore(&priv->lock, flags);
return ret;
}
/****************************************************************************
@ -567,13 +594,13 @@ void IRAM_ATTR esp_hr_timer_stop(struct esp_hr_timer_s *timer)
* timer - HR Timer pointer.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_delete(struct esp_hr_timer_s *timer)
int esp_hr_timer_delete(struct esp_hr_timer_s *timer)
{
int ret;
int ret = ERROR;
irqstate_t flags;
struct esp_hr_timer_context_s *priv = &g_hr_timer_context;
@ -591,7 +618,7 @@ void esp_hr_timer_delete(struct esp_hr_timer_s *timer)
else if (timer->state == HR_TIMER_DELETE)
{
spin_unlock_irqrestore(&priv->lock, flags);
return;
return ret;
}
list_add_after(&priv->toutlist, &timer->list);
@ -605,6 +632,8 @@ void esp_hr_timer_delete(struct esp_hr_timer_s *timer)
{
tmrerr("Failed to post sem ret=%d\n", ret);
}
return ret;
}
/****************************************************************************

22
arch/risc-v/src/common/espressif/esp_hr_timer.h
View file

@ -123,11 +123,11 @@ int esp_hr_timer_create(const struct esp_hr_timer_args_s *args,
* repeat - Repeat mode (true: enabled, false: disabled).
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_start(struct esp_hr_timer_s *timer,
int esp_hr_timer_start(struct esp_hr_timer_s *timer,
uint64_t timeout,
bool repeat);
@ -142,11 +142,11 @@ void esp_hr_timer_start(struct esp_hr_timer_s *timer,
* timeout - Timeout value.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout);
int esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout);
/****************************************************************************
* Name: esp_hr_timer_start_periodic
@ -159,11 +159,11 @@ void esp_hr_timer_start_once(struct esp_hr_timer_s *timer, uint64_t timeout);
* timeout - Timeout value.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
int esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
uint64_t timeout);
/****************************************************************************
@ -176,12 +176,12 @@ void esp_hr_timer_start_periodic(struct esp_hr_timer_s *timer,
* timer - HR Timer pointer.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_stop(struct esp_hr_timer_s *timer);
void esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer);
int esp_hr_timer_stop(struct esp_hr_timer_s *timer);
int esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer);
/****************************************************************************
* Name: esp_hr_timer_delete
@ -193,11 +193,11 @@ void esp_hr_timer_stop_nolock(struct esp_hr_timer_s *timer);
* timer - HR Timer pointer.
*
* Returned Value:
* None.
* OK on success; ERROR on failure.
*
****************************************************************************/
void esp_hr_timer_delete(struct esp_hr_timer_s *timer);
int esp_hr_timer_delete(struct esp_hr_timer_s *timer);
/****************************************************************************
* Name: esp_hr_timer_time_us

49
arch/risc-v/src/common/espressif/esp_i2c.c
View file

@ -125,6 +125,10 @@
# define CONFIG_I2C_NTRACE 32
#endif
/* Time to wait for the bus to be cleared */
#define I2C_CLR_BUS_TIMEOUT_MS (50)
/****************************************************************************
* Private Types
****************************************************************************/
@ -213,6 +217,8 @@ struct esp_i2c_priv_s
uint32_t id; /* I2C instance */
periph_module_t module; /* Peripheral module */
/* Port configuration */
const struct esp_i2c_config_s *config;
@ -346,6 +352,7 @@ static struct esp_i2c_priv_s esp_i2c0_priv =
{
.ops = &esp_i2c_ops,
.id = 0,
.module = PERIPH_I2C0_MODULE,
.config = &esp_i2c0_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
@ -396,6 +403,7 @@ static struct esp_i2c_priv_s esp_i2c1_priv =
{
.ops = &esp_i2c_ops,
.id = 1,
.module = PERIPH_I2C1_MODULE,
.config = &esp_i2c1_config,
.refs = 0,
.lock = NXMUTEX_INITIALIZER,
@ -515,9 +523,9 @@ static void esp_i2c_sendstart(struct esp_i2c_priv_s *priv)
end_cmd.op_code = I2C_LL_CMD_END;
i2c_ll_write_cmd_reg(priv->ctx->dev, restart_cmd, 0);
i2c_ll_write_cmd_reg(priv->ctx->dev, write_cmd, 1);
i2c_ll_write_cmd_reg(priv->ctx->dev, end_cmd, 2);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, restart_cmd, 0);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, write_cmd, 1);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, end_cmd, 2);
/* Write data to FIFO register */
@ -564,8 +572,8 @@ static void esp_i2c_senddata(struct esp_i2c_priv_s *priv)
n = n < I2C_FIFO_SIZE ? n : I2C_FIFO_SIZE;
write_cmd.byte_num = n;
i2c_ll_write_cmd_reg(priv->ctx->dev, write_cmd, 0);
i2c_ll_write_cmd_reg(priv->ctx->dev, end_cmd, 1);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, write_cmd, 0);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, end_cmd, 1);
i2c_ll_write_txfifo(priv->ctx->dev, &msg->buffer[priv->bytes], n);
i2c_ll_master_enable_tx_it(priv->ctx->dev);
@ -643,10 +651,10 @@ static void esp_i2c_startrecv(struct esp_i2c_priv_s *priv)
read_cmd.byte_num = n;
read_cmd.ack_val = ack_value;
read_cmd.op_code = I2C_LL_CMD_READ;
i2c_ll_write_cmd_reg(priv->ctx->dev, read_cmd, 0);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, read_cmd, 0);
end_cmd.op_code = I2C_LL_CMD_END;
i2c_ll_write_cmd_reg(priv->ctx->dev, end_cmd, 1);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, end_cmd, 1);
/* Enable I2C master RX interrupt */
@ -677,7 +685,7 @@ static void esp_i2c_sendstop(struct esp_i2c_priv_s *priv)
.op_code = I2C_LL_CMD_STOP
};
i2c_ll_write_cmd_reg(priv->ctx->dev, stop_cmd, 0);
i2c_ll_master_write_cmd_reg(priv->ctx->dev, stop_cmd, 0);
/* Enable I2C master TX interrupt */
@ -747,7 +755,7 @@ static void esp_i2c_init(struct esp_i2c_priv_s *priv)
/* Enable I2C hardware */
periph_module_enable(i2c_periph_signal[priv->id].module);
periph_module_enable(priv->module);
i2c_hal_init(priv->ctx, priv->id);
@ -761,7 +769,7 @@ static void esp_i2c_init(struct esp_i2c_priv_s *priv)
/* Configure the hardware filter function */
i2c_ll_set_filter(priv->ctx->dev, I2C_FILTER_CYC_NUM_DEF);
i2c_ll_master_set_filter(priv->ctx->dev, I2C_FILTER_CYC_NUM_DEF);
/* Initialize I2C bus clock */
@ -785,7 +793,7 @@ static void esp_i2c_deinit(struct esp_i2c_priv_s *priv)
priv->clk_freq = 0;
i2c_hal_deinit(priv->ctx);
periph_module_disable(i2c_periph_signal[priv->id].module);
periph_module_disable(priv->module);
}
/****************************************************************************
@ -1089,7 +1097,24 @@ static int esp_i2c_transfer(struct i2c_master_s *dev,
#ifdef CONFIG_I2C_RESET
static void esp_i2c_clear_bus(struct esp_i2c_priv_s *priv)
{
i2c_ll_master_clr_bus(priv->ctx->dev);
i2c_ll_master_clr_bus(priv->ctx->dev,
I2C_LL_RESET_SLV_SCL_PULSE_NUM_DEFAULT, true);
/* Wait for bus clear done or timeout */
clock_t start = clock_systime_ticks();
clock_t timeout = start + MSEC2TICK(I2C_CLR_BUS_TIMEOUT_MS);
while (i2c_ll_master_is_bus_clear_done(priv->ctx->dev))
{
if (clock_systime_ticks() >= timeout)
{
i2cerr("ERROR: clear bus failed.\n");
i2c_ll_master_clr_bus(priv->ctx->dev, 0, false);
break;
}
}
i2c_ll_update(priv->ctx->dev);
}
#endif

22
arch/risc-v/src/common/espressif/esp_i2s.c
View file

@ -73,12 +73,6 @@
#endif
#ifdef CONFIG_ESPRESSIF_ESP32C3
# define GDMA_OUT_TOTAL_EOF_CH0_INT_ENA DMA_OUT_TOTAL_EOF_CH0_INT_ENA
# define GDMA_OUT_DSCR_ERR_CH0_INT_ENA DMA_OUT_DSCR_ERR_CH0_INT_ENA
# define GDMA_IN_SUC_EOF_CH0_INT_ENA DMA_IN_SUC_EOF_CH0_INT_ENA
# define GDMA_OUT_EOF_CH0_INT_ENA DMA_OUT_EOF_CH0_INT_ENA
# define GDMA_OUT_TOTAL_EOF_CH0_INT_ST DMA_OUT_TOTAL_EOF_CH0_INT_ST
# define GDMA_IN_SUC_EOF_CH0_INT_ST DMA_IN_SUC_EOF_CH0_INT_ST
# define CLK_SRC I2S_CLK_SRC_PLL_160M
#endif
@ -173,7 +167,7 @@
cfg.sinc_scale = I2S_PDM_SIG_SCALING_MUL_1, \
cfg.line_mode = I2S_PDM_TX_ONE_LINE_CODEC, \
cfg.hp_en = true, \
cfg.hp_cut_off_freq_hz = 35.5, \
cfg.hp_cut_off_freq_hzx10 = 35.5, \
cfg.sd_dither = 0, \
cfg.sd_dither2 = 1 \
@ -1330,6 +1324,8 @@ static void i2s_configure(struct esp_i2s_s *priv)
uint32_t tx_conf = 0;
uint32_t rx_conf = 0;
bool loopback = false;
int __DECLARE_RCC_ATOMIC_ENV __attribute__((unused));
i2s_hal_slot_config_t tx_slot_cfg =
{
0
@ -1342,10 +1338,10 @@ static void i2s_configure(struct esp_i2s_s *priv)
/* Set peripheral clock and clear reset */
periph_module_enable(i2s_periph_signal[priv->config->port].module);
periph_module_enable(PERIPH_I2S0_MODULE);
i2s_hal_init(priv->config->ctx, priv->config->port);
i2s_ll_enable_clock(priv->config->ctx->dev);
i2s_ll_enable_bus_clock(priv->config->port, true);
/* Configure multiplexed pins as connected on the board */
@ -1524,7 +1520,7 @@ static void i2s_configure(struct esp_i2s_s *priv)
}
else
{
i2s_ll_tx_enable_pdm(priv->config->ctx->dev);
i2s_ll_tx_enable_pdm(priv->config->ctx->dev, true);
I2S_PDM_TX_SLOT_DEFAULT_CONFIG(tx_slot_cfg.pdm_tx);
i2s_hal_pdm_set_tx_slot(priv->config->ctx,
priv->config->role == I2S_ROLE_SLAVE,
@ -1807,13 +1803,15 @@ static void i2s_set_clock(struct esp_i2s_s *priv)
#ifdef I2S_HAVE_TX
i2s_hal_set_tx_clock(priv->config->ctx,
priv->config->clk_info,
priv->config->tx_clk_src);
priv->config->tx_clk_src,
NULL);
#endif /* I2S_HAVE_TX */
#ifdef I2S_HAVE_RX
i2s_hal_set_rx_clock(priv->config->ctx,
priv->config->clk_info,
priv->config->rx_clk_src);
priv->config->rx_clk_src,
NULL);
#endif /* I2S_HAVE_RX */
}

16
arch/risc-v/src/common/espressif/esp_irq.c
View file

@ -281,7 +281,7 @@ static void esp_cpuint_initialize(void)
/* Set CPU interrupt threshold level */
esprv_intc_int_set_threshold(ESP_DEFAULT_INT_THRESHOLD);
esprv_int_set_threshold(ESP_DEFAULT_INT_THRESHOLD);
/* Indicate that no interrupt sources are assigned to CPU interrupts */
@ -405,7 +405,7 @@ void up_enable_irq(int irq)
irqstate_t irqstate = enter_critical_section();
CPUINT_ENABLE(g_cpuint_map[cpuint]);
esprv_intc_int_enable(BIT(cpuint));
esprv_int_enable(BIT(cpuint));
leave_critical_section(irqstate);
}
@ -437,7 +437,7 @@ void up_disable_irq(int irq)
irqstate_t irqstate = enter_critical_section();
CPUINT_DISABLE(g_cpuint_map[cpuint]);
esprv_intc_int_disable(BIT(cpuint));
esprv_int_disable(BIT(cpuint));
leave_critical_section(irqstate);
}
@ -466,21 +466,21 @@ void esp_route_intr(int source, int cpuint, irq_priority_t priority,
{
/* Ensure the CPU interrupt is disabled */
esprv_intc_int_disable(BIT(cpuint));
esprv_int_disable(BIT(cpuint));
/* Set the interrupt priority */
esprv_intc_int_set_priority(cpuint, priority);
esprv_int_set_priority(cpuint, priority);
/* Set the interrupt trigger type (Edge or Level) */
if (type == ESP_IRQ_TRIGGER_EDGE)
{
esprv_intc_int_set_type(cpuint, INTR_TYPE_EDGE);
esprv_int_set_type(cpuint, INTR_TYPE_EDGE);
}
else
{
esprv_intc_int_set_type(cpuint, INTR_TYPE_LEVEL);
esprv_int_set_type(cpuint, INTR_TYPE_LEVEL);
}
/* Route the interrupt source to the provided CPU interrupt */
@ -632,7 +632,7 @@ IRAM_ATTR void *riscv_dispatch_irq(uintreg_t mcause, uintreg_t *regs)
}
#endif
is_edge = esprv_intc_int_get_type(cpuint) == INTR_TYPE_LEVEL;
is_edge = esprv_int_get_type(cpuint) == INTR_TYPE_LEVEL;
if (is_edge)
{
/* Clear edge interrupts. */

43
arch/risc-v/src/common/espressif/esp_ledc.c
View file

@ -58,8 +58,8 @@
(div) > LEDC_TIMER_DIV_NUM_MAX)
/* Precision degree only affects RC_FAST, other clock sources' frequencies
* are fixed values. For targets that do not support RC_FAST calibration, can
* only use its approximate value.
* are fixed values. For targets that do not support RC_FAST calibration,
* can only use its approximate value.
*/
#if SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
@ -68,6 +68,18 @@
# define LEDC_CLK_SRC_FREQ_PRECISION ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX
#endif
#if !SOC_RCC_IS_INDEPENDENT
#define LEDC_BUS_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define LEDC_BUS_CLOCK_ATOMIC()
#endif
#if SOC_PERIPH_CLK_CTRL_SHARED
#define LEDC_FUNC_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define LEDC_FUNC_CLOCK_ATOMIC()
#endif
/* All chips have 4 internal timers */
#define LEDC_TIMERS (4)
@ -434,6 +446,17 @@ static bool ledc_ctx_create(void)
{
new_ctx = true;
LEDC_BUS_CLOCK_ATOMIC()
{
ledc_ll_enable_bus_clock(true);
ledc_ll_enable_reset_reg(false);
}
LEDC_FUNC_CLOCK_ATOMIC()
{
ledc_ll_enable_clock(LEDC_LL_GET_HW(), true);
}
/* Only ESP32 supports High Speed mode */
ledc_hal_init(&(ledc_new_mode_obj->ledc_hal), LEDC_LOW_SPEED_MODE);
@ -1054,17 +1077,17 @@ static IRAM_ATTR int ledc_duty_config(ledc_channel_t channel,
ledc_hal_set_duty_int_part(&(p_ledc_obj->ledc_hal), channel, duty_val);
}
ledc_hal_set_duty_direction(&(p_ledc_obj->ledc_hal),
channel,
duty_direction);
ledc_hal_set_duty_num(&(p_ledc_obj->ledc_hal), channel, duty_num);
ledc_hal_set_duty_cycle(&(p_ledc_obj->ledc_hal), channel, duty_cycle);
ledc_hal_set_duty_scale(&(p_ledc_obj->ledc_hal), channel, duty_scale);
pwminfo("ledc_duty_config: channel: %d, hpoint_val: %d, duty_val: %d, "
"duty_direction: %d, duty_num: %" PRIu32 ", "
"duty_cycle: %" PRIu32 ", duty_scale: %" PRIu32 "\n",
channel, hpoint_val, duty_val, duty_direction, duty_num,
duty_cycle, duty_scale);
ledc_hal_set_fade_param(&(p_ledc_obj->ledc_hal), channel, 0,
duty_direction, duty_cycle, duty_scale, duty_num);
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
ledc_hal_set_duty_range_wr_addr(&(p_ledc_obj->ledc_hal), channel, 0);
ledc_hal_set_range_number(&(p_ledc_obj->ledc_hal), channel, 1);
ledc_hal_clear_left_off_fade_param(&(p_ledc_obj->ledc_hal), channel, 1);
#endif
return OK;
}

8
arch/risc-v/src/common/espressif/esp_mcpwm.c
View file

@ -1586,9 +1586,11 @@ static void esp_mcpwm_group_start(void)
periph_module_enable(PERIPH_MCPWM0_MODULE);
mcpwm_hal_init(hal, &g_mcpwm_common.group);
mcpwm_ll_group_set_clock_source(hal->dev, MCPWM_DEV_CLK_SOURCE);
mcpwm_ll_group_set_clock_prescale(hal->dev, g_mcpwm_common.group_prescale);
mcpwm_ll_group_enable_clock(hal->dev, true);
mcpwm_ll_group_set_clock_source(g_mcpwm_common.group.group_id,
MCPWM_DEV_CLK_SOURCE);
mcpwm_ll_group_set_clock_prescale(g_mcpwm_common.group.group_id,
g_mcpwm_common.group_prescale);
mcpwm_ll_group_enable_clock(g_mcpwm_common.group.group_id, true);
g_mcpwm_common.initialized = true;
}

4
arch/risc-v/src/common/espressif/esp_oneshot.c
View file

@ -509,9 +509,11 @@ struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution)
/* Configure clock source */
timer_ll_set_clock_source(lower->hal.dev, lower->hal.timer_id,
timer_ll_set_clock_source(ONESHOT_TIMERGROUP_ID, lower->hal.timer_id,
GPTIMER_CLK_SRC_DEFAULT);
timer_ll_enable_clock(ONESHOT_TIMERGROUP_ID, lower->hal.timer_id, true);
/* Calculate the suitable prescaler according to the current APB
* frequency to generate a period of 1 us.
*/

8
arch/risc-v/src/common/espressif/esp_pcnt.c
View file

@ -825,7 +825,7 @@ struct cap_lowerhalf_s *esp_pcnt_new_unit(
return NULL;
}
if (config->low_limit >= 0 && config->low_limit < PCNT_LL_MIN_LIN)
if (config->low_limit >= 0 && config->low_limit < PCNT_LL_MIN_LIM)
{
cperr("Configuration low limit is out of range!\n");
return NULL;
@ -841,8 +841,8 @@ struct cap_lowerhalf_s *esp_pcnt_new_unit(
if (g_pcnt_refs++ == 0)
{
periph_module_enable(pcnt_periph_signals.groups[0].module);
periph_module_reset(pcnt_periph_signals.groups[0].module);
periph_module_enable(PERIPH_PCNT_MODULE);
periph_module_reset(PERIPH_PCNT_MODULE);
pcnt_hal_init(&ctx, 0);
}
@ -971,7 +971,7 @@ int esp_pcnt_del_unit(struct cap_lowerhalf_s *dev)
g_pcnt_refs--;
if (g_pcnt_refs == 0)
{
periph_module_disable(pcnt_periph_signals.groups[0].module);
periph_module_disable(PERIPH_PCNT_MODULE);
esp_teardown_irq(pcnt_periph_signals.groups[0].irq, -ENOMEM);
}

27
arch/risc-v/src/common/espressif/esp_rmt.c
View file

@ -116,6 +116,18 @@
} \
}
#if SOC_PERIPH_CLK_CTRL_SHARED
#define RMT_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define RMT_CLOCK_SRC_ATOMIC()
#endif
#if !SOC_RCC_IS_INDEPENDENT
#define RMT_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define RMT_RCC_ATOMIC()
#endif
#define rmt_item32_t rmt_symbol_word_t
/****************************************************************************
@ -409,8 +421,14 @@ static void rmt_module_enable(void)
if (g_rmtdev_common.rmt_module_enabled == false)
{
periph_module_reset(rmt_periph_signals.groups[0].module);
periph_module_enable(rmt_periph_signals.groups[0].module);
RMT_RCC_ATOMIC()
{
rmt_ll_enable_bus_clock(0, true);
rmt_ll_reset_register(0);
}
periph_module_reset(PERIPH_RMT_MODULE);
periph_module_enable(PERIPH_RMT_MODULE);
g_rmtdev_common.rmt_module_enabled = true;
}
@ -845,6 +863,11 @@ static int rmt_internal_config(rmt_dev_t *dev,
1, 0, 0);
}
RMT_CLOCK_SRC_ATOMIC()
{
rmt_ll_enable_group_clock(dev, true);
}
spin_unlock_irqrestore(&g_rmtdev_common.rmt_spinlock, flags);
#if SOC_RMT_CHANNEL_CLK_INDEPENDENT

4
arch/risc-v/src/common/espressif/esp_rtc.c
View file

@ -41,6 +41,7 @@
#include "esp_hr_timer.h"
#include "esp_rtc.h"
#include "esp_rtc_time.h"
#include "riscv_internal.h"
#include "esp_attr.h"
@ -49,13 +50,10 @@
/* Chip-dependent headers from esp-hal-3rdparty */
#ifdef CONFIG_ESPRESSIF_ESP32C3
#include "esp32c3/rtc.h"
#include "esp32c3/rom/rtc.h"
#elif defined(CONFIG_ESPRESSIF_ESP32C6)
#include "esp32c6/rtc.h"
#include "esp32c6/rom/rtc.h"
#elif defined(CONFIG_ESPRESSIF_ESP32H2)
#include "esp32h2/rtc.h"
#include "esp32h2/rom/rtc.h"
#endif

118
arch/risc-v/src/common/espressif/esp_spi.c
View file

@ -60,6 +60,7 @@
#include "hal/spi_types.h"
#include "hal/spi_hal.h"
#include "esp_clk_tree.h"
#include "esp_clk_tree_common.h"
#include "hal/clk_tree_hal.h"
#include "periph_ctrl.h"
@ -143,6 +144,16 @@
#define SPI_MAX_BUF_SIZE (64)
/* SPI blank array size */
#define SPI_BLANK_ARRAY_SIZE (16)
#if SOC_PERIPH_CLK_CTRL_SHARED
#define SPI_MASTER_PERI_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define SPI_MASTER_PERI_CLOCK_ATOMIC()
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -190,7 +201,6 @@ struct esp_spi_priv_s
uint8_t id; /* ID number of SPI interface */
uint8_t module; /* Module ID of SPI interface */
spi_hal_context_t *ctx; /* Context struct of common layer */
spi_hal_config_t *cfg;
spi_hal_dev_config_t *dev_cfg; /* Device configuration struct of common layer */
spi_hal_timing_param_t *timing_param; /* Timing struct of common layer */
};
@ -253,11 +263,6 @@ static void esp_spi_deinit(struct spi_dev_s *dev);
#ifdef CONFIG_ESPRESSIF_SPI2
static spi_hal_config_t cfg =
{
0
};
static spi_hal_context_t ctx =
{
0
@ -357,7 +362,6 @@ static struct esp_spi_priv_s esp_spi2_priv =
.id = SPI2_HOST,
.module = PERIPH_SPI2_MODULE,
.nbits = 0,
.cfg = &cfg,
.dev_cfg = &dev_cfg,
.ctx = &ctx,
.timing_param = &timing_param,
@ -378,6 +382,10 @@ static struct esp_dmadesc_s dma_txdesc[SPI_DMA_DESC_NUM];
#endif
/* Blank array to fill the send buffer */
static uint32_t blank_arr[SPI_BLANK_ARRAY_SIZE];
/****************************************************************************
* Private Functions
****************************************************************************/
@ -494,29 +502,42 @@ static uint32_t esp_spi_setfrequency(struct spi_dev_s *dev,
uint32_t frequency)
{
struct esp_spi_priv_s *priv = (struct esp_spi_priv_s *)dev;
spi_hal_timing_conf_t temp_timing_conf;
if (priv->timing_param->clk_src_hz == frequency)
if (priv->dev_cfg->timing_conf.real_freq == frequency)
{
/* Requested frequency is the same as the current frequency. */
return priv->timing_param->clk_src_hz;
return priv->dev_cfg->timing_conf.real_freq;
}
priv->timing_param->expected_freq = frequency;
SPI_MASTER_PERI_CLOCK_ATOMIC()
{
spi_ll_set_clk_source(priv->ctx->hw,
priv->dev_cfg->timing_conf.clock_source);
}
esp_clk_tree_enable_src(SPI_CLK_SRC_DEFAULT, true);
esp_clk_tree_src_get_freq_hz(SPI_CLK_SRC_DEFAULT,
ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX,
ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
&priv->timing_param->clk_src_hz);
spi_hal_cal_clock_conf(priv->timing_param,
(int *)&(priv->timing_param->clk_src_hz),
&(priv->dev_cfg->timing_conf));
&temp_timing_conf);
temp_timing_conf.clock_source = SPI_CLK_SRC_DEFAULT;
temp_timing_conf.source_pre_div = 1;
temp_timing_conf.source_real_freq = priv->timing_param->clk_src_hz;
priv->dev_cfg->timing_conf = temp_timing_conf;
spi_hal_setup_device(priv->ctx, priv->dev_cfg);
spiinfo("frequency=%" PRIu32 ", actual=%" PRIu32 "\n",
priv->timing_param->expected_freq, priv->timing_param->clk_src_hz);
spiinfo("frequency=%" PRIu32 ", actual=%d\n",
priv->timing_param->expected_freq,
priv->dev_cfg->timing_conf.real_freq);
return priv->timing_param->clk_src_hz;
return priv->dev_cfg->timing_conf.real_freq;
}
/****************************************************************************
@ -737,6 +758,7 @@ static void esp_spi_dma_exchange(struct esp_spi_priv_s *priv,
static uint32_t esp_spi_poll_send(struct esp_spi_priv_s *priv, uint32_t wd)
{
uint32_t val;
spi_hal_dev_config_t *hal_dev = priv->dev_cfg;
spi_hal_trans_config_t trans =
{
0
@ -752,9 +774,12 @@ static uint32_t esp_spi_poll_send(struct esp_spi_priv_s *priv, uint32_t wd)
trans.line_mode.cmd_lines = 0;
priv->ctx->trans_config = trans;
spi_ll_set_mosi_bitlen(priv->ctx->hw, priv->nbits);
spi_hal_prepare_data(priv->ctx, priv->dev_cfg, &trans);
spi_hal_setup_trans(priv->ctx, priv->dev_cfg, &trans);
spi_hal_push_tx_buffer(priv->ctx, &trans);
spi_hal_enable_data_line(priv->ctx->hw,
(!hal_dev->half_duplex && trans.rcv_buffer) \
|| trans.send_buffer, !!trans.rcv_buffer);
spi_hal_user_start(priv->ctx);
while (!spi_hal_usr_is_done(priv->ctx));
@ -833,29 +858,54 @@ static void esp_spi_poll_exchange(struct esp_spi_priv_s *priv,
uint32_t transfer_size = MIN(SPI_MAX_BUF_SIZE, bytes_remaining);
/* Write data words to data buffer registers.
* SPI peripheral contains 16 registers (W0 - W15).
* SPI peripheral contains 16 registers (W0 - W15)
* allowing up to 64 bytes to be sent or received at one time.
*/
trans.tx_bitlen = transfer_size * 8;
trans.rx_bitlen = transfer_size * 8;
trans.rcv_buffer = (uint8_t *)rp;
trans.send_buffer = (uint8_t *)tp;
priv->ctx->trans_config = trans;
spi_hal_prepare_data(priv->ctx, priv->dev_cfg, &trans);
if (tp == NULL)
{
/* Write 0xffffffff to fill the send buffer */
trans.send_buffer = (uint8_t *)blank_arr;
spiinfo("send %" PRIu32 " bytes value=0x%" PRIx32 "\n",
transfer_size, blank_arr[0]);
}
else
{
trans.send_buffer = (uint8_t *)tp;
spiinfo("send %" PRIu32 " bytes addr=0x%p\n",
transfer_size, tp);
}
spi_hal_setup_trans(priv->ctx, priv->dev_cfg, &trans);
spi_hal_push_tx_buffer(priv->ctx, &trans);
spi_hal_user_start(priv->ctx);
spi_hal_enable_data_line(priv->ctx->hw,
(!priv->timing_param->half_duplex && \
trans.rcv_buffer) || trans.send_buffer,
!!trans.rcv_buffer);
while (!spi_hal_usr_is_done(priv->ctx));
if (rp != NULL)
{
rp += transfer_size;
spi_hal_fetch_result(priv->ctx);
spiinfo("recv %" PRIu32 " bytes addr=0x%p\n",
transfer_size, rp);
rp += transfer_size;
}
if (tp != NULL)
{
tp += transfer_size;
}
bytes_remaining -= transfer_size;
tp += transfer_size;
}
}
@ -1078,30 +1128,25 @@ static void esp_spi_init(struct spi_dev_s *dev)
esp_gpio_matrix_out(config->clk_pin, config->clk_outsig, 0, 0);
#endif
SPI_MASTER_PERI_CLOCK_ATOMIC()
{
spi_ll_enable_clock(priv->id, true);
}
periph_module_enable(priv->module);
#ifdef CONFIG_ESPRESSIF_SPI2_DMA
esp_spi_dma_init(dev);
priv->ctx->hw = SPI_LL_GET_HW(priv->id);
priv->cfg->dma_enabled = true;
priv->cfg->dmadesc_rx = (lldesc_t *)dma_rxdesc;
priv->cfg->dmadesc_tx = (lldesc_t *)dma_txdesc;
priv->cfg->rx_dma_chan = priv->dma_channel;
priv->cfg->tx_dma_chan = priv->dma_channel;
spi_ll_master_init(priv->ctx->hw);
spi_ll_enable_int(priv->ctx->hw);
spi_ll_set_mosi_delay(priv->ctx->hw, 0, 0);
#else
spi_hal_init(priv->ctx, priv->id, priv->cfg);
spi_hal_init(priv->ctx, priv->id);
#endif
priv->dev_cfg->timing_conf.clock_source = SPI_CLK_SRC_DEFAULT;
esp_clk_tree_src_get_freq_hz(priv->dev_cfg->timing_conf.clock_source,
ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX,
&priv->timing_param->clk_src_hz);
esp_spi_setbits(dev, config->width);
esp_spi_setmode(dev, priv->dev_cfg->mode);
esp_spi_setfrequency(dev, priv->timing_param->expected_freq);
@ -1199,6 +1244,13 @@ struct spi_dev_s *esp_spibus_initialize(int port)
return spi_dev;
}
/* Initialize the blank array */
for (int i = 0; i < SPI_BLANK_ARRAY_SIZE; i++)
{
blank_arr[i] = UINT32_MAX;
}
#ifdef CONFIG_ESPRESSIF_SPI2_DMA
if (priv->cpuint != -ENOMEM)
{

2
arch/risc-v/src/common/espressif/esp_spiflash.c
View file

@ -315,7 +315,7 @@ static IRAM_ATTR void esp_spi_trans(uint32_t command,
/* Start transmission */
spi_flash_ll_user_start(dev);
spi_flash_ll_user_start(dev, false);
/* Wait until transmission is done */

50
arch/risc-v/src/common/espressif/esp_start.c
View file

@ -57,6 +57,10 @@
#include "spi_flash_mmap.h"
#include "rom/cache.h"
#ifdef CONFIG_ARCH_CHIP_ESP32H2
#include "soc/rtc.h"
#endif
#include "bootloader_init.h"
#ifdef CONFIG_ESPRESSIF_SIMPLE_BOOT
@ -65,6 +69,8 @@
#include "esp_app_format.h"
#endif
#include "esp_private/startup_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@ -348,7 +354,7 @@ static int map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
ets_printf("total segments stored %d\n", segments - 1);
#endif
cache_hal_disable(CACHE_TYPE_ALL);
cache_hal_disable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
/* Clear the MMU entries that are already set up,
* so the new app only has the mappings it creates.
@ -380,12 +386,42 @@ static int map_rom_segments(uint32_t app_drom_start, uint32_t app_drom_vaddr,
/* ------------------Enable Cache----------------------------------- */
cache_hal_enable(CACHE_TYPE_ALL);
cache_hal_enable(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_ALL);
return (int)rc;
}
#endif
/****************************************************************************
* Name: recalib_bbpll
*
* Description:
* Workaround for bootloader calibration issues. This function is placed in
* IRAM because disabling BBPLL may influence the cache.
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
#ifdef CONFIG_ARCH_CHIP_ESP32H2
static void IRAM_ATTR NOINLINE_ATTR recalib_bbpll(void)
{
rtc_cpu_freq_config_t old_config;
rtc_clk_cpu_freq_get_config(&old_config);
if (old_config.source == SOC_CPU_CLK_SRC_PLL ||
old_config.source == SOC_CPU_CLK_SRC_FLASH_PLL)
{
rtc_clk_cpu_freq_set_xtal();
rtc_clk_cpu_freq_set_config(&old_config);
}
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@ -443,7 +479,7 @@ void __esp_start(void)
#endif /* CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE */
#if CONFIG_ESP_SYSTEM_BBPLL_RECALIB
rtc_clk_recalib_bbpll();
recalib_bbpll();
#endif
#ifdef CONFIG_ESPRESSIF_REGION_PROTECTION
@ -497,11 +533,17 @@ void __esp_start(void)
wdt_hal_disable(&rwdt_ctx);
wdt_hal_write_protect_enable(&rwdt_ctx);
showprogress("C");
/* Initialize onboard resources */
esp_board_initialize();
showprogress("C");
showprogress("D");
SYS_STARTUP_FN();
showprogress("E");
/* Bring up NuttX */

48
arch/risc-v/src/common/espressif/esp_temperature_sensor.c
View file

@ -64,6 +64,7 @@
#include "hal/temperature_sensor_types.h"
#include "soc/temperature_sensor_periph.h"
#include "esp_efuse_rtc_calib.h"
#include "hal/adc_ll.h"
/****************************************************************************
* Pre-processor Definitions
@ -71,6 +72,18 @@
#define ESP_TEMP_MIN_INTERVAL 30000
#if !SOC_RCC_IS_INDEPENDENT
#define TSENS_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define TSENS_RCC_ATOMIC()
#endif
#if !SOC_RCC_IS_INDEPENDENT
#define ADC_BUS_CLK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define ADC_BUS_CLK_ATOMIC()
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -365,8 +378,6 @@ static float temperature_sensor_parse_raw_value(uint32_t tsens_raw,
static void esp_temperature_sensor_enable(struct esp_temp_priv_s *priv)
{
temperature_sensor_ll_clk_enable(true);
temperature_sensor_ll_clk_sel(priv->clk_src);
temperature_sensor_ll_enable(true);
priv->tempstate = TEMP_SENSOR_ENABLE;
}
@ -411,6 +422,7 @@ static void esp_temp_sensor_register(struct esp_temp_priv_s *priv)
register_driver(CONFIG_ESPRESSIF_TEMP_PATH, &g_esp_temp_sensor_fops,
0666, priv);
#else
priv->lower.type = SENSOR_TYPE_TEMPERATURE;
sensor_register(&priv->lower, CONFIG_ESPRESSIF_TEMP_PATH_DEVNO);
#endif /* CONFIG_ESPRESSIF_TEMP_UORB */
}
@ -434,8 +446,28 @@ static int esp_temperature_sensor_install(struct esp_temp_priv_s *priv,
struct esp_temp_sensor_config_t cfg)
{
int ret;
periph_module_enable(priv->module);
periph_module_reset(priv->module);
regi2c_saradc_enable();
ADC_BUS_CLK_ATOMIC()
{
#if !SOC_TSENS_IS_INDEPENDENT_FROM_ADC
adc_ll_enable_bus_clock(true);
# if SOC_RCC_IS_INDEPENDENT
adc_ll_enable_func_clock(true);
# endif
adc_ll_reset_register();
#endif
}
TSENS_RCC_ATOMIC()
{
temperature_sensor_ll_bus_clk_enable(true);
temperature_sensor_ll_reset_module();
}
temperature_sensor_ll_enable(true);
temperature_sensor_ll_clk_sel(priv->clk_src);
ret = temperature_sensor_attribute_table_sort();
if (ret < 0)
@ -453,7 +485,6 @@ static int esp_temperature_sensor_install(struct esp_temp_priv_s *priv,
goto err;
}
regi2c_saradc_enable();
temperature_sensor_ll_set_range(priv->tsens_attribute->reg_val);
esp_temperature_sensor_disable(priv); /* Disable the sensor by default */
@ -482,8 +513,11 @@ err:
static void esp_temperature_sensor_uninstall(struct esp_temp_priv_s *priv)
{
regi2c_saradc_disable();
periph_module_disable(priv->module);
temperature_sensor_ll_enable(false);
TSENS_RCC_ATOMIC()
{
temperature_sensor_ll_bus_clk_enable(false);
}
}
/****************************************************************************

51
arch/risc-v/src/common/espressif/esp_timer.c
View file

@ -49,6 +49,8 @@
* Pre-processor Definitions
****************************************************************************/
#define DEFAULT_TIMER_ID 0
/****************************************************************************
* Private Types
****************************************************************************/
@ -68,6 +70,7 @@ struct esp_timer_lowerhalf_s
void *arg; /* Argument passed to upper half callback */
bool started; /* True: Timer has been started */
void *upper; /* Pointer to timer_upperhalf_s */
int group_id; /* Timer group number */
};
/****************************************************************************
@ -114,7 +117,8 @@ static struct esp_timer_lowerhalf_s g_timer0_lowerhalf =
{
.ops = &g_timer_ops,
.source = TG0_T0_LEVEL_INTR_SOURCE,
.irq = ESP_IRQ_TG0_T0_LEVEL
.irq = ESP_IRQ_TG0_T0_LEVEL,
.group_id = 0
};
/* TIMER1 lower-half */
@ -123,7 +127,8 @@ static struct esp_timer_lowerhalf_s g_timer1_lowerhalf =
{
.ops = &g_timer_ops,
.source = TG1_T0_LEVEL_INTR_SOURCE,
.irq = ESP_IRQ_TG1_T0_LEVEL
.irq = ESP_IRQ_TG1_T0_LEVEL,
.group_id = 1
};
/****************************************************************************
@ -171,9 +176,13 @@ static int esp_timer_start(struct timer_lowerhalf_s *lower)
/* Configure clock source */
timer_ll_set_clock_source(hal->dev, hal->timer_id,
timer_ll_set_clock_source(priv->group_id, hal->timer_id,
GPTIMER_CLK_SRC_DEFAULT);
/* Enable timer group module clock */
timer_ll_enable_clock(priv->group_id, hal->timer_id, true);
/* Calculate the suitable prescaler according to the current APB
* frequency to generate a period of 1 us.
*/
@ -302,8 +311,13 @@ static int esp_timer_getstatus(struct timer_lowerhalf_s *lower,
{
/* TIMER is running */
current_counter_value = timer_hal_capture_and_get_counter_value(hal);
status->flags |= TCFLAGS_ACTIVE;
}
else
{
current_counter_value = 0;
}
if (priv->callback != NULL)
{
@ -314,10 +328,6 @@ static int esp_timer_getstatus(struct timer_lowerhalf_s *lower,
status->flags |= TCFLAGS_HANDLER;
}
/* Get the current counter value */
current_counter_value = timer_hal_capture_and_get_counter_value(hal);
/* Get the current configured timeout */
volatile timg_hwtimer_reg_t *hw_timer =
@ -498,9 +508,13 @@ IRAM_ATTR static int esp_timer_isr(int irq, void *context, void *arg)
*
* Description:
* Initialize a timer device.
* Important: ESP32-C3|C6|H2 each has two timer groups.
* Each group has one timer and one watchdog timer.
* This initialization function is used to initialize the timer 0 of the
* specified group.
*
* Input Parameters:
* timer_id - ID of the hardware timer to be initialized.
* group_id - ID of the hardware timer group to be initialized.
*
* Returned Values:
* Zero (OK) is returned on success; a negated errno value is returned on
@ -508,31 +522,25 @@ IRAM_ATTR static int esp_timer_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int esp_timer_initialize(uint32_t timer_id)
int esp_timer_initialize(int group_id)
{
struct esp_timer_lowerhalf_s *lower = NULL;
char *devpath;
uint32_t group_num;
uint32_t timer_num;
switch (timer_id)
switch (group_id)
{
case 0:
{
periph_module_enable(PERIPH_TIMG0_MODULE);
group_num = 0;
timer_num = 0;
lower = &g_timer0_lowerhalf;
lower->hal.timer_id = DEFAULT_TIMER_ID;
}
break;
case 1:
{
periph_module_enable(PERIPH_TIMG1_MODULE);
group_num = 1;
timer_num = 0;
lower = &g_timer1_lowerhalf;
lower->hal.timer_id = DEFAULT_TIMER_ID;
}
break;
default:
@ -548,13 +556,14 @@ int esp_timer_initialize(uint32_t timer_id)
return -ENOMEM;
}
snprintf(devpath, PATH_MAX, "/dev/timer%" PRIu32, timer_id);
snprintf(devpath, PATH_MAX, "/dev/timer%" PRIu32, lower->hal.timer_id);
/* Initialize the elements of lower half state structure */
lower->callback = NULL;
lower->started = false;
timer_hal_init(&lower->hal, group_num, timer_num);
timer_hal_init(&lower->hal, lower->group_id, lower->hal.timer_id);
/* Register the timer driver as /dev/timerX. If the registration goes
* right the returned value from timer_register is a pointer to
@ -588,5 +597,7 @@ int esp_timer_initialize(uint32_t timer_id)
up_enable_irq(lower->irq);
tmrinfo("init timer group %d, timer_id: %ld\n",
group_id, lower->hal.timer_id);
return OK;
}

2
arch/risc-v/src/common/espressif/esp_timer.h
View file

@ -50,6 +50,6 @@
*
****************************************************************************/
int esp_timer_initialize(uint32_t timer_id);
int esp_timer_initialize(int timer_id);
#endif /* __ARCH_RISCV_SRC_COMMON_ESPRESSIF_ESP_TIMER_H */

50
arch/risc-v/src/common/espressif/esp_twai.c
View file

@ -60,6 +60,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
# if defined(CONFIG_CAN_LOOPBACK) && defined(CONFIG_ESPRESSIF_TWAI_TEST_MODE)
# define TX_PIN_ATTR (OUTPUT_FUNCTION_1 | INPUT_FUNCTION_1)
# define RX_PIN_ATTR (OUTPUT_FUNCTION_1 | INPUT_FUNCTION_1)
@ -112,6 +113,18 @@
# define TWAI0_RX_IDX TWAI_RX_IDX
# endif /* CONFIG_ESPRESSIF_ESP32H2 */
#if !SOC_RCC_IS_INDEPENDENT
#define TWAI_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define TWAI_RCC_ATOMIC()
#endif
#if SOC_PERIPH_CLK_CTRL_SHARED
#define TWAI_PERI_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define TWAI_PERI_ATOMIC()
#endif
/* Configuration ************************************************************/
# ifndef CONFIG_CAN_EXTID
@ -128,7 +141,7 @@
/* Default values written to various registers on initialization */
# define TWAI_DEFAULT_INTERRUPTS 0xe7 /* Exclude data overrun (bit[3]) and brp_div (bit[4]) */
# define DRIVER_DEFAULT_INTERRUPTS 0xe7 /* Exclude data overrun (bit[3]) and brp_div (bit[4]) */
struct esp_twai_dev_s
{
@ -244,26 +257,40 @@ static void esp_twai_reset(struct can_dev_s *dev)
int ret;
twai_hal_config_t hal_config =
{
.clock_source_hz = esp_clk_apb_freq(),
.clock_source_hz = TWAI_CLK_SRC_DEFAULT,
.controller_id = priv->port,
.intr_mask = DRIVER_DEFAULT_INTERRUPTS,
#ifdef CONFIG_CAN_LOOPBACK
.enable_self_test = true,
#else
.enable_self_test = false,
#endif
.enable_listen_only = false,
};
caninfo("TWAI%" PRIu8 "\n", priv->port);
TWAI_RCC_ATOMIC()
{
twai_ll_enable_bus_clock(priv->port, true);
twai_ll_reset_register(priv->port);
}
TWAI_PERI_ATOMIC()
{
twai_ll_set_clock_source(priv->port, TWAI_CLK_SRC_DEFAULT);
twai_ll_enable_clock(priv->port, true);
}
flags = enter_critical_section();
ret = twai_hal_init(&priv->ctx, &hal_config);
ASSERT(ret);
twai_hal_configure(&priv->ctx, &priv->t_config, &f_config,
TWAI_DEFAULT_INTERRUPTS, 0);
twai_hal_configure(&priv->ctx, &priv->t_config, &f_config, 0);
/* Restart the TWAI */
#ifdef CONFIG_CAN_LOOPBACK
twai_hal_start(&priv->ctx, TWAI_MODE_NO_ACK); /* Leave Reset Mode, enter Test Mode */
#else
twai_hal_start(&priv->ctx, TWAI_MODE_NORMAL); /* Leave Reset Mode */
#endif
twai_hal_start(&priv->ctx);
/* Abort transmission, release RX buffer and clear overrun.
* Command register can only be modified when in Operation Mode.
@ -301,7 +328,7 @@ static int esp_twai_setup(struct can_dev_s *dev)
flags = enter_critical_section();
twai_ll_set_enabled_intrs(priv->ctx.dev, TWAI_DEFAULT_INTERRUPTS);
twai_ll_set_enabled_intrs(priv->ctx.dev, DRIVER_DEFAULT_INTERRUPTS);
twai_ll_get_and_clear_intrs(priv->ctx.dev); /* clear latched interrupts */
@ -743,7 +770,8 @@ static int esp_twai_interrupt(int irq, void *context, void *arg)
/* Release the receive buffer */
twai_ll_set_cmd_release_rx_buffer(priv->ctx.dev);
twai_ll_parse_frame_buffer(&rx_frame, &id, &dlc, data, &flags);
twai_ll_parse_frame_buffer(&rx_frame, &id, &dlc, data,
TWAI_FRAME_MAX_LEN, &flags);
hdr.ch_id = id;
hdr.ch_dlc = dlc;
hdr.ch_rtr = (flags && TWAI_MSG_FLAG_RTR) ? 1 : 0;

17
arch/risc-v/src/common/espressif/esp_usbserial.c
View file

@ -48,6 +48,7 @@
#include "esp_config.h"
#include "esp_irq.h"
#include "esp_private/periph_ctrl.h"
#include "hal/uart_hal.h"
#include "hal/usb_serial_jtag_ll.h"
@ -55,6 +56,12 @@
* Pre-processor Macros
****************************************************************************/
#if !SOC_RCC_IS_INDEPENDENT
#define USJ_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define USJ_RCC_ATOMIC()
#endif
/* The hardware buffer has a fixed size of 64 bytes */
#define ESP_USBCDC_BUFFERSIZE 64
@ -277,6 +284,15 @@ static int esp_attach(struct uart_dev_s *dev)
DEBUGASSERT(priv->cpuint == -ENOMEM);
USJ_RCC_ATOMIC()
{
usb_serial_jtag_ll_enable_bus_clock(true);
}
usb_serial_jtag_ll_phy_set_defaults();
usb_serial_jtag_ll_ena_intr_mask(USB_SERIAL_JTAG_INTR_SERIAL_OUT_RECV_PKT);
/* Try to attach the IRQ to a CPU int */
priv->cpuint = esp_setup_irq(priv->source,
@ -465,4 +481,3 @@ void esp_usbserial_write(char ch)
esp_send(&g_uart_usbserial, ch);
}

474
arch/risc-v/src/common/espressif/esp_wifi_utils.c
View file

@ -34,6 +34,7 @@
#include <nuttx/kmalloc.h>
#include <nuttx/wireless/wireless.h>
#include <nuttx/spinlock.h>
#ifdef CONFIG_ESPRESSIF_WIFI
#include "esp_wifi_adapter.h"
@ -51,6 +52,7 @@
#include "esp_err.h"
#include "esp_wifi_utils.h"
#include "esp_wifi_types_generic.h"
/****************************************************************************
* Pre-processor Definitions
@ -73,6 +75,18 @@
#define CHANNEL_MAX_NUM (14)
/* CONFIG_POWER_SAVE_MODEM */
#if defined(CONFIG_ESP_POWER_SAVE_MIN_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MIN_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_MAX_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MAX_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_NONE)
# define DEFAULT_PS_MODE WIFI_PS_NONE
#else
# define DEFAULT_PS_MODE WIFI_PS_NONE
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -94,6 +108,24 @@ struct wifi_scan_result
unsigned int scan_result_size; /* Current size of temp buffer */
};
/****************************************************************************
* Public Data
****************************************************************************/
/* Wi-Fi interface configuration */
#ifdef ESP_WLAN_HAS_STA
extern wifi_config_t g_sta_wifi_cfg;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
extern wifi_config_t g_softap_wifi_cfg;
#endif /* ESP_WLAN_HAS_SOFTAP */
/****************************************************************************
* Private Data
****************************************************************************/
@ -105,6 +137,12 @@ static struct wifi_scan_result g_scan_priv =
static uint8_t g_channel_num;
static uint8_t g_channel_list[CHANNEL_MAX_NUM];
static struct wifi_notify g_wifi_notify[WIFI_ADPT_EVT_MAX];
static struct work_s g_wifi_evt_work;
static sq_queue_t g_wifi_evt_queue;
static mutex_t g_wifiexcl_lock = NXMUTEX_INITIALIZER;
static spinlock_t g_lock;
/****************************************************************************
* Public Functions
****************************************************************************/
@ -660,3 +698,439 @@ int32_t esp_wifi_to_errno(int err)
return ret;
}
/****************************************************************************
* Name: esp_event_id_map
*
* Description:
* Transform from esp-idf event ID to Wi-Fi adapter event ID
*
* Input Parameters:
* event_id - esp-idf event ID
*
* Returned Value:
* Wi-Fi adapter event ID
*
****************************************************************************/
int esp_event_id_map(int event_id)
{
int id;
switch (event_id)
{
case WIFI_EVENT_SCAN_DONE:
id = WIFI_ADPT_EVT_SCAN_DONE;
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_EVENT_STA_START:
id = WIFI_ADPT_EVT_STA_START;
break;
case WIFI_EVENT_STA_CONNECTED:
id = WIFI_ADPT_EVT_STA_CONNECT;
break;
case WIFI_EVENT_STA_DISCONNECTED:
id = WIFI_ADPT_EVT_STA_DISCONNECT;
break;
case WIFI_EVENT_STA_AUTHMODE_CHANGE:
id = WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE;
break;
case WIFI_EVENT_STA_STOP:
id = WIFI_ADPT_EVT_STA_STOP;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_EVENT_AP_START:
id = WIFI_ADPT_EVT_AP_START;
break;
case WIFI_EVENT_AP_STOP:
id = WIFI_ADPT_EVT_AP_STOP;
break;
case WIFI_EVENT_AP_STACONNECTED:
id = WIFI_ADPT_EVT_AP_STACONNECTED;
break;
case WIFI_EVENT_AP_STADISCONNECTED:
id = WIFI_ADPT_EVT_AP_STADISCONNECTED;
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
return -1;
}
return id;
}
/****************************************************************************
* Name: esp_wifi_lock
*
* Description:
* Lock or unlock the event process
*
* Input Parameters:
* lock - true: Lock event process, false: unlock event process
*
* Returned Value:
* The result of lock or unlock the event process
*
****************************************************************************/
int esp_wifi_lock(bool lock)
{
int ret;
if (lock)
{
ret = nxmutex_lock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to lock Wi-Fi ret=%d\n", ret);
}
}
else
{
ret = nxmutex_unlock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to unlock Wi-Fi ret=%d\n", ret);
}
}
return ret;
}
/****************************************************************************
* Name: esp_evt_work_cb
*
* Description:
* Process the cached event
*
* Input Parameters:
* arg - No mean
*
* Returned Value:
* None
*
****************************************************************************/
void esp_evt_work_cb(void *arg)
{
int ret;
irqstate_t flags;
struct evt_adpt *evt_adpt;
struct wifi_notify *notify;
wifi_ps_type_t ps_type = DEFAULT_PS_MODE;
while (1)
{
flags = spin_lock_irqsave(&g_lock);
evt_adpt = (struct evt_adpt *)sq_remfirst(&g_wifi_evt_queue);
spin_unlock_irqrestore(&g_lock, flags);
if (!evt_adpt)
{
break;
}
/* Some of the following logic (eg. esp_wlan_sta_set_linkstatus)
* can take net_lock(). To maintain the consistent locking order,
* we take net_lock() here before taking esp_wifi_lock. Note that
* net_lock() is a recursive lock.
*/
net_lock();
esp_wifi_lock(true);
switch (evt_adpt->id)
{
case WIFI_ADPT_EVT_SCAN_DONE:
#ifdef CONFIG_ESPRESSIF_WIFI
esp_wifi_scan_event_parse();
#endif
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_ADPT_EVT_STA_START:
wlinfo("Wi-Fi sta start\n");
g_sta_connected = false;
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_STA, &g_sta_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_STA_CONNECT:
wlinfo("Wi-Fi sta connect\n");
g_sta_connected = true;
ret = esp_wlan_sta_set_linkstatus(true);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
break;
case WIFI_ADPT_EVT_STA_DISCONNECT:
wlinfo("Wi-Fi sta disconnect\n");
g_sta_connected = false;
ret = esp_wlan_sta_set_linkstatus(false);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
if (g_sta_reconnect)
{
ret = esp_wifi_connect();
if (ret)
{
wlerr("Failed to connect AP error=%d\n", ret);
}
}
break;
case WIFI_ADPT_EVT_STA_STOP:
wlinfo("Wi-Fi sta stop\n");
g_sta_connected = false;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_ADPT_EVT_AP_START:
wlinfo("INFO: Wi-Fi softap start\n");
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_AP, &g_softap_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_AP_STOP:
wlinfo("INFO: Wi-Fi softap stop\n");
break;
case WIFI_ADPT_EVT_AP_STACONNECTED:
wlinfo("INFO: Wi-Fi station join\n");
break;
case WIFI_ADPT_EVT_AP_STADISCONNECTED:
wlinfo("INFO: Wi-Fi station leave\n");
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
break;
}
notify = &g_wifi_notify[evt_adpt->id];
if (notify->assigned)
{
notify->event.sigev_value.sival_ptr = evt_adpt->buf;
ret = nxsig_notification(notify->pid, &notify->event,
SI_QUEUE, &notify->work);
if (ret < 0)
{
wlwarn("nxsig_notification event ID=%ld failed: %d\n",
evt_adpt->id, ret);
}
}
esp_wifi_lock(false);
net_unlock();
kmm_free(evt_adpt);
}
}
/****************************************************************************
* Name: esp_event_post
*
* Description:
* Posts an event to the event loop system. The event is queued in a FIFO
* and processed asynchronously in the low-priority work queue.
*
* Input Parameters:
* event_base - Identifier for the event category (e.g. WIFI_EVENT)
* event_id - Event ID within the event base category
* event_data - Pointer to event data structure
* event_data_size - Size of event data structure
* ticks - Number of ticks to wait (currently unused)
*
* Returned Value:
* 0 on success
* -1 on failure with following error conditions:
* - Invalid event ID
* - Memory allocation failure
*
* Assumptions/Limitations:
* - Event data is copied into a new buffer, so the original can be freed
* - Events are processed in FIFO order in the low priority work queue
* - The function is thread-safe and can be called from interrupt context
*
****************************************************************************/
int esp_event_post(const char *event_base,
int32_t event_id,
void *event_data,
size_t event_data_size,
uint32_t ticks)
{
size_t size;
int32_t id;
irqstate_t flags;
struct evt_adpt *evt_adpt;
wlinfo("Event: base=%s id=%ld data=%p data_size=%u ticks=%lu\n",
event_base, event_id, event_data, event_data_size, ticks);
id = esp_event_id_map(event_id);
if (id < 0)
{
wlerr("ERROR: No process event %ld\n", event_id);
return -1;
}
size = event_data_size + sizeof(struct evt_adpt);
evt_adpt = kmm_malloc(size);
if (!evt_adpt)
{
wlerr("ERROR: Failed to alloc %d memory\n", size);
return -1;
}
evt_adpt->id = id;
memcpy(evt_adpt->buf, event_data, event_data_size);
flags = enter_critical_section();
sq_addlast(&evt_adpt->entry, &g_wifi_evt_queue);
leave_critical_section(flags);
work_queue(LPWORK, &g_wifi_evt_work, esp_evt_work_cb, NULL, 0);
return 0;
}
/****************************************************************************
* Name: esp_wifi_notify_subscribe
*
* Description:
* Enable event notification
*
* Input Parameters:
* pid - Task PID
* event - Signal event data pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event)
{
int id;
struct wifi_notify *notify;
int ret = -1;
wlinfo("PID=%d event=%p\n", pid, event);
esp_wifi_lock(true);
if (event->sigev_notify == SIGEV_SIGNAL)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (notify->assigned)
{
wlerr("sigev_signo %d has subscribed\n",
event->sigev_signo);
}
else
{
if (pid == 0)
{
pid = nxsched_gettid();
wlinfo("Actual PID=%d\n", pid);
}
notify->pid = pid;
notify->event = *event;
notify->assigned = true;
ret = 0;
}
}
}
else if (event->sigev_notify == SIGEV_NONE)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (!notify->assigned)
{
wlerr("sigev_signo %d has not subscribed\n",
event->sigev_signo);
}
else
{
notify->assigned = false;
ret = 0;
}
}
}
else
{
wlerr("sigev_notify %d is invalid\n", event->sigev_signo);
}
esp_wifi_lock(false);
return ret;
}

135
arch/risc-v/src/common/espressif/esp_wifi_utils.h
View file

@ -29,6 +29,7 @@
#include <nuttx/config.h>
#include <nuttx/net/netdev.h>
#include <nuttx/signal.h>
#ifndef __ASSEMBLY__
@ -43,6 +44,42 @@ extern "C"
#define EXTERN extern
#endif
/* Wi-Fi event ID */
enum wifi_adpt_evt_e
{
WIFI_ADPT_EVT_SCAN_DONE = 0,
WIFI_ADPT_EVT_STA_START,
WIFI_ADPT_EVT_STA_CONNECT,
WIFI_ADPT_EVT_STA_DISCONNECT,
WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE,
WIFI_ADPT_EVT_STA_STOP,
WIFI_ADPT_EVT_AP_START,
WIFI_ADPT_EVT_AP_STOP,
WIFI_ADPT_EVT_AP_STACONNECTED,
WIFI_ADPT_EVT_AP_STADISCONNECTED,
WIFI_ADPT_EVT_MAX,
};
/* Wi-Fi event private data */
struct evt_adpt
{
sq_entry_t entry; /* Sequence entry */
int32_t id; /* Event ID */
uint8_t buf[0]; /* Event private data */
};
/* Wi-Fi event notification private data */
struct wifi_notify
{
bool assigned; /* Flag indicate if it is used */
pid_t pid; /* Signal's target thread PID */
struct sigevent event; /* Signal event private data */
struct sigwork_s work; /* Signal work private data */
};
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
@ -117,6 +154,104 @@ void esp_wifi_scan_event_parse(void);
int32_t esp_wifi_to_errno(int err);
/****************************************************************************
* Name: esp_event_id_map
*
* Description:
* Transform from esp-idf event ID to Wi-Fi adapter event ID
*
* Input Parameters:
* event_id - esp-idf event ID
*
* Returned Value:
* Wi-Fi adapter event ID
*
****************************************************************************/
int esp_event_id_map(int event_id);
/****************************************************************************
* Name: esp_wifi_lock
*
* Description:
* Lock or unlock the event process
*
* Input Parameters:
* lock - true: Lock event process, false: unlock event process
*
* Returned Value:
* The result of lock or unlock the event process
*
****************************************************************************/
int esp_wifi_lock(bool lock);
/****************************************************************************
* Name: esp_evt_work_cb
*
* Description:
* Process the cached event
*
* Input Parameters:
* arg - No mean
*
* Returned Value:
* None
*
****************************************************************************/
void esp_evt_work_cb(void *arg);
/****************************************************************************
* Name: esp_event_post
*
* Description:
* Posts an event to the event loop system. The event is queued in a FIFO
* and processed asynchronously in the low-priority work queue.
*
* Input Parameters:
* event_base - Identifier for the event category (e.g. WIFI_EVENT)
* event_id - Event ID within the event base category
* event_data - Pointer to event data structure
* event_data_size - Size of event data structure
* ticks - Number of ticks to wait (currently unused)
*
* Returned Value:
* 0 on success
* -1 on failure with following error conditions:
* - Invalid event ID
* - Memory allocation failure
*
* Assumptions/Limitations:
* - Event data is copied into a new buffer, so the original can be freed
* - Events are processed in FIFO order in the low priority work queue
* - The function is thread-safe and can be called from interrupt context
*
****************************************************************************/
int esp_event_post(const char *event_base,
int32_t event_id,
void *event_data,
size_t event_data_size,
uint32_t ticks);
/****************************************************************************
* Name: esp_wifi_notify_subscribe
*
* Description:
* Enable event notification
*
* Input Parameters:
* pid - Task PID
* event - Signal event data pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event);
#ifdef __cplusplus
}
#endif

40
arch/risc-v/src/common/espressif/esp_wlan.c
View file

@ -150,6 +150,42 @@ struct wlan_priv_s
spinlock_t lock;
};
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef ESP_WLAN_HAS_STA
/* If reconnect automatically */
volatile bool g_sta_reconnect;
/* If Wi-Fi sta starts */
volatile bool g_sta_started;
/* If Wi-Fi sta connected */
volatile bool g_sta_connected;
/* Wi-Fi interface configuration */
wifi_config_t g_sta_wifi_cfg;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
/* If Wi-Fi SoftAP starts */
volatile bool g_softap_started;
/* Wi-Fi interface configuration */
wifi_config_t g_softap_wifi_cfg;
#endif /* ESP_WLAN_HAS_SOFTAP */
/****************************************************************************
* Private Data
****************************************************************************/
@ -1694,8 +1730,8 @@ int esp_wlan_softap_initialize(void)
* ifidx - The interface id that the tx callback has been triggered from
* data - Pointer to the data transmitted
* data_len - Length of the data transmitted
* txstatus - True:if the data was transmitted successfully False: if data
* transmission failed
* txstatus - True: if the data was transmitted successfully
* False: if data transmission failed
*
* Returned Value:
* None

32
arch/risc-v/src/common/espressif/esp_wlan.h
View file

@ -62,6 +62,34 @@ extern "C"
#define MAC_LEN (6)
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef ESP_WLAN_HAS_STA
/* If reconnect automatically */
extern volatile bool g_sta_reconnect;
/* If Wi-Fi sta starts */
extern volatile bool g_sta_started;
/* If Wi-Fi sta connected */
extern volatile bool g_sta_connected;
#endif
#ifdef ESP_WLAN_HAS_SOFTAP
/* If Wi-Fi SoftAP starts */
extern volatile bool g_softap_started;
#endif
#ifdef CONFIG_ESPRESSIF_WIFI
/****************************************************************************
@ -156,8 +184,8 @@ int esp_wlan_softap_initialize(void);
* ifidx - The interface id that the tx callback has been triggered from
* data - Pointer to the data transmitted
* data_len - Length of the data transmitted
* txstatus - True:if the data was transmitted successfully False: if data
* transmission failed
* txstatus - True: if the data was transmitted successfully
* False: if data transmission failed
*
* Returned Value:
* none

136
arch/risc-v/src/esp32c3/esp_ble_adapter.c
View file

@ -64,9 +64,11 @@
#include "esp_private/wifi.h"
#include "esp_random.h"
#include "esp_timer.h"
#include "esp_hr_timer.h"
#include "periph_ctrl.h"
#include "rom/ets_sys.h"
#include "soc/soc_caps.h"
#include "soc/rtc.h"
#include "esp_hr_timer.h"
#include "esp_attr.h"
@ -103,7 +105,7 @@
#define BTDM_LPCLK_SEL_8M (3)
#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
#define OSI_VERSION 0x00010009
#define OSI_VERSION 0x0001000a
#define OSI_MAGIC_VALUE 0xfadebead
#ifdef CONFIG_ESPRESSIF_SPIFLASH
@ -235,6 +237,8 @@ struct osi_funcs_s
void (* _btdm_rom_table_ready)(void);
bool (* _coex_bt_wakeup_request)(void);
void (* _coex_bt_wakeup_request_end)(void);
int64_t (*_get_time_us)(void);
void (* _assert)(void);
};
/* BLE message queue private data */
@ -402,6 +406,8 @@ static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr,
static void btdm_funcs_table_ready_wrapper(void);
static bool coex_bt_wakeup_request(void);
static void coex_bt_wakeup_request_end(void);
static int64_t get_time_us_wrapper(void);
static void assert_wrapper(void);
/****************************************************************************
* Other functions
@ -506,6 +512,24 @@ extern bool spi_flash_cache_enabled(void);
extern void btdm_cca_feature_enable(void);
#if (CONFIG_BT_BLUEDROID_ENABLED || CONFIG_BT_NIMBLE_ENABLED)
extern void scan_stack_enable_adv_flow_ctrl_vs_cmd(bool en);
extern void adv_stack_enable_clear_legacy_adv_vs_cmd(bool en);
extern void adv_filter_stack_enable_dup_exc_list_vs_cmd(bool en);
extern void chan_sel_stack_enable_set_csa_vs_cmd(bool en);
#endif
extern void ble_dtm_funcs_reset(void);
extern void ble_scan_funcs_reset(void);
extern void ble_42_adv_funcs_reset(void);
extern void ble_init_funcs_reset(void);
extern void ble_con_funcs_reset(void);
extern void ble_cca_funcs_reset(void);
extern void ble_ext_adv_funcs_reset(void);
extern void ble_ext_scan_funcs_reset(void);
extern void ble_base_funcs_reset(void);
extern void ble_enc_funcs_reset(void);
extern uint8_t _bt_bss_start[];
extern uint8_t _bt_bss_end[];
extern uint8_t _bt_controller_bss_start[];
@ -584,6 +608,8 @@ static struct osi_funcs_s g_osi_funcs =
._btdm_rom_table_ready = btdm_funcs_table_ready_wrapper,
._coex_bt_wakeup_request = coex_bt_wakeup_request,
._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
._get_time_us = get_time_us_wrapper,
._assert = assert_wrapper,
};
static DRAM_ATTR struct osi_funcs_s *g_osi_funcs_p;
@ -749,7 +775,7 @@ static int interrupt_alloc_wrapper(int cpu_id,
void **ret_handle)
{
btdm_isr_alloc_t *p;
intr_handle_data_t *handle;
struct intr_handle_data_t *handle;
vector_desc_t *vd;
int ret = OK;
int cpuint;
@ -764,7 +790,7 @@ static int interrupt_alloc_wrapper(int cpu_id,
return ESP_ERR_NOT_FOUND;
}
handle = kmm_calloc(1, sizeof(intr_handle_data_t));
handle = kmm_calloc(1, sizeof(struct intr_handle_data_t));
if (handle == NULL)
{
free(p);
@ -2866,6 +2892,51 @@ static void btdm_funcs_table_ready_wrapper(void)
{
#if BT_BLE_CCA_MODE == 2
btdm_cca_feature_enable();
#endif
#if BLE_CTRL_CHECK_CONNECT_IND_ACCESS_ADDRESS_ENABLED
btdm_aa_check_enhance_enable();
#endif
#if CONFIG_BT_CTRL_RUN_IN_FLASH_ONLY
/* Do nothing */
#else
wlinfo("Feature Config, ADV:%d, BLE_50:%d, DTM:%d, SCAN:%d, CCA:%d, "
"SMP:%d, CONNECT:%d", BT_CTRL_BLE_ADV, BT_CTRL_50_FEATURE_SUPPORT,
BT_CTRL_DTM_ENABLE, BT_CTRL_BLE_SCAN, BT_BLE_CCA_MODE,
BLE_SECURITY_ENABLE, BT_CTRL_BLE_MASTER);
ble_base_funcs_reset();
# if CONFIG_BT_CTRL_BLE_ADV
ble_42_adv_funcs_reset();
# if (BT_CTRL_50_FEATURE_SUPPORT == 1)
ble_ext_adv_funcs_reset();
# endif
# endif
# if CONFIG_BT_CTRL_DTM_ENABLE
ble_dtm_funcs_reset();
# endif
# if CONFIG_BT_CTRL_BLE_SCAN
ble_scan_funcs_reset();
# if (BT_CTRL_50_FEATURE_SUPPORT == 1)
ble_ext_scan_funcs_reset();
# endif
# endif
# if (BT_BLE_CCA_MODE != 0)
ble_cca_funcs_reset();
# endif
# if CONFIG_BT_CTRL_BLE_SECURITY_ENABLE
ble_enc_funcs_reset();
# endif
# if CONFIG_BT_CTRL_BLE_MASTER
ble_init_funcs_reset();
ble_con_funcs_reset();
# endif
#endif
}
@ -2954,6 +3025,46 @@ static void coex_bt_wakeup_request_end(void)
return;
}
/****************************************************************************
* Name: get_time_us_wrapper
*
* Description:
* Wrapper function to get the current system time in microseconds. This
* function is placed in IRAM for faster execution and calls the underlying
* esp_hr_timer_time_us() function.
*
* Input Parameters:
* None
*
* Returned Value:
* The current system time in microseconds as a 64-bit integer
*
****************************************************************************/
static IRAM_ATTR int64_t get_time_us_wrapper(void)
{
return (int64_t)esp_hr_timer_time_us();
}
/****************************************************************************
* Name: assert_wrapper
*
* Description:
* Empty wrapper function for assertions. This function is placed in IRAM
* for faster execution. Currently implemented as a no-op function.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
static IRAM_ATTR void assert_wrapper(void)
{
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -3082,12 +3193,22 @@ int esp_bt_controller_init(void)
periph_module_enable(PERIPH_BT_MODULE);
periph_module_reset(PERIPH_BT_MODULE);
if (btdm_controller_init(cfg) != 0)
err = btdm_controller_init(cfg);
if (err != OK)
{
wlerr("%s %d\n", __func__, err);
err = -ENOMEM;
goto error;
}
#if (CONFIG_BT_BLUEDROID_ENABLED || CONFIG_BT_NIMBLE_ENABLED)
scan_stack_enable_adv_flow_ctrl_vs_cmd(true);
adv_stack_enable_clear_legacy_adv_vs_cmd(true);
adv_filter_stack_enable_dup_exc_list_vs_cmd(true);
chan_sel_stack_enable_set_csa_vs_cmd(true);
#endif
g_btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
#ifdef CONFIG_ESPRESSIF_SPIFLASH
@ -3127,6 +3248,13 @@ int esp_bt_controller_deinit(void)
return ERROR;
}
#if (CONFIG_BT_BLUEDROID_ENABLED || CONFIG_BT_NIMBLE_ENABLED)
scan_stack_enable_adv_flow_ctrl_vs_cmd(false);
adv_stack_enable_clear_legacy_adv_vs_cmd(false);
adv_filter_stack_enable_dup_exc_list_vs_cmd(false);
chan_sel_stack_enable_set_csa_vs_cmd(false);
#endif
btdm_controller_deinit();
bt_controller_deinit_internal();

478
arch/risc-v/src/esp32c3/esp_wifi_adapter.c
View file

@ -109,41 +109,12 @@
#define ets_timer _ETSTIMER_
/* CONFIG_POWER_SAVE_MODEM */
#if defined(CONFIG_ESP_POWER_SAVE_MIN_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MIN_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_MAX_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MAX_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_NONE)
# define DEFAULT_PS_MODE WIFI_PS_NONE
#else
# define DEFAULT_PS_MODE WIFI_PS_NONE
#endif
#define ESP_MAX_PRIORITIES (25)
/****************************************************************************
* Private Types
****************************************************************************/
/* Wi-Fi event ID */
enum wifi_adpt_evt_e
{
WIFI_ADPT_EVT_SCAN_DONE = 0,
WIFI_ADPT_EVT_STA_START,
WIFI_ADPT_EVT_STA_CONNECT,
WIFI_ADPT_EVT_STA_DISCONNECT,
WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE,
WIFI_ADPT_EVT_STA_STOP,
WIFI_ADPT_EVT_AP_START,
WIFI_ADPT_EVT_AP_STOP,
WIFI_ADPT_EVT_AP_STACONNECTED,
WIFI_ADPT_EVT_AP_STADISCONNECTED,
WIFI_ADPT_EVT_MAX,
};
/* Wi-Fi Station state */
enum wifi_sta_state
@ -180,25 +151,6 @@ struct time_adpt
suseconds_t usec; /* Micro second value */
};
/* Wi-Fi event private data */
struct evt_adpt
{
sq_entry_t entry; /* Sequence entry */
int32_t id; /* Event ID */
uint8_t buf[0]; /* Event private data */
};
/* Wi-Fi event notification private data */
struct wifi_notify
{
bool assigned; /* Flag indicate if it is used */
pid_t pid; /* Signal's target thread PID */
struct sigevent event; /* Signal event private data */
struct sigwork_s work; /* Signal work private data */
};
/* Wi-Fi NVS private data */
struct nvs_adpt
@ -340,8 +292,6 @@ static void esp_empty_wrapper(void);
* of functions or software adapters for the Wi-Fi driver
*/
static int esp_event_id_map(int event_id);
static void esp_evt_work_cb(void *arg);
static int esp_freq_to_channel(uint16_t freq);
static uint32_t esp_get_free_heap_size(void);
static void *event_group_create_wrapper(void);
@ -375,7 +325,6 @@ static void esp_nvs_close(uint32_t handle);
static void esp_update_time(struct timespec *timespec, uint32_t ticks);
static int esp_wifi_auth_trans(uint32_t wifi_auth);
static int esp_wifi_cipher_trans(uint32_t wifi_cipher);
static int esp_wifi_lock(bool lock);
static uint32_t queue_msg_waiting_wrapper(void *queue);
static void task_delay_wrapper(uint32_t tick);
static void task_delete_wrapper(void *task_handle);
@ -400,10 +349,7 @@ extern void wifi_apb80m_release(void);
/* Wi-Fi event private data */
static struct work_s g_wifi_evt_work;
static sq_queue_t g_wifi_evt_queue;
static struct wifi_notify g_wifi_notify[WIFI_ADPT_EVT_MAX];
static mutex_t g_wifiexcl_lock = NXMUTEX_INITIALIZER;
/* Wi-Fi adapter reference */
@ -411,33 +357,17 @@ static int g_wifi_ref;
#ifdef ESP_WLAN_HAS_STA
/* If reconnect automatically */
static bool g_sta_reconnect;
/* If Wi-Fi sta starts */
static bool g_sta_started;
/* If Wi-Fi sta connected */
static bool g_sta_connected;
/* Wi-Fi interface configuration */
static wifi_config_t g_sta_wifi_cfg;
extern wifi_config_t g_sta_wifi_cfg;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
/* If Wi-Fi SoftAP starts */
static bool g_softap_started;
/* Wi-Fi interface configuration */
static wifi_config_t g_softap_wifi_cfg;
extern wifi_config_t g_softap_wifi_cfg;
#endif /* ESP_WLAN_HAS_SOFTAP */
@ -1492,39 +1422,11 @@ int32_t esp_event_post_wrapper(const char *event_base,
size_t event_data_size,
uint32_t ticks)
{
size_t size;
int32_t id;
irqstate_t flags;
struct evt_adpt *evt_adpt;
wlinfo("Event: base=%s id=%ld data=%p data_size=%d ticks=%lu\n",
event_base, event_id, event_data, event_data_size, ticks);
id = esp_event_id_map(event_id);
if (id < 0)
{
wlinfo("No process event %ld\n", event_id);
return -1;
}
size = event_data_size + sizeof(struct evt_adpt);
evt_adpt = kmm_malloc(size);
if (!evt_adpt)
{
wlerr("Failed to alloc %d memory\n", size);
return -1;
}
evt_adpt->id = id;
memcpy(evt_adpt->buf, event_data, event_data_size);
flags = spin_lock_irqsave(&g_lock);
sq_addlast(&evt_adpt->entry, &g_wifi_evt_queue);
spin_unlock_irqrestore(&g_lock, flags);
work_queue(LPWORK, &g_wifi_evt_work, esp_evt_work_cb, NULL, 0);
return 0;
return (int32_t)esp_event_post(event_base,
event_id,
event_data,
event_data_size,
ticks);
}
/****************************************************************************
@ -2473,243 +2375,6 @@ static void IRAM_ATTR esp_empty_wrapper(void)
* of functions or software adapters for the Wi-Fi driver
*/
/****************************************************************************
* Name: esp_event_id_map
*
* Description:
* Transform from esp-idf event ID to Wi-Fi adapter event ID
*
* Input Parameters:
* event_id - esp-idf event ID
*
* Returned Value:
* Wi-Fi adapter event ID
*
****************************************************************************/
static int esp_event_id_map(int event_id)
{
int id;
switch (event_id)
{
case WIFI_EVENT_SCAN_DONE:
id = WIFI_ADPT_EVT_SCAN_DONE;
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_EVENT_STA_START:
id = WIFI_ADPT_EVT_STA_START;
break;
case WIFI_EVENT_STA_CONNECTED:
id = WIFI_ADPT_EVT_STA_CONNECT;
break;
case WIFI_EVENT_STA_DISCONNECTED:
id = WIFI_ADPT_EVT_STA_DISCONNECT;
break;
case WIFI_EVENT_STA_AUTHMODE_CHANGE:
id = WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE;
break;
case WIFI_EVENT_STA_STOP:
id = WIFI_ADPT_EVT_STA_STOP;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_EVENT_AP_START:
id = WIFI_ADPT_EVT_AP_START;
break;
case WIFI_EVENT_AP_STOP:
id = WIFI_ADPT_EVT_AP_STOP;
break;
case WIFI_EVENT_AP_STACONNECTED:
id = WIFI_ADPT_EVT_AP_STACONNECTED;
break;
case WIFI_EVENT_AP_STADISCONNECTED:
id = WIFI_ADPT_EVT_AP_STADISCONNECTED;
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
return -1;
}
return id;
}
/****************************************************************************
* Name: esp_evt_work_cb
*
* Description:
* Process the cached event
*
* Input Parameters:
* arg - No mean
*
* Returned Value:
* None
*
****************************************************************************/
static void esp_evt_work_cb(void *arg)
{
int ret;
irqstate_t flags;
struct evt_adpt *evt_adpt;
struct wifi_notify *notify;
wifi_ps_type_t ps_type = DEFAULT_PS_MODE;
while (1)
{
flags = spin_lock_irqsave(&g_lock);
evt_adpt = (struct evt_adpt *)sq_remfirst(&g_wifi_evt_queue);
spin_unlock_irqrestore(&g_lock, flags);
if (!evt_adpt)
{
break;
}
/* Some of the following logic (eg. esp_wlan_sta_set_linkstatus)
* can take net_lock(). To maintain the consistent locking order,
* we take net_lock() here before taking esp_wifi_lock. Note that
* net_lock() is a recursive lock.
*/
net_lock();
esp_wifi_lock(true);
switch (evt_adpt->id)
{
case WIFI_ADPT_EVT_SCAN_DONE:
esp_wifi_scan_event_parse();
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_ADPT_EVT_STA_START:
wlinfo("Wi-Fi sta start\n");
g_sta_connected = false;
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_STA, &g_sta_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_STA_CONNECT:
wlinfo("Wi-Fi sta connect\n");
g_sta_connected = true;
ret = esp_wlan_sta_set_linkstatus(true);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
break;
case WIFI_ADPT_EVT_STA_DISCONNECT:
wlinfo("Wi-Fi sta disconnect\n");
g_sta_connected = false;
ret = esp_wlan_sta_set_linkstatus(false);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
if (g_sta_reconnect)
{
ret = esp_wifi_connect();
if (ret)
{
wlerr("Failed to connect AP error=%d\n", ret);
}
}
break;
case WIFI_ADPT_EVT_STA_STOP:
wlinfo("Wi-Fi sta stop\n");
g_sta_connected = false;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_ADPT_EVT_AP_START:
wlinfo("INFO: Wi-Fi softap start\n");
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_AP, &g_softap_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_AP_STOP:
wlinfo("INFO: Wi-Fi softap stop\n");
break;
case WIFI_ADPT_EVT_AP_STACONNECTED:
wlinfo("INFO: Wi-Fi station join\n");
break;
case WIFI_ADPT_EVT_AP_STADISCONNECTED:
wlinfo("INFO: Wi-Fi station leave\n");
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
break;
}
notify = &g_wifi_notify[evt_adpt->id];
if (notify->assigned)
{
notify->event.sigev_value.sival_ptr = evt_adpt->buf;
ret = nxsig_notification(notify->pid, &notify->event,
SI_QUEUE, &notify->work);
if (ret < 0)
{
wlwarn("nxsig_notification event ID=%ld failed: %d\n",
evt_adpt->id, ret);
}
}
esp_wifi_lock(false);
net_unlock();
kmm_free(evt_adpt);
}
}
/****************************************************************************
* Name: esp_freq_to_channel
*
@ -3264,44 +2929,6 @@ static int esp_wifi_cipher_trans(uint32_t wifi_cipher)
#endif /* ESP_WLAN_HAS_STA */
/****************************************************************************
* Name: esp_wifi_lock
*
* Description:
* Lock or unlock the event process
*
* Input Parameters:
* lock - true: Lock event process, false: unlock event process
*
* Returned Value:
* The result of lock or unlock the event process
*
****************************************************************************/
static int esp_wifi_lock(bool lock)
{
int ret;
if (lock)
{
ret = nxmutex_lock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to lock Wi-Fi ret=%d\n", ret);
}
}
else
{
ret = nxmutex_unlock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to unlock Wi-Fi ret=%d\n", ret);
}
}
return ret;
}
/****************************************************************************
* Name: queue_msg_waiting_wrapper
*
@ -3663,97 +3290,6 @@ IRAM_ATTR void *wifi_calloc(size_t n, size_t size)
return calloc(n, size);
}
/****************************************************************************
* Name: esp_wifi_notify_subscribe
*
* Description:
* Enable event notification
*
* Input Parameters:
* pid - Task PID
* event - Signal event data pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event)
{
int id;
struct wifi_notify *notify;
int ret = -1;
wlinfo("PID=%d event=%p\n", pid, event);
esp_wifi_lock(true);
if (event->sigev_notify == SIGEV_SIGNAL)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (notify->assigned)
{
wlerr("sigev_signo %d has subscribed\n",
event->sigev_signo);
}
else
{
if (pid == 0)
{
pid = nxsched_gettid();
wlinfo("Actual PID=%d\n", pid);
}
notify->pid = pid;
notify->event = *event;
notify->assigned = true;
ret = 0;
}
}
}
else if (event->sigev_notify == SIGEV_NONE)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (!notify->assigned)
{
wlerr("sigev_signo %d has not subscribed\n",
event->sigev_signo);
}
else
{
notify->assigned = false;
ret = 0;
}
}
}
else
{
wlerr("sigev_notify %d is invalid\n", event->sigev_signo);
}
esp_wifi_lock(false);
return ret;
}
/****************************************************************************
* Name: esp_wifi_adapter_init
*

1
arch/risc-v/src/esp32c3/esp_wireless.h
View file

@ -52,7 +52,6 @@
* headers
*/
#define CONFIG_MAC_BB_PD (0)
#define MAC_LEN (6)
/****************************************************************************

42
arch/risc-v/src/esp32c3/hal_esp32c3.mk
View file

@ -23,7 +23,9 @@
# Include header paths
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
@ -41,14 +43,18 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
@ -60,9 +66,13 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)priv_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
@ -75,12 +85,17 @@ endif
# Linker scripts
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.bt_funcs.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco3_bt_funcs.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco3.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
# Source files
@ -106,6 +121,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)adc2_init_cal.c
@ -118,12 +134,14 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)phy_init_data.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
@ -131,13 +149,12 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gdma_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gpio_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)systimer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
@ -145,8 +162,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_sja1000.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
@ -155,9 +171,15 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)xt_wdt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_intc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
@ -186,8 +208,8 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_uart.c

478
arch/risc-v/src/esp32c6/esp_wifi_adapter.c
View file

@ -111,41 +111,12 @@
#define ets_timer _ETSTIMER_
/* CONFIG_POWER_SAVE_MODEM */
#if defined(CONFIG_ESP_POWER_SAVE_MIN_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MIN_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_MAX_MODEM)
# define DEFAULT_PS_MODE WIFI_PS_MAX_MODEM
#elif defined(CONFIG_ESP_POWER_SAVE_NONE)
# define DEFAULT_PS_MODE WIFI_PS_NONE
#else
# define DEFAULT_PS_MODE WIFI_PS_NONE
#endif
#define ESP_MAX_PRIORITIES (25)
/****************************************************************************
* Private Types
****************************************************************************/
/* Wi-Fi event ID */
enum wifi_adpt_evt_e
{
WIFI_ADPT_EVT_SCAN_DONE = 0,
WIFI_ADPT_EVT_STA_START,
WIFI_ADPT_EVT_STA_CONNECT,
WIFI_ADPT_EVT_STA_DISCONNECT,
WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE,
WIFI_ADPT_EVT_STA_STOP,
WIFI_ADPT_EVT_AP_START,
WIFI_ADPT_EVT_AP_STOP,
WIFI_ADPT_EVT_AP_STACONNECTED,
WIFI_ADPT_EVT_AP_STADISCONNECTED,
WIFI_ADPT_EVT_MAX,
};
/* Wi-Fi Station state */
enum wifi_sta_state
@ -182,25 +153,6 @@ struct time_adpt
suseconds_t usec; /* Micro second value */
};
/* Wi-Fi event private data */
struct evt_adpt
{
sq_entry_t entry; /* Sequence entry */
int32_t id; /* Event ID */
uint8_t buf[0]; /* Event private data */
};
/* Wi-Fi event notification private data */
struct wifi_notify
{
bool assigned; /* Flag indicate if it is used */
pid_t pid; /* Signal's target thread PID */
struct sigevent event; /* Signal event private data */
struct sigwork_s work; /* Signal work private data */
};
/* Wi-Fi NVS private data */
struct nvs_adpt
@ -340,8 +292,6 @@ static void esp_empty_wrapper(void);
* of functions or software adapters for the Wi-Fi driver
*/
static int esp_event_id_map(int event_id);
static void esp_evt_work_cb(void *arg);
static int esp_freq_to_channel(uint16_t freq);
static uint32_t esp_get_free_heap_size(void);
static void *event_group_create_wrapper(void);
@ -375,7 +325,6 @@ static void esp_nvs_close(uint32_t handle);
static void esp_update_time(struct timespec *timespec, uint32_t ticks);
static int esp_wifi_auth_trans(uint32_t wifi_auth);
static int esp_wifi_cipher_trans(uint32_t wifi_cipher);
static int esp_wifi_lock(bool lock);
static uint32_t queue_msg_waiting_wrapper(void *queue);
static void task_delay_wrapper(uint32_t tick);
static void task_delete_wrapper(void *task_handle);
@ -400,10 +349,7 @@ extern void wifi_apb80m_release(void);
/* Wi-Fi event private data */
static struct work_s g_wifi_evt_work;
static sq_queue_t g_wifi_evt_queue;
static struct wifi_notify g_wifi_notify[WIFI_ADPT_EVT_MAX];
static mutex_t g_wifiexcl_lock = NXMUTEX_INITIALIZER;
/* Wi-Fi adapter reference */
@ -411,33 +357,17 @@ static int g_wifi_ref;
#ifdef ESP_WLAN_HAS_STA
/* If reconnect automatically */
static bool g_sta_reconnect;
/* If Wi-Fi sta starts */
static bool g_sta_started;
/* If Wi-Fi sta connected */
static bool g_sta_connected;
/* Wi-Fi interface configuration */
static wifi_config_t g_sta_wifi_cfg;
extern wifi_config_t g_sta_wifi_cfg;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
/* If Wi-Fi SoftAP starts */
static bool g_softap_started;
/* Wi-Fi interface configuration */
static wifi_config_t g_softap_wifi_cfg;
extern wifi_config_t g_softap_wifi_cfg;
#endif /* ESP_WLAN_HAS_SOFTAP */
@ -1492,39 +1422,11 @@ int32_t esp_event_post_wrapper(const char *event_base,
size_t event_data_size,
uint32_t ticks)
{
size_t size;
int32_t id;
irqstate_t flags;
struct evt_adpt *evt_adpt;
wlinfo("Event: base=%s id=%ld data=%p data_size=%d ticks=%lu\n",
event_base, event_id, event_data, event_data_size, ticks);
id = esp_event_id_map(event_id);
if (id < 0)
{
wlinfo("No process event %ld\n", event_id);
return -1;
}
size = event_data_size + sizeof(struct evt_adpt);
evt_adpt = kmm_malloc(size);
if (!evt_adpt)
{
wlerr("Failed to alloc %d memory\n", size);
return -1;
}
evt_adpt->id = id;
memcpy(evt_adpt->buf, event_data, event_data_size);
flags = spin_lock_irqsave(&g_lock);
sq_addlast(&evt_adpt->entry, &g_wifi_evt_queue);
spin_unlock_irqrestore(&g_lock, flags);
work_queue(LPWORK, &g_wifi_evt_work, esp_evt_work_cb, NULL, 0);
return 0;
return (int32_t)esp_event_post(event_base,
event_id,
event_data,
event_data_size,
ticks);
}
/****************************************************************************
@ -2427,243 +2329,6 @@ static void IRAM_ATTR esp_empty_wrapper(void)
* of functions or software adapters for the Wi-Fi driver
*/
/****************************************************************************
* Name: esp_event_id_map
*
* Description:
* Transform from esp-idf event ID to Wi-Fi adapter event ID
*
* Input Parameters:
* event_id - esp-idf event ID
*
* Returned Value:
* Wi-Fi adapter event ID
*
****************************************************************************/
static int esp_event_id_map(int event_id)
{
int id;
switch (event_id)
{
case WIFI_EVENT_SCAN_DONE:
id = WIFI_ADPT_EVT_SCAN_DONE;
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_EVENT_STA_START:
id = WIFI_ADPT_EVT_STA_START;
break;
case WIFI_EVENT_STA_CONNECTED:
id = WIFI_ADPT_EVT_STA_CONNECT;
break;
case WIFI_EVENT_STA_DISCONNECTED:
id = WIFI_ADPT_EVT_STA_DISCONNECT;
break;
case WIFI_EVENT_STA_AUTHMODE_CHANGE:
id = WIFI_ADPT_EVT_STA_AUTHMODE_CHANGE;
break;
case WIFI_EVENT_STA_STOP:
id = WIFI_ADPT_EVT_STA_STOP;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_EVENT_AP_START:
id = WIFI_ADPT_EVT_AP_START;
break;
case WIFI_EVENT_AP_STOP:
id = WIFI_ADPT_EVT_AP_STOP;
break;
case WIFI_EVENT_AP_STACONNECTED:
id = WIFI_ADPT_EVT_AP_STACONNECTED;
break;
case WIFI_EVENT_AP_STADISCONNECTED:
id = WIFI_ADPT_EVT_AP_STADISCONNECTED;
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
return -1;
}
return id;
}
/****************************************************************************
* Name: esp_evt_work_cb
*
* Description:
* Process the cached event
*
* Input Parameters:
* arg - No mean
*
* Returned Value:
* None
*
****************************************************************************/
static void esp_evt_work_cb(void *arg)
{
int ret;
irqstate_t flags;
struct evt_adpt *evt_adpt;
struct wifi_notify *notify;
wifi_ps_type_t ps_type = DEFAULT_PS_MODE;
while (1)
{
flags = spin_lock_irqsave(&g_lock);
evt_adpt = (struct evt_adpt *)sq_remfirst(&g_wifi_evt_queue);
spin_unlock_irqrestore(&g_lock, flags);
if (!evt_adpt)
{
break;
}
/* Some of the following logic (eg. esp_wlan_sta_set_linkstatus)
* can take net_lock(). To maintain the consistent locking order,
* we take net_lock() here before taking esp_wifi_lock. Note that
* net_lock() is a recursive lock.
*/
net_lock();
esp_wifi_lock(true);
switch (evt_adpt->id)
{
case WIFI_ADPT_EVT_SCAN_DONE:
esp_wifi_scan_event_parse();
break;
#ifdef ESP_WLAN_HAS_STA
case WIFI_ADPT_EVT_STA_START:
wlinfo("Wi-Fi sta start\n");
g_sta_connected = false;
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_STA, &g_sta_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_STA_CONNECT:
wlinfo("Wi-Fi sta connect\n");
g_sta_connected = true;
ret = esp_wlan_sta_set_linkstatus(true);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
break;
case WIFI_ADPT_EVT_STA_DISCONNECT:
wlinfo("Wi-Fi sta disconnect\n");
g_sta_connected = false;
ret = esp_wlan_sta_set_linkstatus(false);
if (ret < 0)
{
wlerr("ERROR: Failed to set Wi-Fi station link status\n");
}
if (g_sta_reconnect)
{
ret = esp_wifi_connect();
if (ret)
{
wlerr("Failed to connect AP error=%d\n", ret);
}
}
break;
case WIFI_ADPT_EVT_STA_STOP:
wlinfo("Wi-Fi sta stop\n");
g_sta_connected = false;
break;
#endif /* ESP_WLAN_HAS_STA */
#ifdef ESP_WLAN_HAS_SOFTAP
case WIFI_ADPT_EVT_AP_START:
wlinfo("INFO: Wi-Fi softap start\n");
ret = esp_wifi_set_ps(ps_type);
if (ret)
{
wlerr("Failed to set power save type\n");
break;
}
else
{
wlinfo("INFO: Set ps type=%d\n", ps_type);
}
ret = esp_wifi_get_config(WIFI_IF_AP, &g_softap_wifi_cfg);
if (ret)
{
wlerr("Failed to get Wi-Fi config data ret=%d\n", ret);
}
break;
case WIFI_ADPT_EVT_AP_STOP:
wlinfo("INFO: Wi-Fi softap stop\n");
break;
case WIFI_ADPT_EVT_AP_STACONNECTED:
wlinfo("INFO: Wi-Fi station join\n");
break;
case WIFI_ADPT_EVT_AP_STADISCONNECTED:
wlinfo("INFO: Wi-Fi station leave\n");
break;
#endif /* ESP_WLAN_HAS_SOFTAP */
default:
break;
}
notify = &g_wifi_notify[evt_adpt->id];
if (notify->assigned)
{
notify->event.sigev_value.sival_ptr = evt_adpt->buf;
ret = nxsig_notification(notify->pid, &notify->event,
SI_QUEUE, &notify->work);
if (ret < 0)
{
wlwarn("nxsig_notification event ID=%ld failed: %d\n",
evt_adpt->id, ret);
}
}
esp_wifi_lock(false);
net_unlock();
kmm_free(evt_adpt);
}
}
/****************************************************************************
* Name: esp_freq_to_channel
*
@ -3218,44 +2883,6 @@ static int esp_wifi_cipher_trans(uint32_t wifi_cipher)
#endif /* ESP_WLAN_HAS_STA */
/****************************************************************************
* Name: esp_wifi_lock
*
* Description:
* Lock or unlock the event process
*
* Input Parameters:
* lock - true: Lock event process, false: unlock event process
*
* Returned Value:
* The result of lock or unlock the event process
*
****************************************************************************/
static int esp_wifi_lock(bool lock)
{
int ret;
if (lock)
{
ret = nxmutex_lock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to lock Wi-Fi ret=%d\n", ret);
}
}
else
{
ret = nxmutex_unlock(&g_wifiexcl_lock);
if (ret < 0)
{
wlinfo("Failed to unlock Wi-Fi ret=%d\n", ret);
}
}
return ret;
}
/****************************************************************************
* Name: queue_msg_waiting_wrapper
*
@ -3617,97 +3244,6 @@ IRAM_ATTR void *wifi_calloc(size_t n, size_t size)
return calloc(n, size);
}
/****************************************************************************
* Name: esp_wifi_notify_subscribe
*
* Description:
* Enable event notification
*
* Input Parameters:
* pid - Task PID
* event - Signal event data pointer
*
* Returned Value:
* 0 if success or -1 if fail
*
****************************************************************************/
int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event)
{
int id;
struct wifi_notify *notify;
int ret = -1;
wlinfo("PID=%d event=%p\n", pid, event);
esp_wifi_lock(true);
if (event->sigev_notify == SIGEV_SIGNAL)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (notify->assigned)
{
wlerr("sigev_signo %d has subscribed\n",
event->sigev_signo);
}
else
{
if (pid == 0)
{
pid = nxsched_gettid();
wlinfo("Actual PID=%d\n", pid);
}
notify->pid = pid;
notify->event = *event;
notify->assigned = true;
ret = 0;
}
}
}
else if (event->sigev_notify == SIGEV_NONE)
{
id = esp_event_id_map(event->sigev_signo);
if (id < 0)
{
wlerr("No process event %d\n", event->sigev_signo);
}
else
{
notify = &g_wifi_notify[id];
if (!notify->assigned)
{
wlerr("sigev_signo %d has not subscribed\n",
event->sigev_signo);
}
else
{
notify->assigned = false;
ret = 0;
}
}
}
else
{
wlerr("sigev_notify %d is invalid\n", event->sigev_signo);
}
esp_wifi_lock(false);
return ret;
}
/****************************************************************************
* Name: esp_wifi_adapter_init
*

48
arch/risc-v/src/esp32c6/hal_esp32c6.mk
View file

@ -23,7 +23,9 @@
# Include header paths
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
@ -41,14 +43,18 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
@ -60,9 +66,13 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)newlib$(DELIM)priv_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
@ -77,6 +87,8 @@ endif
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.coexist.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.net80211.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
@ -85,6 +97,7 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.spiflash.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.wdt.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
# Source files
@ -111,7 +124,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)modem_clock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
@ -124,22 +137,24 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)phy_init_data.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_hp_regi2c_$(CHIP_SERIES).c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)apm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gdma_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gpio_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)lp_timer_hal.c
@ -151,23 +166,29 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_sja1000.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mcpwm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)systimer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_slave_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_slave_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)modem_clock_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_plic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
@ -182,6 +203,9 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)gpio.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_gpio$(DELIM)src$(DELIM)rtc_io.c
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
@ -198,8 +222,8 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_uart.c

53
arch/risc-v/src/esp32h2/hal_esp32h2.mk
View file

@ -23,6 +23,7 @@
# Include header paths
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
@ -38,12 +39,20 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)tuning_scheme_impl$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)ld
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
@ -55,9 +64,11 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)spi_flash
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)driver$(DELIM)twai$(DELIM)include
@ -72,12 +83,16 @@ endif
# Linker scripts
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.spiflash.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.systimer.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.wdt.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
# Source files
@ -94,6 +109,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
@ -103,6 +119,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)modem_clock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
@ -113,34 +130,37 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_regi2c_$(CHIP_SERIES).c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)apm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gdma_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)gpio_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)ledc_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)lp_timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)pcnt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2c_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2s_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mpu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mcpwm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)rmt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)sdm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_sja1000.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
@ -149,9 +169,16 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)modem_clock_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_plic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
@ -183,15 +210,13 @@ ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_uart.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)twai_hal_iram.c
LDFLAGS += --wrap=bootloader_print_banner
endif

4
boards/risc-v/esp32c3/common/scripts/esp32c3_aliases.ld
View file

@ -35,5 +35,9 @@ cache_invalidate_icache_all = Cache_Invalidate_ICache_All;
api_vhci_host_check_send_available = API_vhci_host_check_send_available;
api_vhci_host_send_packet = API_vhci_host_send_packet;
api_vhci_host_register_callback = API_vhci_host_register_callback;
scan_stack_enable_adv_flow_ctrl_vs_cmd = scan_stack_enableAdvFlowCtrlVsCmd;
adv_stack_enable_clear_legacy_adv_vs_cmd = adv_stack_enableClearLegacyAdvVsCmd;
adv_filter_stack_enable_dup_exc_list_vs_cmd = advFilter_stack_enableDupExcListVsCmd;
chan_sel_stack_enable_set_csa_vs_cmd = chanSel_stack_enableSetCsaVsCmd;
#endif

49
boards/risc-v/esp32c3/common/scripts/esp32c3_sections.ld
View file

@ -179,9 +179,17 @@ SECTIONS
*libarch.a:*esp_efuse_api_key.*(.text .text.* .literal .literal.*)
*libarch.a:*esp_efuse_utility.*(.text .text.* .literal .literal.*)
*libarch.a:*efuse_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*log.*(.text .text.* .literal .literal.*)
*libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
*libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
*libarch.a:*apm_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*log.*(.text .text.* .literal .literal.*)
*libarch.a:*log_lock.*(.literal .literal.* .text .text.*)
*libarch.a:*log_print.*(.literal .literal.* .text .text.*)
*libarch.a:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
*libarch.a:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
*libarch.a:*log_timestamp_common.*(.literal .literal.* .text .text.*)
*libarch.a:*log_write.*(.literal.esp_log_write .text.esp_log_write)
*libarch.a:*log_write.*(.literal.esp_log_writev .text.esp_log_writev)
*libarch.a:*interrupt_intc.*(.literal .literal.* .text .text.*)
*libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
@ -447,15 +455,6 @@ SECTIONS
* .init_array section instead.
*/
_sinit = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
@ -474,7 +473,35 @@ SECTIONS
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
_sinit = ABSOLUTE(.);
. = ALIGN(4);
__init_priority_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
__init_priority_array_end = ABSOLUTE(.);
. = ALIGN(4);
__init_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
__init_array_end = ABSOLUTE(.);
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
. = ALIGN(4);
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
/* System init functions registered via ESP_SYSTEM_INIT_FN */
. = ALIGN(4);
_esp_system_init_fn_array_start = ABSOLUTE(.);
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
_esp_system_init_fn_array_end = ABSOLUTE(.);
_einit = ABSOLUTE(.);
} >default_rodata_seg AT > ROM
.flash.rodata_noload (NOLOAD) :

49
boards/risc-v/esp32c6/common/scripts/esp32c6_sections.ld
View file

@ -186,9 +186,17 @@ SECTIONS
*libarch.a:*esp_efuse_api_key.*(.text .text.* .literal .literal.*)
*libarch.a:*esp_efuse_utility.*(.text .text.* .literal .literal.*)
*libarch.a:*efuse_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*log.*(.text .text.* .literal .literal.*)
*libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
*libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
*libarch.a:*apm_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*log.*(.text .text.* .literal .literal.*)
*libarch.a:*log_lock.*(.literal .literal.* .text .text.*)
*libarch.a:*log_print.*(.literal .literal.* .text .text.*)
*libarch.a:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
*libarch.a:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
*libarch.a:*log_timestamp_common.*(.literal .literal.* .text .text.*)
*libarch.a:*log_write.*(.literal.esp_log_write .text.esp_log_write)
*libarch.a:*log_write.*(.literal.esp_log_writev .text.esp_log_writev)
*libarch.a:*interrupt_plic.*(.literal .literal.* .text .text.*)
*libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
@ -456,15 +464,6 @@ SECTIONS
* .init_array section instead.
*/
_sinit = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
@ -483,7 +482,35 @@ SECTIONS
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
_sinit = ABSOLUTE(.);
. = ALIGN(4);
__init_priority_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
__init_priority_array_end = ABSOLUTE(.);
. = ALIGN(4);
__init_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
__init_array_end = ABSOLUTE(.);
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
. = ALIGN(4);
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
/* System init functions registered via ESP_SYSTEM_INIT_FN */
. = ALIGN(4);
_esp_system_init_fn_array_start = ABSOLUTE(.);
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
_esp_system_init_fn_array_end = ABSOLUTE(.);
_einit = ABSOLUTE(.);
} >default_rodata_seg AT > ROM
.flash.rodata_noload (NOLOAD) :

49
boards/risc-v/esp32h2/common/scripts/esp32h2_sections.ld
View file

@ -188,9 +188,17 @@ SECTIONS
*libarch.a:*esp_efuse_api_key.*(.text .text.* .literal .literal.*)
*libarch.a:*esp_efuse_utility.*(.text .text.* .literal .literal.*)
*libarch.a:*efuse_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*apm_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*log.*(.text .text.* .literal .literal.*)
*libarch.a:*log_noos.*(.text .text.* .literal .literal.*)
*libarch.a:*log_lock.*(.literal .literal.* .text .text.*)
*libarch.a:*log_print.*(.literal .literal.* .text .text.*)
*libarch.a:*log_timestamp.*(.literal.esp_log_early_timestamp .text.esp_log_early_timestamp)
*libarch.a:*log_timestamp.*(.literal.esp_log_timestamp .text.esp_log_timestamp)
*libarch.a:*log_timestamp_common.*(.literal .literal.* .text .text.*)
*libarch.a:*log_write.*(.literal.esp_log_write .text.esp_log_write)
*libarch.a:*log_write.*(.literal.esp_log_writev .text.esp_log_writev)
*libarch.a:esp_spiflash.*(.literal .text .literal.* .text.*)
*libarch.a:*interrupt_plic.*(.literal .literal.* .text .text.*)
*libc.a:sq_remlast.*(.literal .text .literal.* .text.*)
@ -330,8 +338,6 @@ SECTIONS
*libarch.a:*esp_efuse_api_key.*(.rodata .rodata.*)
*libarch.a:*esp_efuse_utility.*(.rodata .rodata.*)
*libarch.a:*efuse_hal.*(.rodata .rodata.*)
*libarch.a:*log.*(.rodata .rodata.*)
*libarch.a:*log_noos.*(.rodata .rodata.*)
*libarch.a:esp_spiflash.*(.rodata .rodata.*)
esp_head.*(.rodata .rodata.*)
@ -457,15 +463,6 @@ SECTIONS
* .init_array section instead.
*/
_sinit = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
_einit = ABSOLUTE(.);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
@ -484,7 +481,35 @@ SECTIONS
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
_sinit = ABSOLUTE(.);
. = ALIGN(4);
__init_priority_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
__init_priority_array_end = ABSOLUTE(.);
. = ALIGN(4);
__init_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
__init_array_end = ABSOLUTE(.);
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
. = ALIGN(4);
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
/* System init functions registered via ESP_SYSTEM_INIT_FN */
. = ALIGN(4);
_esp_system_init_fn_array_start = ABSOLUTE(.);
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
_esp_system_init_fn_array_end = ABSOLUTE(.);
_einit = ABSOLUTE(.);
} >default_rodata_seg AT > ROM
.flash.rodata_noload (NOLOAD) :

2
tools/espressif/Config.mk
View file

@ -163,6 +163,6 @@ define FLASH
fi
$(eval ESPTOOL_OPTS := -c $(CHIP_SERIES) -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) $(if $(CONFIG_ESPRESSIF_ESPTOOLPY_NO_STUB),--no-stub))
$(eval WRITEFLASH_OPTS := $(if $(CONFIG_ESPRESSIF_MERGE_BINS),0x0 nuttx.merged.bin,$(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS)))
$(eval WRITEFLASH_OPTS := $(if $(CONFIG_ESPRESSIF_MERGE_BINS),$(ESPTOOL_WRITEFLASH_OPTS) 0x0 nuttx.merged.bin,$(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS)))
esptool.py $(ESPTOOL_OPTS) write_flash $(WRITEFLASH_OPTS)
endef