arch/arm: Switch the context of save and restore from assembler to c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
Petro Karashchenko
parent
de1c184e6c
commit
ebf1093cff
58 changed files with 164 additions and 1362 deletions
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@ -41,9 +41,8 @@ endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
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CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
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CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S vfork.S
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CMN_ASRCS += arm_fpuconfig.S arm_testset.S arm_fetchadd.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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@ -53,14 +52,12 @@ CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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CMN_CSRCS = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
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CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
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CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
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CMN_CSRCS += arm_modifyreg32.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
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CMN_CSRCS += arm_modifyreg32.c arm_assert.c arm_blocktask.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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CMN_CSRCS += arm_switchcontext.c arm_cache.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
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CMN_CSRCS += arm_cache.c arm_tcbinfo.c
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# Use common heap allocation for now (may need to be customized later)
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@ -41,9 +41,8 @@ endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
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CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_testset.S vfork.S
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CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_fpuconfig.S arm_testset.S vfork.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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@ -54,13 +53,12 @@ CMN_CSRCS = arm_initialize.c arm_idle.c arm_interruptcontext.c arm_exit.c
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CMN_CSRCS += arm_createstack.c arm_releasestack.c arm_usestack.c arm_vfork.c
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CMN_CSRCS += arm_puts.c arm_mdelay.c arm_stackframe.c arm_udelay.c
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CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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CMN_CSRCS += arm_switchcontext.c arm_cache.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
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CMN_CSRCS += arm_sigdeliver.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
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CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
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CMN_CSRCS += arm_cache.c arm_tcbinfo.c
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# Use common heap allocation for now (may need to be customized later)
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@ -1,76 +0,0 @@
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/****************************************************************************
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* arch/arm/src/arm/arm_fullcontextrestore.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/syscall.h>
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#include "arm.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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.file "arm_fullcontextrestore.S"
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/****************************************************************************
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* Macros
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_fullcontextrestore
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*
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* Description:
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* Restore the current thread context. Full prototype is:
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*
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* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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.globl arm_fullcontextrestore
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.type arm_fullcontextrestore, function
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arm_fullcontextrestore:
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/* Perform the System call with R0=1 and R1=regs */
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mov r1, r0 /* R1: regs */
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mov r0, #SYS_restore_context /* R0: restore context */
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svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
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/* This call should not return */
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bx lr /* Unnecessary ... will not return */
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.size arm_fullcontextrestore, .-arm_fullcontextrestore
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.end
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@ -1,100 +0,0 @@
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/****************************************************************************
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* arch/arm/src/arm/arm_saveusercontext.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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.file "arm_saveusercontext.S"
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/****************************************************************************
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* Macros
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_saveusercontext
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*
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* Description:
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* Save the current thread context. Full prototype is:
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*
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* int up_saveusercontext(void *saveregs);
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*
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* Returned Value:
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* 0: Normal return
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* 1: Context switch return
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*
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****************************************************************************/
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.globl up_saveusercontext
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.type up_saveusercontext, function
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up_saveusercontext:
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/* On entry, a1 (r0) holds address of struct xcptcontext */
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/* Make sure that the return value will be non-zero (the value of the
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* other volatile registers don't matter -- r1-r3, ip). This function
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* is called through the normal C calling conventions and the values of
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* these registers cannot be assumed at the point of setjmp return.
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*/
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mov ip, #1
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str ip, [r0, #(4*REG_R0)]
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/* Save the volatile registers (plus r12 which really
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* doesn't need to be saved)
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*/
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add r1, r0, #(4*REG_R4)
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stmia r1, {r4-r14}
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/* Save the current cpsr */
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mrs r2, cpsr /* R2 = CPSR value */
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add r1, r0, #(4*REG_CPSR)
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str r2, [r1]
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/* Save the return address as the PC so that we return to the exit from
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* this function.
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*/
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add r1, r0, #(4*REG_PC)
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str lr, [r1]
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/* Return 0 now indicating that this return is not a context switch */
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mov r0, #0 /* Return value == 0 */
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bx lr /* Return */
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.size up_saveusercontext, .-up_saveusercontext
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.end
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@ -1,79 +0,0 @@
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/****************************************************************************
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* arch/arm/src/armv6-m/arm_fullcontextrestore.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/syscall.h>
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#include "nvic.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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.file "arm_fullcontextrestore.S"
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/****************************************************************************
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* Macros
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_fullcontextrestore
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*
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* Description:
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* Restore the current thread context. Full prototype is:
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*
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* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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.align 2
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.code 16
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.thumb_func
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.globl arm_fullcontextrestore
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.type arm_fullcontextrestore, function
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arm_fullcontextrestore:
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/* Perform the System call with R0=1 and R1=regs */
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mov r1, r0 /* R1: regs */
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mov r0, #SYS_restore_context /* R0: restore context */
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svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
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/* This call should not return */
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bx lr /* Unnecessary ... will not return */
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.size arm_fullcontextrestore, .-arm_fullcontextrestore
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.end
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@ -1,89 +0,0 @@
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/****************************************************************************
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* arch/arm/src/armv6-m/arm_saveusercontext.S
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
|
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* contributor license agreements. See the NOTICE file distributed with
|
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/syscall.h>
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#include "nvic.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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.file "arm_saveusercontext.S"
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/****************************************************************************
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* Macros
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_saveusercontext
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*
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* Description:
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* Save the current thread context. Full prototype is:
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*
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* int up_saveusercontext(void *saveregs);
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*
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* Returned Value:
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* 0: Normal return
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* 1: Context switch return
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*
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****************************************************************************/
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.text
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.align 2
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.code 16
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.thumb_func
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.globl up_saveusercontext
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.type up_saveusercontext, function
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up_saveusercontext:
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/* Perform the System call with R0=0 and R1=regs */
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mov r1, r0 /* R1: regs */
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mov r0, #SYS_save_context /* R0: save context (also return value) */
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svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
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/* There are two return conditions. On the first return, R0 (the
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* return value will be zero. On the second return we need to
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* force R0 to be 1.
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*/
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mov r3, #(4*REG_R0) /* R3=Offset to R0 storage */
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add r2, r1, r3 /* R2=Address of R0 storage */
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mov r3, #1 /* R3=Return value of one */
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str r3, [r2, #0] /* Save return value */
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bx lr /* "normal" return with r0=0 or
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* context switch with r0=1 */
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.size up_saveusercontext, .-up_saveusercontext
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.end
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@ -1,76 +0,0 @@
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/****************************************************************************
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* arch/arm/src/armv7-a/arm_fullcontextrestore.S
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*
|
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* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
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*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/syscall.h>
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#include "arm.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Symbols
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****************************************************************************/
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|
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.file "arm_fullcontextrestore.S"
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/****************************************************************************
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* Macros
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
|
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/****************************************************************************
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* Name: arm_fullcontextrestore
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*
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* Description:
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* Restore the current thread context. Full prototype is:
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*
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* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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.globl arm_fullcontextrestore
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.type arm_fullcontextrestore, function
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_restore_context /* R0: restore context */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
.size arm_fullcontextrestore, .-arm_fullcontextrestore
|
||||
.end
|
||||
|
|
@ -1,138 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-a/arm_saveusercontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.file "arm_saveusercontext.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_saveusercontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context. Full prototype is:
|
||||
*
|
||||
* int up_saveusercontext(void *saveregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* 0: Normal return
|
||||
* 1: Context switch return
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.globl up_saveusercontext
|
||||
.type up_saveusercontext, function
|
||||
up_saveusercontext:
|
||||
|
||||
/* On entry, a1 (r0) holds address of struct xcptcontext */
|
||||
|
||||
/* Make sure that the return value will be non-zero (the value of the
|
||||
* other volatile registers don't matter -- r1-r3, ip). This function
|
||||
* is called through the normal C calling conventions and the values of
|
||||
* these registers cannot be assumed at the point of setjmp return.
|
||||
*/
|
||||
|
||||
mov ip, #1
|
||||
str ip, [r0, #(4*REG_R0)]
|
||||
|
||||
/* Save the volatile registers (plus r12 which really
|
||||
* doesn't need to be saved)
|
||||
*/
|
||||
|
||||
add r1, r0, #(4*REG_R4)
|
||||
stmia r1, {r4-r14}
|
||||
|
||||
/* Save the current cpsr */
|
||||
|
||||
mrs r2, cpsr /* R2 = CPSR value */
|
||||
add r1, r0, #(4*REG_CPSR)
|
||||
str r2, [r1]
|
||||
|
||||
/* Save the return address as the PC so that we return to the exit from
|
||||
* this function.
|
||||
*/
|
||||
|
||||
ldr r2, =1f
|
||||
add r1, r0, #(4*REG_PC)
|
||||
str r2, [r1]
|
||||
|
||||
/* Save the floating point registers.
|
||||
* REVISIT: Not all of the floating point registers need to be saved.
|
||||
* Some are volatile and need not be preserved across functions calls.
|
||||
* But right now, I can't find the definitive list of the volatile
|
||||
* floating point registers.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_FPU
|
||||
add r1, r0, #(4*REG_S0) /* R1=Address of FP register storage */
|
||||
|
||||
/* Store all floating point registers. Registers are stored in numeric order,
|
||||
* s0, s1, ... in increasing address order.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARM_DPFPU32
|
||||
vstmia.64 r1!, {d0-d15} /* Save the full FP context */
|
||||
vstmia.64 r1!, {d16-d31}
|
||||
#else
|
||||
vstmia r1!, {s0-s31} /* Save the full FP context */
|
||||
#endif
|
||||
|
||||
/* Store the floating point control and status register. At the end of the
|
||||
* vstmia, r1 will point to the FPSCR storage location.
|
||||
*/
|
||||
|
||||
vmrs r2, fpscr /* Fetch the FPSCR */
|
||||
str r2, [r1], #4 /* Save the floating point control and status register */
|
||||
#endif
|
||||
|
||||
/* Return 0 now indicating that this return is not a context switch */
|
||||
|
||||
mov r0, #0 /* Return value == 0 */
|
||||
bx lr /* Return */
|
||||
|
||||
1:
|
||||
|
||||
/* Return 1 now indicating that this return is a context switch */
|
||||
|
||||
mov r0, #1 /* Return value == 1 */
|
||||
bx lr /* Return */
|
||||
|
||||
.size up_saveusercontext, .-up_saveusercontext
|
||||
.end
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "arm_fullcontextrestore.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_fullcontextrestore
|
||||
*
|
||||
* Description:
|
||||
* Restore the current thread context. Full prototype is:
|
||||
*
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.thumb_func
|
||||
.globl arm_fullcontextrestore
|
||||
.type arm_fullcontextrestore, function
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_restore_context /* R0: restore context */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
.size arm_fullcontextrestore, .-arm_fullcontextrestore
|
||||
.end
|
||||
|
|
@ -1,88 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-m/gnu/arm_saveusercontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "arm_saveusercontext.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_saveusercontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context. Full prototype is:
|
||||
*
|
||||
* int up_saveusercontext(void *saveregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* 0: Normal return
|
||||
* 1: Context switch return
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.text
|
||||
.thumb_func
|
||||
.globl up_saveusercontext
|
||||
.type up_saveusercontext, function
|
||||
up_saveusercontext:
|
||||
|
||||
/* Perform the System call with R0=0 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_save_context /* R0: save context (also return value) */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* There are two return conditions. On the first return, R0 (the
|
||||
* return value will be zero. On the second return we need to
|
||||
* force R0 to be 1.
|
||||
*/
|
||||
|
||||
add r2, r1, #(4*REG_R0)
|
||||
mov r3, #1
|
||||
str r3, [r2, #0]
|
||||
bx lr /* "normal" return with r0=0 or
|
||||
* context switch with r0=1 */
|
||||
.size up_saveusercontext, .-up_saveusercontext
|
||||
.end
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-r/arm_fullcontextrestore.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
#include <arch/syscall.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.file "arm_fullcontextrestore.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_fullcontextrestore
|
||||
*
|
||||
* Description:
|
||||
* Restore the current thread context. Full prototype is:
|
||||
*
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.globl arm_fullcontextrestore
|
||||
.type arm_fullcontextrestore, function
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_restore_context /* R0: restore context */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
.size arm_fullcontextrestore, .-arm_fullcontextrestore
|
||||
.end
|
||||
|
|
@ -1,129 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-r/arm_saveusercontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.file "arm_saveusercontext.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_saveusercontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context. Full prototype is:
|
||||
*
|
||||
* int up_saveusercontext(void *saveregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* 0: Normal return
|
||||
* 1: Context switch return
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.globl up_saveusercontext
|
||||
.type up_saveusercontext, function
|
||||
up_saveusercontext:
|
||||
|
||||
/* On entry, a1 (r0) holds address of struct xcptcontext */
|
||||
|
||||
/* Make sure that the return value will be non-zero (the value of the
|
||||
* other volatile registers don't matter -- r1-r3, ip). This function
|
||||
* is called through the normal C calling conventions and the values of
|
||||
* these registers cannot be assumed at the point of setjmp return.
|
||||
*/
|
||||
|
||||
mov ip, #1
|
||||
str ip, [r0, #(4*REG_R0)]
|
||||
|
||||
/* Save the volatile registers (plus r12 which really
|
||||
* doesn't need to be saved)
|
||||
*/
|
||||
|
||||
add r1, r0, #(4*REG_R4)
|
||||
stmia r1, {r4-r14}
|
||||
|
||||
/* Save the current cpsr */
|
||||
|
||||
mrs r2, cpsr /* R2 = CPSR value */
|
||||
add r1, r0, #(4*REG_CPSR)
|
||||
str r2, [r1]
|
||||
|
||||
/* Save the return address as the PC so that we return to the exit from
|
||||
* this function.
|
||||
*/
|
||||
|
||||
add r1, r0, #(4*REG_PC)
|
||||
str lr, [r1]
|
||||
|
||||
/* Save the floating point registers.
|
||||
* REVISIT: Not all of the floating point registers need to be saved.
|
||||
* Some are volatile and need not be preserved across functions calls.
|
||||
* But right now, I can't find the definitive list of the volatile
|
||||
* floating point registers.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_FPU
|
||||
add r1, r0, #(4*REG_S0) /* R1=Address of FP register storage */
|
||||
|
||||
/* Store all floating point registers. Registers are stored in numeric order,
|
||||
* s0, s1, ... in increasing address order.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARM_DPFPU32
|
||||
vstmia.64 r1!, {d0-d15} /* Save the full FP context */
|
||||
vstmia.64 r1!, {d16-d31}
|
||||
#else
|
||||
vstmia r1!, {s0-s31} /* Save the full FP context */
|
||||
#endif
|
||||
|
||||
/* Store the floating point control and status register. At the end of the
|
||||
* vstmia, r1 will point to the FPSCR storage location.
|
||||
*/
|
||||
|
||||
vmrs r2, fpscr /* Fetch the FPSCR */
|
||||
str r2, [r1], #4 /* Save the floating point control and status register */
|
||||
#endif
|
||||
|
||||
/* Return 0 now indicating that this return is not a context switch */
|
||||
|
||||
mov r0, #0 /* Return value == 0 */
|
||||
bx lr /* Return */
|
||||
.size up_saveusercontext, .-up_saveusercontext
|
||||
.end
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv8-m/arm_fullcontextrestore.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "arm_fullcontextrestore.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_fullcontextrestore
|
||||
*
|
||||
* Description:
|
||||
* Restore the current thread context. Full prototype is:
|
||||
*
|
||||
* void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.thumb_func
|
||||
.globl arm_fullcontextrestore
|
||||
.type arm_fullcontextrestore, function
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_restore_context /* R0: restore context */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
.size arm_fullcontextrestore, .-arm_fullcontextrestore
|
||||
.end
|
||||
|
|
@ -1,88 +0,0 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv8-m/arm_saveusercontext.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "arm_saveusercontext.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_saveusercontext
|
||||
*
|
||||
* Description:
|
||||
* Save the current thread context. Full prototype is:
|
||||
*
|
||||
* int up_saveusercontext(void *saveregs);
|
||||
*
|
||||
* Returned Value:
|
||||
* 0: Normal return
|
||||
* 1: Context switch return
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
.text
|
||||
.thumb_func
|
||||
.globl up_saveusercontext
|
||||
.type up_saveusercontext, function
|
||||
up_saveusercontext:
|
||||
|
||||
/* Perform the System call with R0=0 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_save_context /* R0: save context (also return value) */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* There are two return conditions. On the first return, R0 (the
|
||||
* return value will be zero. On the second return we need to
|
||||
* force R0 to be 1.
|
||||
*/
|
||||
|
||||
add r2, r1, #(4*REG_R0)
|
||||
mov r3, #1
|
||||
str r3, [r2, #0]
|
||||
bx lr /* "normal" return with r0=0 or
|
||||
* context switch with r0=1 */
|
||||
.size up_saveusercontext, .-up_saveusercontext
|
||||
.end
|
||||
|
|
@ -19,8 +19,7 @@
|
|||
############################################################################
|
||||
|
||||
HEAD_ASRC = arm_nommuhead.S
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S vfork.S
|
||||
CMN_ASRCS = vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c arm_doirq.c
|
||||
|
|
@ -28,8 +27,8 @@ CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c arm_interruptcontext
|
|||
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
|
||||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S
|
||||
* arch/arm/src/common/arm_fullcontextrestore.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
|
|
@ -23,28 +23,9 @@
|
|||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
MODULE arm_fullcontextrestore
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
PUBLIC arm_fullcontextrestore
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
|
@ -62,18 +43,7 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
THUMB
|
||||
|
||||
arm_fullcontextrestore:
|
||||
|
||||
/* Perform the System call with R0=1 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_restore_context /* R0: restore context */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* This call should not return */
|
||||
|
||||
bx lr /* Unnecessary ... will not return */
|
||||
|
||||
END
|
||||
void arm_fullcontextrestore(uint32_t *restoreregs)
|
||||
{
|
||||
sys_call1(SYS_restore_context, (uintptr_t)restoreregs);
|
||||
}
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/****************************************************************************
|
||||
* arch/arm/src/armv7-m/iar/arm_saveusercontext.S
|
||||
* arch/arm/src/common/arm_saveusercontext.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
|
|
@ -23,28 +23,9 @@
|
|||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include <arch/syscall.h>
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
MODULE up_saveusercontext
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
PUBLIC up_saveusercontext
|
||||
|
||||
/****************************************************************************
|
||||
* Macros
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
|
@ -63,24 +44,7 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
THUMB
|
||||
|
||||
up_saveusercontext:
|
||||
|
||||
/* Perform the System call with R0=0 and R1=regs */
|
||||
|
||||
mov r1, r0 /* R1: regs */
|
||||
mov r0, #SYS_save_context /* R0: save context (also return value) */
|
||||
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
|
||||
|
||||
/* There are two return conditions. On the first return, R0 (the
|
||||
* return value will be zero. On the second return we need to
|
||||
* force R0 to be 1.
|
||||
*/
|
||||
|
||||
add r2, r1, #(4*REG_R0)
|
||||
mov r3, #1
|
||||
str r3, [r2, #0]
|
||||
bx lr /* "normal" return with r0=0 or
|
||||
* context switch with r0=1 */
|
||||
END
|
||||
int up_saveusercontext(void *saveregs)
|
||||
{
|
||||
return sys_call1(SYS_save_context, (uintptr_t)saveregs);
|
||||
}
|
||||
|
|
@ -18,22 +18,20 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S arm_exception.S
|
||||
CMN_ASRCS = vfork.S arm_exception.S
|
||||
|
||||
ifneq ($(CONFIG_CXD56_TESTSET),y)
|
||||
CMN_ASRCS += arm_testset.S
|
||||
endif
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_exit.c
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_exit.c
|
||||
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
|
||||
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -20,8 +20,8 @@
|
|||
|
||||
HEAD_ASRC = arm_head.S
|
||||
|
||||
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
|
||||
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
|
||||
CMN_ASRCS = arm_cache.S arm_vectors.S
|
||||
CMN_ASRCS += arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,8 +29,8 @@ CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
|
|||
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
|
||||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -18,18 +18,18 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS = arm_vectors.c arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
|
||||
CMN_CSRCS += arm_itm.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
|
||||
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -18,18 +18,18 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS = arm_vectors.c arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
|
||||
CMN_CSRCS += arm_itm.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
|
||||
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -20,16 +20,17 @@
|
|||
|
||||
HEAD_ASRC = arm_head.S
|
||||
|
||||
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
|
||||
CMN_ASRCS = arm_cache.S
|
||||
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
|
||||
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
|
||||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -44,9 +44,8 @@ endif
|
|||
|
||||
# Common assembly language files
|
||||
|
||||
CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += arm_vectors.S arm_fpuconfig.S
|
||||
CMN_ASRCS += arm_vectoraddrexcptn.S arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
|
||||
CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
|
||||
|
|
@ -56,14 +55,12 @@ CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
|
|||
CMN_CSRCS = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
|
||||
CMN_CSRCS += arm_modifyreg32.c
|
||||
|
||||
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
|
||||
CMN_CSRCS += arm_modifyreg32.c arm_assert.c arm_blocktask.c arm_dataabort.c
|
||||
CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_initialstate.c arm_mmu.c
|
||||
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_cache.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_cache.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
|
||||
CMN_CSRCS += arm_hostfs.c
|
||||
|
|
|
|||
|
|
@ -20,8 +20,7 @@
|
|||
|
||||
# Common ARM and Cortex-M7 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -31,7 +30,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += arm_backtrace_thumb.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
|
||||
|
|
@ -28,7 +27,8 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasestack.c
|
|||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S arm_exception.S
|
||||
CMN_ASRCS = vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,6 +28,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c arm_stackframe.c arm_vectors.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
|
|
|
|||
|
|
@ -20,8 +20,7 @@
|
|||
|
||||
# Common ARM and Cortex-M3 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
|
||||
|
|
@ -31,7 +30,8 @@ CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
|||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
|
||||
CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_puts.c arm_tcbinfo.c arm_perf.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c arm_perf.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += arm_backtrace_thumb.c
|
||||
|
|
|
|||
|
|
@ -19,9 +19,7 @@
|
|||
##############################################################################
|
||||
|
||||
HEAD_ASRC = lpc214x_head.S
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_vectors.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
|
||||
|
|
@ -29,9 +27,9 @@ CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
|
|||
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_lowputs.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -19,18 +19,17 @@
|
|||
##############################################################################
|
||||
|
||||
HEAD_ASRC = lpc23xx_head.S
|
||||
CMN_ASRCS = arm_vectors.S vfork.S
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
|
||||
CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
|
||||
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c
|
||||
CMN_CSRCS += arm_usestack.c arm_lowputs.c arm_vfork.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c
|
||||
CMN_CSRCS += arm_usestack.c arm_lowputs.c arm_vfork.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
|
||||
HEAD_ASRC = arm_head.S
|
||||
|
||||
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
|
||||
CMN_ASRCS = arm_cache.S
|
||||
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
|
|
@ -30,8 +30,8 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c
|
||||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -28,8 +27,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -28,8 +27,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -20,8 +20,7 @@
|
|||
|
||||
# Common ARMv7-M Source Files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_vectors.c
|
||||
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
|
||||
|
|
@ -31,6 +30,7 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
|
|||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
|
|
|
|||
|
|
@ -19,9 +19,8 @@
|
|||
############################################################################
|
||||
|
||||
HEAD_ASRC = moxart_head.S
|
||||
CMN_ASRCS = arm_vectors.S arm_nommuhead.S vfork.S
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
|
||||
CMN_ASRCS += arm_nommuhead.S vfork.S
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
|
||||
CMN_CSRCS += arm_exit.c arm_initialstate.c arm_initialize.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
|
|||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_etherstub.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
CHIP_ASRCS = moxart_lowputc.S
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_vectors.c
|
||||
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
|
|||
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_NRF52_SYSTIMER_SYSTICK),y)
|
||||
CMN_CSRCS += arm_systick.c nrf52_systick.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
|
|
|||
|
|
@ -18,9 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = phy62xx_exception.S phy62xx_start.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
#CMN_ASRCS += arm_switchcontext.S vfork.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = phy62xx_exception.S phy62xx_start.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,10 +27,9 @@ CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
#CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += phy62xx_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
#CMN_CSRCS += arm_etherstub.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_HAVE_BACKTRACE),y)
|
||||
CMN_CSRCS += arm_backtrace_thumb.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -29,7 +29,6 @@ CMN_CSRCS += arm_stackframe.c arm_task_start.c arm_usestack.c arm_vfork.c
|
|||
# arch/arm/src/armv8-m
|
||||
#
|
||||
CMN_ASRCS += arm_exception.S arm_fetchadd.S arm_setjmp.S
|
||||
CMN_ASRCS += arm_fullcontextrestore.S arm_saveusercontext.S
|
||||
CMN_ASRCS += arm_testset.S vfork.S
|
||||
|
||||
CMN_UASRCS += arm_signal_handler.S
|
||||
|
|
@ -40,7 +39,8 @@ CMN_CSRCS += arm_itm_syslog.c arm_memfault.c arm_mpu.c arm_ramvec_attach.c
|
|||
CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c
|
||||
CMN_CSRCS += arm_stackcheck.c arm_svcall.c arm_systick.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += arm_backtrace_thumb.c
|
||||
|
|
@ -48,8 +48,8 @@ endif
|
|||
|
||||
# arch/arm/src/rtl8720c
|
||||
#
|
||||
CHIP_CSRCS += ameba_nvic.c ameba_heap.c ameba_idle.c ameba_uart.c ameba_start.c ameba_vectors.c
|
||||
CHIP_CSRCS += ameba_efuse.c ameba_flash.c ameba_wdt.c ameba_hci.c
|
||||
CHIP_CSRCS += ameba_nvic.c ameba_heap.c ameba_idle.c ameba_uart.c ameba_start.c
|
||||
CHIP_CSRCS += ameba_vectors.c ameba_efuse.c ameba_flash.c ameba_wdt.c ameba_hci.c
|
||||
|
||||
CHIP_ASRCS += ameba_lto.S
|
||||
|
||||
|
|
|
|||
|
|
@ -20,14 +20,14 @@
|
|||
|
||||
# Source files specific to the Cortex-M0+
|
||||
|
||||
CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS += arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c
|
||||
CMN_CSRCS += arm_vectors.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_vectors.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_signal_dispatch.c
|
||||
|
|
|
|||
|
|
@ -20,14 +20,14 @@
|
|||
|
||||
# Source files specific to the Cortex-M4F
|
||||
|
||||
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c
|
||||
|
||||
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
||||
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
|
||||
|
|
|
|||
|
|
@ -22,8 +22,7 @@
|
|||
|
||||
# Common ARM and Cortex-M3 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -32,8 +31,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_SMP),y)
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
|
|
|
|||
|
|
@ -41,8 +41,7 @@ endif
|
|||
|
||||
# Common assembly language files
|
||||
|
||||
CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
|
||||
|
|
@ -55,14 +54,12 @@ CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
|
|||
CMN_CSRCS = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
|
||||
CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
|
||||
CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
|
||||
CMN_CSRCS += arm_modifyreg32.c
|
||||
|
||||
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
|
||||
CMN_CSRCS += arm_modifyreg32.c arm_assert.c arm_blocktask.c arm_dataabort.c
|
||||
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_cache.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_cache.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
|
||||
# Configuration dependent C files
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
|
|
|||
|
|
@ -22,8 +22,7 @@
|
|||
|
||||
# Common ARM and Cortex-M4 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_vectors.c
|
||||
CMN_CSRCS += arm_createstack.c arm_exit.c arm_initialize.c arm_initialstate.c
|
||||
|
|
@ -32,8 +31,8 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
|
|||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_tcbinfo.c arm_puts.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
|
|
|||
|
|
@ -23,8 +23,7 @@
|
|||
|
||||
# Common ARM and Cortex-M7 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
|
||||
|
|
@ -33,8 +32,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_cache.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c arm_cache.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
|
||||
|
|
@ -28,8 +27,8 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
|
|||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_perf.c
|
||||
CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c arm_perf.c
|
||||
|
||||
ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y)
|
||||
CMN_CSRCS += arm_systick.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_exception.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
|
||||
|
|
@ -29,7 +28,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
|
||||
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += arm_task_start.c arm_pthread_start.c
|
||||
|
|
|
|||
|
|
@ -23,17 +23,17 @@
|
|||
|
||||
# Common ARM and Cortex-M7 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c arm_puts.c
|
||||
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
|
||||
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_cache.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
|
|
|
|||
|
|
@ -23,18 +23,17 @@
|
|||
|
||||
# Common ARM and Cortex-M7 files
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
|
||||
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_cache.c arm_perf.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c arm_cache.c arm_perf.c
|
||||
|
||||
ifeq ($(CONFIG_ARMV7M_SYSTICK),y)
|
||||
CMN_CSRCS += arm_systick.c
|
||||
|
|
|
|||
|
|
@ -23,8 +23,7 @@
|
|||
|
||||
# Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -34,7 +33,8 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_vectors.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
|
|
|||
|
|
@ -25,11 +25,7 @@ HEAD_ASRC =
|
|||
|
||||
# Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
|
||||
|
||||
CMN_UASRCS =
|
||||
CMN_UCSRCS =
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -39,7 +35,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
|
|
|||
|
|
@ -25,11 +25,7 @@ HEAD_ASRC =
|
|||
|
||||
# Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
|
||||
|
||||
CMN_UASRCS =
|
||||
CMN_UCSRCS =
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -39,7 +35,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
|||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_switchcontext.c arm_systemreset.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_vfork.c
|
||||
CMN_CSRCS += arm_vfork.c arm_saveusercontext.c arm_fullcontextrestore.c
|
||||
|
||||
# Configuration-dependent common files
|
||||
|
||||
|
|
|
|||
|
|
@ -20,8 +20,7 @@
|
|||
|
||||
HEAD_ASRC = str71x_head.S
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
|
||||
CMN_ASRCS += vfork.S
|
||||
CMN_ASRCS = arm_vectors.S vfork.S
|
||||
|
||||
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
|
||||
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
|
||||
|
|
@ -30,8 +29,8 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c
|
|||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c
|
||||
CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_switchcontext.c
|
||||
CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
|
||||
CMN_CSRCS += arm_idle.c
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
|
||||
|
|
@ -28,8 +27,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
|
||||
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c
|
||||
CMN_CSRCS += arm_tcbinfo.c arm_vectors.c
|
||||
CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c arm_vectors.c
|
||||
|
||||
ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
|
||||
CMN_CSRCS += arm_hostfs.c
|
||||
|
|
|
|||
|
|
@ -25,9 +25,8 @@ HEAD_ASRC = arm_vectortab.S
|
|||
|
||||
# Common assembly language files
|
||||
|
||||
CMN_ASRCS += arm_vectortab.S arm_vectors.S arm_head.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += arm_vectortab.S arm_vectors.S arm_head.S
|
||||
CMN_ASRCS += arm_vectoraddrexcptn.S arm_testset.S arm_fetchadd.S vfork.S
|
||||
CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S
|
||||
CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S
|
||||
|
|
@ -50,8 +49,8 @@ CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
|
|||
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_prefetchabort.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
|
||||
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
|
||||
CMN_CSRCS += arm_switchcontext.c arm_cache.c
|
||||
CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_switchcontext.c
|
||||
CMN_CSRCS += arm_saveusercontext.c arm_fullcontextrestore.c arm_cache.c
|
||||
|
||||
# Configuration dependent C files
|
||||
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
#
|
||||
############################################################################
|
||||
|
||||
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
|
||||
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
CMN_ASRCS = arm_testset.S arm_fetchadd.S vfork.S arm_exception.S
|
||||
|
||||
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c arm_vectors.c
|
||||
CMN_CSRCS += arm_doirq.c arm_exit.c arm_initialize.c arm_initialstate.c
|
||||
|
|
@ -28,7 +27,8 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
|
|||
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
|
||||
CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
|
||||
CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_puts.c arm_tcbinfo.c
|
||||
CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_saveusercontext.c
|
||||
CMN_CSRCS += arm_fullcontextrestore.c arm_puts.c arm_tcbinfo.c
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += arm_backtrace_thumb.c
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue