From efce8bd198e9ee85eb8bb6525edfb549a6ab2f32 Mon Sep 17 00:00:00 2001
From: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Tue, 5 Apr 2022 01:28:37 +0800
Subject: [PATCH] Revert "arch/risc-v: use STACK_FRAME_SIZE for in S-mode
 syscall asm"

This reverts commit 9b7f9867aad7ff2d04b97516ab86b68d733447b6.
---
 arch/risc-v/include/arch.h              |  5 -----
 arch/risc-v/include/syscall.h           | 10 +++++-----
 arch/risc-v/src/common/riscv_internal.h |  7 +++++--
 3 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/risc-v/include/arch.h b/arch/risc-v/include/arch.h
index 19e9e28155..1f75b49ac6 100644
--- a/arch/risc-v/include/arch.h
+++ b/arch/risc-v/include/arch.h
@@ -66,11 +66,6 @@
 #  define REGSTORE  __STR(sd)
 #endif
 
-/* RISC-V requires a 16-byte stack alignment. */
-
-#define STACK_ALIGNMENT     16
-#define STACK_FRAME_SIZE    __XSTR(STACK_ALIGNMENT)
-
 /* Provide the maximum amount of page table levels per MMU type */
 
 #ifdef CONFIG_ARCH_MMU_TYPE_SV39
diff --git a/arch/risc-v/include/syscall.h b/arch/risc-v/include/syscall.h
index d232425662..bf16ffeb0b 100644
--- a/arch/risc-v/include/syscall.h
+++ b/arch/risc-v/include/syscall.h
@@ -126,11 +126,11 @@
 
 #if defined (CONFIG_ARCH_USE_S_MODE) && defined (__KERNEL__)
 #  define ASM_SYS_CALL \
-     " addi sp, sp, -" STACK_FRAME_SIZE "\n" /* Make room */ \
-     REGSTORE " ra, 0(sp)\n"                 /* Save ra */ \
-     " jal  ra, riscv_dispatch_syscall\n"    /* Dispatch (modifies ra) */ \
-     REGLOAD " ra, 0(sp)\n"                  /* Restore ra */ \
-     " addi sp, sp, " STACK_FRAME_SIZE "\n"  /* Restore sp */
+     " addi sp, sp, -16\n"                  /* Make room */ \
+     REGSTORE " ra, 0(sp)\n"                /* Save ra */ \
+     " jal  ra, riscv_dispatch_syscall\n"   /* Dispatch (modifies ra) */ \
+     REGLOAD " ra, 0(sp)\n"                 /* Restore ra */ \
+     " addi sp, sp, 16\n"                   /* Restore sp */
 #else
 #  define ASM_SYS_CALL \
      "ecall"
diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h
index 667bdc6545..ac8118f5ea 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -33,8 +33,6 @@
 #  include <sys/types.h>
 #  include <stdint.h>
 #  include <syscall.h>
-#else
-#  include <arch/arch.h>
 #endif
 
 /****************************************************************************
@@ -49,6 +47,11 @@
 #define INTSTACK_COLOR 0xdeadbeef
 #define HEAP_COLOR     'h'
 
+/* RISC-V requires a 16-byte stack alignment. */
+
+#define STACK_ALIGNMENT     16
+#define STACK_FRAME_SIZE    __XSTR(STACK_ALIGNMENT)
+
 /* Stack alignment macros */
 
 #define STACK_ALIGN_MASK    (STACK_ALIGNMENT - 1)