SAMA5 PMECC: Some ROM-related interface updates
This commit is contained in:
Gregory Nutt
parent
b6da35e12c
commit
f4c6a16c3d
4 changed files with 135 additions and 15 deletions
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@ -3336,7 +3336,51 @@ config SAMA5_NAND_CE
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void board_nand_ce(int cs, bool enable);
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endif # SAMA5_EBICS0_NAND
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if SAMA5_EBICS0_NAND || SAMA5_EBICS1_NAND || SAMA5_EBICS2_NAND || SAMA5_EBICS3_NAND
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config SAMA5_PMECC_EMBEDDEDALGO
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bool "ROM ECC detection/correction"
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default y
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---help---
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The SAMA5D3 ROM code embeds the software used in the process of ECC
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detection/correction: function pmecc_correctionalgo(). If this
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option is selected, the ROM code will be used. If not, then the an
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implementation pmecc_correctionalgo() will be built into the NuttX
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image.
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config SAMA5_PMECC_EMBEDDEDALGO_ADDR
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hex "Address of ROM ECC detection/correction"
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default 0x00104510
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---help---
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The ROM code embeds the software used in the process of ECC
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detection/correction at this address. Don't change this address
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unless you know what you are doing.
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config SAMA5_PMECC_GALOIS_ROMTABLES
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bool "ROM Galois Tables"
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default y
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---help---
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Support the PMECC algorithm using Galois tables in ROM.
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if SAMA5_PMECC_GALOIS_ROMTABLES
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config SAMA5_PMECC_GALOIS_TABLE512_ROMADDR
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hex "Address of Galois Table 512"
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default 0x00110000
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---help---
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Address of Galois Field Table 512 mapping in ROM. Don't change this
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address unless you know what you are doing.
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config SAMA5_PMECC_GALOIS_TABLE1024_ROMADDR
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hex "Address of Galois Table 1024"
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default 0x00118000
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---help---
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Address of Galois Field Table 1024 mapping in ROM. Don't change this
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address unless you know what you are doing.
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endif # SAMA5_PMECC_GALOIS_ROMTABLES
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endif # SAMA5_EBICS*_PMECC
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endif # SAMA5_EBICS*_NAND
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endmenu # External Memory Configuration
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@ -58,12 +58,15 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Number of bits of correction. These much match the (unshifted) values
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* in the SMC_PMECCFG register BCH_ERR field.
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*/
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#define BCH_ERR2 0 /* 2 errors */
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#define BCH_ERR4 1 /* 4 errors */
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#define BCH_ERR8 2 /* 8 errors */
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#define BCH_ERR12 3 /* 12 errors */
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#define BCH_ERR24 4 /* 24 errors */
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#define BCH_ERR2 0 /* 2 bit errors */
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#define BCH_ERR4 1 /* 4 bit errors */
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#define BCH_ERR8 2 /* 8 bit errors */
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#define BCH_ERR12 3 /* 12 bit errors */
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#define BCH_ERR24 4 /* 24 bit errors */
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/****************************************************************************
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* Private Types
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@ -73,8 +76,8 @@
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struct sam_pmecc_s
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{
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uint8_t nsectors : 4; /* Number of sectors in data */
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uint8_t bcherr : 3; /* BCH_ERR correctability code */
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uint8_t nsectors; /* Number of sectors in data */
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struct pmecc_desc_s desc; /* Atmel PMECC descriptor */
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};
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/****************************************************************************
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@ -211,6 +214,12 @@ static void pmecc_pagelayout(uint16_t datasize, uint16_t sparesize,
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uint8_t bcherr512;
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uint8_t bcherr1k;
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/* ECC must not start at address zero, since bad block tags are at offset
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* zero.
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*/
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DEBUGASSERT(offset > 0);
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/* Decrease the spare size by the offset */
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sparesize -= offset;
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@ -240,8 +249,8 @@ static void pmecc_pagelayout(uint16_t datasize, uint16_t sparesize,
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DEBUGASSERT(bcherr512 > 0 || bcherr1k > 0);
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if (bcherr1k == 0)
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{
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g_pmecc.nsectors = nsectors512;
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g_pmecc.bcherr = bcherr512;
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g_pmecc.nsectors = nsectors512;
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g_pmecc.desc.bcherr = bcherr512;
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}
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else
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{
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@ -249,13 +258,13 @@ static void pmecc_pagelayout(uint16_t datasize, uint16_t sparesize,
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correctability1K = nsectors1k * g_correctability[bcherr1k];
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if (correctability512 >= correctability1K)
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{
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g_pmecc.nsectors = nsectors512;
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g_pmecc.bcherr = bcherr512;
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g_pmecc.nsectors = nsectors512;
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g_pmecc.desc.bcherr = ((uint32_t)bcherr512 << HSMC_PMECCFG_BCHERR_SHIFT);
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}
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else
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{
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g_pmecc.nsectors = nsectors1k;
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g_pmecc.bcherr = bcherr1k;
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g_pmecc.nsectors = nsectors1k;
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g_pmecc.desc.bcherr = ((uint32_t)bcherr1k << HSMC_PMECCFG_BCHERR_SHIFT);
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}
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}
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}
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@ -129,9 +129,75 @@
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#ifdef NAND_HAVE_PMECC
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/* The ROM code embeds the software used in the process of ECC
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* detection/correction
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*/
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#ifdef CONFIG_SAMA5_PMECC_EMBEDDEDALGO_ADDR
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# ifndef CONFIG_SAMA5_PMECC_EMBEDDEDALGO_ADDR
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# define CONFIG_SAMA5_PMECC_EMBEDDEDALGO_ADDR 0x00104510
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# endif
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#endif
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#ifdef CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES
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# ifndef CONFIG_SAMA5_PMECC_GALOIS_TABLE512_ROMADDR
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# define CONFIG_SAMA5_PMECC_GALOIS_TABLE512_ROMADDR 0x00110000
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# endif
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# ifndef CONFIG_SAMA5_PMECC_GALOIS_TABLE1024_ROMADDR
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# define CONFIG_SAMA5_PMECC_GALOIS_TABLE1024_ROMADDR 0x00118000
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# endif
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#endif
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/* Other PMECC Definitions **************************************************/
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/* Defines the maximum value of the error correcting capability */
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#define PMECC_MAX_CORRECTABILITY 25
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/* Start address of ECC cvalue in spare zone, this must not be 0 since bad
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* block tags are at address 0.
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*/
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#define PMECC_ECC_STARTOFFSET 2
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/* This is the form of the PMECC descriptor that is passed to the ECC
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* detection correction algorithm in ROM. The binary for of this structure
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* cannot be altered!
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*/
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struct pmecc_desc_s
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{
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uint32_t pagesize; /* 0-3: See HSMC_PMECCFG_PAGESIZE_* definitions */
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uint32_t sparesize; /* 4-7: The spare area size is equal to (SPARESIZE+1) bytes */
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uint32_t sectorsz; /* 8-11: See HSMC_PMECCFG_SECTORSZ_* definitions*/
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uint32_t bcherr; /* 12-15: See HSMC_PMECCFG_BCHERR_* definitions */
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uint32_t eccsize; /* 16-19: Real size in bytes of ECC in spare */
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uint32_t eccstart; /* 20-23: The first byte address of the ECC area */
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uint32_t eccend; /* 24-27: The last byte address of the ECC area */
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uint32_t nandwr; /* 28-31: NAND Write Access */
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uint32_t sparena; /* 32-35: Spare Enable */
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uint32_t automode; /* 36-39: Automatic Mode */
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uint32_t clkctrl; /* 40-43: PMECC Module data path Setup Time is CLKCTRL+1. */
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uint32_t interrupt; /* 44-47: */
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int32_t tt; /* 48-51: Error correcting capability */
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int32_t mm; /* 52-55: Degree of the remainders, GF(2**mm) */
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int32_t nn; /* 56-59: Length of codeword = nn=2**mm -1 */
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int16_t *alphato; /* 60-63: Gallois field table */
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int16_t *indexof; /* 64-67: Index of Gallois field table */
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int16_t partsyn[100]; /* 68-267: */
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int16_t si[100]; /* 268-467: Current syndrome value */
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/* 468-: Sigma table */
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int16_t smu[PMECC_MAX_CORRECTABILITY + 2][2 * PMECC_MAX_CORRECTABILITY + 1];
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/* Polynomial order */
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int16_t lmu[PMECC_MAX_CORRECTABILITY + 1];
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};
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/****************************************************************************
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* Public Data
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@ -207,7 +207,8 @@ mksymtab.c, cvsparser.c, and cvsparser.h
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mkctags.sh
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----------
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A script for creating ctags from Ken Pettit. See http://ctags.sourceforge.net/
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A script for creating ctags from Ken Pettit. See http://en.wikipedia.org/wiki/Ctags
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and http://ctags.sourceforge.net/
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pic32mx
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-------
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