From f6ba2970e086a5e9ef55c316557ce14dc6332398 Mon Sep 17 00:00:00 2001
From: zhengshaobo1 <zhengshaobo1@xiaomi.com>
Date: Tue, 29 Aug 2023 19:38:44 +0800
Subject: [PATCH] Solve the risk of dividing by 0 when setting frequency points

Signed-off-by: zhengshaobo1 <zhengshaobo1@xiaomi.com>
---
 drivers/clk/clk_divider.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/clk_divider.c b/drivers/clk/clk_divider.c
index f7047e0f65..8f24b4de81 100644
--- a/drivers/clk/clk_divider.c
+++ b/drivers/clk/clk_divider.c
@@ -297,6 +297,11 @@ static int32_t divider_get_val(uint32_t rate, uint32_t parent_rate,
   uint32_t div;
   uint32_t value;
 
+  if (rate == 0)
+    {
+      return -EINVAL;
+    }
+
   div = DIV_ROUND_UP(parent_rate, rate);
 
   if ((flags & CLK_DIVIDER_POWER_OF_TWO) && !is_power_of_2(div))