Cosmetic changes for coding style; removal of dangling spaces at the end of lines
This commit is contained in:
parent
494387b33b
commit
f7e5953804
16 changed files with 353 additions and 295 deletions
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@ -164,7 +164,7 @@
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struct kinetis_dev_s
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{
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struct sdio_dev_s dev; /* Standard, base SDIO interface */
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/* Kinetis-specific extensions */
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/* Event support */
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@ -733,7 +733,8 @@ static void kinetis_dataconfig(struct kinetis_dev_s *priv, bool bwrite,
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{
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watermark = (SDHC_MAX_WATERMARK / 2);
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}
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putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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}
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#endif
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}
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@ -825,7 +826,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
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{
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data.b[i] = *ptr++;
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}
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/* Now the transfer is finished */
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priv->remaining = 0;
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@ -870,7 +871,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
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* queued words is greater than or equal to 1.
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*/
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putreg32(1 << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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putreg32(1 << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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/* Loop while there is space to store the data, waiting for buffer read
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* ready (BRR)
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@ -925,7 +926,8 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
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{
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watermark = (SDHC_MAX_WATERMARK / 2);
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}
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putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
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fllvdbg("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
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priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT),
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@ -1039,7 +1041,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
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kinetis_configxfrints(priv, 0);
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/* Clearing pending interrupt status on all transfer related interrupts */
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putreg32(SDHC_XFRDONE_INTS, KINETIS_SDHC_IRQSTAT);
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/* If this was a DMA transfer, make sure that DMA is stopped */
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@ -1071,7 +1073,7 @@ static void kinetis_endtransfer(struct kinetis_dev_s *priv, sdio_eventset_t wkup
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}
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/****************************************************************************
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* Interrrupt Handling
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* Interrupt Handling
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****************************************************************************/
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/****************************************************************************
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@ -1103,9 +1105,9 @@ static int kinetis_interrupt(int irq, void *context)
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regval = getreg32(KINETIS_SDHC_IRQSIGEN);
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enabled = getreg32(KINETIS_SDHC_IRQSTAT) & regval;
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fllvdbg("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
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fllvdbg("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
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getreg32(KINETIS_SDHC_IRQSTAT), regval, enabled);
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/* Disable card interrupts to clear the card interrupt to the host system. */
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regval &= ~SDHC_INT_CINT;
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@ -1217,7 +1219,7 @@ static int kinetis_interrupt(int irq, void *context)
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*
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* Description:
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* Locks the bus. Function calls low-level multiplexed bus routines to
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* resolve bus requests and acknowledgment issues.
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* resolve bus requests and acknowledgement issues.
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*
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* Input Parameters:
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* dev - An instance of the SDIO device interface
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@ -1230,7 +1232,7 @@ static int kinetis_interrupt(int irq, void *context)
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#ifdef CONFIG_SDIO_MUXBUS
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static int kinetis_lock(FAR struct sdio_dev_s *dev, bool lock)
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{
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{
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/* Single SDIO instance so there is only one possibility. The multiplex
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* bus is part of board support package.
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*/
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@ -1247,7 +1249,7 @@ static int kinetis_lock(FAR struct sdio_dev_s *dev, bool lock)
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* Reset the SDIO controller. Undo all setup and initialization.
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*
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* Input Parameters:
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* dev - An instance of the SDIO device interface
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* dev - An instance of the SDIO device interface
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*
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* Returned Value:
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* None
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@ -1406,12 +1408,12 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
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*
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* For example, if the base clock frequency is 96 MHz, and the target
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* frequency is 25 MHz, the following logic will select prescaler.
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*
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*
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* 96MHz / 2 <= 25MHz <= 96MHz / 2 /16 -- YES, prescaler == 2
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*
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* If the target frequency is 400 kHz, the following logic will select
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* prescaler:
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*
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*
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* 96MHz / 2 <= 400KHz <= 96MHz / 2 / 16 -- NO
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* 96MHz / 4 <= 400KHz <= 96MHz / 4 / 16 -- NO
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* 96MHz / 8 <= 400KHz <= 96MHz / 8 / 16 -- NO
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@ -1479,7 +1481,7 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
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*
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* Or, for example, if the target frequency is 400 kHz and the selected
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* prescaler is 16, the following* logic will select prescaler:
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*
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*
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* prescaled = 96MHz / 16 = 6MHz
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* divisor = (6MHz + 200KHz) / 400KHz = 15
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*
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@ -1686,7 +1688,7 @@ static int kinetis_attach(FAR struct sdio_dev_s *dev)
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putreg32(0, KINETIS_SDHC_IRQSIGEN);
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putreg32(SDHC_INT_ALL, KINETIS_SDHC_IRQSTAT);
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/* Set the interrrupt priority */
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/* Set the interrupt priority */
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up_prioritize_irq(KINETIS_IRQ_SDHC, CONFIG_KINETIS_SDHC_PRIO);
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@ -1778,7 +1780,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
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}
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}
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}
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/* Configure response type bits */
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switch (cmd & MMCSD_RESPONSE_MASK)
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@ -1790,7 +1792,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
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case MMCSD_R1B_RESPONSE: /* Response length 48, check busy & cmdindex*/
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regval |= (SDHC_XFERTYP_RSPTYP_LEN48BSY|SDHC_XFERTYP_CICEN|SDHC_XFERTYP_CCCEN);
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break;
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case MMCSD_R1_RESPONSE: /* Response length 48, check cmdindex */
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case MMCSD_R5_RESPONSE:
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case MMCSD_R6_RESPONSE:
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@ -1988,7 +1990,7 @@ static int kinetis_cancel(FAR struct sdio_dev_s *dev)
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/* Clearing pending interrupt status on all transfer- and event- related
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* interrupts
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*/
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putreg32(SDHC_WAITALL_INTS, KINETIS_SDHC_IRQSTAT);
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/* Cancel any watchdog timeout */
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@ -2066,7 +2068,7 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
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/* Then wait for the Command Complete (CC) indication (or timeout). The
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* CC bit is set when the end bit of the command response is received
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* (except Auto CMD12).
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* (except Auto CMD12).
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*/
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while ((getreg32(KINETIS_SDHC_IRQSTAT) & SDHC_INT_CC) == 0)
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@ -2117,7 +2119,8 @@ static int kinetis_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd)
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*
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****************************************************************************/
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static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t *rshort)
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static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
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uint32_t *rshort)
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{
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uint32_t regval;
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int ret = OK;
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@ -2130,7 +2133,7 @@ static int kinetis_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32
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* 7:1 bit6 - bit0 CRC7
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* 0 1 End bit
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*
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* R1b Identical to R1 with the additional busy signaling via the data
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* R1b Identical to R1 with the additional busy signalling via the data
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* line.
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*
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* R6 Published RCA Response (48-bit, SD card only)
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@ -2227,7 +2230,7 @@ static int kinetis_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t r
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ret = -EIO;
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}
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}
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/* Return the long response in CMDRSP3..0*/
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if (rlong)
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@ -2326,7 +2329,7 @@ static void kinetis_waitenable(FAR struct sdio_dev_s *dev,
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{
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struct kinetis_dev_s *priv = (struct kinetis_dev_s*)dev;
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uint32_t waitints;
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DEBUGASSERT(priv != NULL);
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/* Disable event-related interrupts */
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@ -2395,7 +2398,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
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{
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int delay;
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/* Yes.. Handle a cornercase */
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/* Yes.. Handle a corner case */
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if (!timeout)
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{
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@ -2428,9 +2431,9 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
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kinetis_takesem(priv);
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wkupevent = priv->wkupevent;
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/* Check if the event has occurred. When the event has occurred, then
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* evenset will be set to 0 and wkupevent will be set to a nonzero value.
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* evenset will be set to 0 and wkupevent will be set to a non-zero value.
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*/
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if (wkupevent != 0)
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@ -2462,7 +2465,7 @@ static sdio_eventset_t kinetis_eventwait(FAR struct sdio_dev_s *dev,
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*
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* Events are automatically disabled once the callback is performed and no
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* further callback events will occur until they are again enabled by
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* calling this methos.
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* calling this method.
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*
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* Input Parameters:
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* dev - An instance of the SDIO device interface
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@ -2500,7 +2503,7 @@ static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
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*
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* Input Parameters:
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* dev - Device-specific state data
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* callback - The funtion to call on the media change
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* callback - The function to call on the media change
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* arg - A caller provided value to return with the callback
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*
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* Returned Value:
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@ -2595,7 +2598,7 @@ static int kinetis_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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kinetis_configxfrints(priv, SDHC_DMADONE_INTS);
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putreg32((uint32_t)buffer, KINETIS_SDHC_DSADDR);
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/* Sample the register state */
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kinetis_sample(priv, SAMPLENDX_AFTER_SETUP);
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@ -2805,7 +2808,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
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/* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable
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* of 8-bit wide bus operation but D4-D7 are not configured).
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*
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*
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* If bus is multiplexed then there is a custom bus configuration utility
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* in the scope of the board support package.
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*/
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@ -2851,13 +2854,13 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
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* Name: sdhc_mediachange
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*
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* Description:
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* Called by board-specific logic -- posssible from an interrupt handler --
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* Called by board-specific logic -- possible from an interrupt handler --
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* in order to signal to the driver that a card has been inserted or
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* removed from the slot
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*
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* Input Parameters:
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* dev - An instance of the SDIO driver device state structure.
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* cardinslot - true is a card has been detected in the slot; false if a
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* cardinslot - true is a card has been detected in the slot; false if a
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* card has been removed from the slot. Only transitions
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* (inserted->removed or removed->inserted should be reported)
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*
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@ -2884,6 +2887,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
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{
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priv->cdstatus &= ~SDIO_STATUS_PRESENT;
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}
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fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
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/* Perform any requested callback if the status has changed */
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@ -2892,6 +2896,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
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{
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kinetis_callback(priv);
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}
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irqrestore(flags);
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}
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@ -291,7 +291,7 @@ struct lpc17_driver_s
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uint32_t lp_inten; /* Shadow copy of INTEN register */
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WDOG_ID lp_txpoll; /* TX poll timer */
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WDOG_ID lp_txtimeout; /* TX timeout timer */
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#if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET)
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struct lpc17_statistics_s lp_stat;
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#endif
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@ -638,7 +638,7 @@ static int lpc17_transmit(struct lpc17_driver_s *priv)
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memcpy(txbuffer, priv->lp_dev.d_buf, priv->lp_dev.d_len);
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/* Bump the producer index, making the packet available for transmission. */
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if (++prodidx >= CONFIG_NET_NTXDESC)
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{
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/* Wrap back to index zero */
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@ -723,10 +723,10 @@ static int lpc17_uiptxpoll(struct uip_driver_s *dev)
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* possibly a response to the incoming packet (but probably not, in reality).
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* However, since the Rx and Tx operations are decoupled, there is no
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* guarantee that there will be a Tx descriptor available at that time.
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* This function will perform that check and, if no Tx descriptor is
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* This function will perform that check and, if no Tx descriptor is
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* available, this function will (1) stop incoming Rx processing (bad), and
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* (2) hold the outgoing packet in a pending state until the next Tx
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* interrupt occurs.
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* interrupt occurs.
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*
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* Parameters:
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* priv - Reference to the driver state structure
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@ -757,7 +757,7 @@ static void lpc17_response(struct lpc17_driver_s *priv)
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/* No.. mark the Tx as pending and halt further Tx interrupts */
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DEBUGASSERT((priv->lp_inten & ETH_INT_TXDONE) != 0);
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priv->lp_txpending = true;
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priv->lp_inten &= ~ETH_RXINTS;
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lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
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@ -807,7 +807,7 @@ static void lpc17_rxdone(struct lpc17_driver_s *priv)
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EMAC_STAT(priv, rx_packets);
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/* Get the Rx status and packet length (-4+1) */
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rxstat = (uint32_t*)(LPC17_RXSTAT_BASE + (considx << 3));
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pktlen = (*rxstat & RXSTAT_INFO_RXSIZE_MASK) - 3;
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@ -827,7 +827,7 @@ static void lpc17_rxdone(struct lpc17_driver_s *priv)
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* be the same size as our max packet size, any fragments also
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* imply that the packet is too big.
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*/
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/* else */ if (pktlen > CONFIG_NET_BUFSIZE + CONFIG_NET_GUARDSIZE)
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{
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nlldbg("Too big. considx: %08x prodidx: %08x pktlen: %d rxstat: %08x\n",
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@ -854,11 +854,11 @@ static void lpc17_rxdone(struct lpc17_driver_s *priv)
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void *rxbuffer;
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/* Get the Rx buffer address from the Rx descriptor */
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rxdesc = (uint32_t*)(LPC17_RXDESC_BASE + (considx << 3));
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rxbuffer = (void*)*rxdesc;
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/* Copy the data data from the EMAC DMA RAM to priv->lp_dev.d_buf.
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/* Copy the data data from the EMAC DMA RAM to priv->lp_dev.d_buf.
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* Set amount of data in priv->lp_dev.d_len
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*
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* Here would be a great performance improvement: Remove the
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@ -1034,7 +1034,7 @@ static int lpc17_interrupt(int irq, void *context)
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/* Clear all pending interrupts */
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lpc17_putreg(status, LPC17_ETH_INTCLR);
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/* Handle each pending interrupt **************************************/
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/* Check for Wake-Up on Lan *******************************************/
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@ -1076,7 +1076,7 @@ static int lpc17_interrupt(int irq, void *context)
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(void)lpc17_ifup(&priv->lp_dev);
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}
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else
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{
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{
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/* Check for receive events ***************************************/
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/* RX ERROR -- Triggered on receive errors: AlignmentError,
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* RangeError, LengthError, SymbolError, CRCError or NoDescriptor
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@ -1116,7 +1116,7 @@ static int lpc17_interrupt(int irq, void *context)
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lpc17_rxdone(priv);
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}
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/* Check for Tx events ********************************************/
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/* TX ERROR -- Triggered on transmit errors: LateCollision,
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* ExcessiveCollision and ExcessiveDefer, NoDescriptor or Underrun.
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@ -1255,7 +1255,7 @@ static void lpc17_polltimer(int argc, uint32_t arg, ...)
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*
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* Description:
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* NuttX Callback: Bring up the Ethernet interface when an IP address is
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* provided
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* provided
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*
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* Parameters:
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* dev - Reference to the NuttX driver state structure
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|
|
@ -1463,7 +1463,7 @@ static int lpc17_ifdown(struct uip_driver_s *dev)
|
|||
* Function: lpc17_txavail
|
||||
*
|
||||
* Description:
|
||||
* Driver callback invoked when new TX data is available. This is a
|
||||
* Driver callback invoked when new TX data is available. This is a
|
||||
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
|
||||
* latency.
|
||||
*
|
||||
|
|
@ -1516,7 +1516,7 @@ static int lpc17_txavail(struct uip_driver_s *dev)
|
|||
*
|
||||
* Parameters:
|
||||
* dev - Reference to the NuttX driver state structure
|
||||
* mac - The MAC address to be added
|
||||
* mac - The MAC address to be added
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
|
|
@ -1546,7 +1546,7 @@ static int lpc17_addmac(struct uip_driver_s *dev, const uint8_t *mac)
|
|||
*
|
||||
* Parameters:
|
||||
* dev - Reference to the NuttX driver state structure
|
||||
* mac - The MAC address to be removed
|
||||
* mac - The MAC address to be removed
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
|
|
@ -1574,7 +1574,7 @@ static int lpc17_rmmac(struct uip_driver_s *dev, const uint8_t *mac)
|
|||
* Dump GPIO registers
|
||||
*
|
||||
* Parameters:
|
||||
* None
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
|
|
@ -1631,7 +1631,7 @@ static void lpc17_showmii(uint8_t phyaddr, const char *msg)
|
|||
* Parameters:
|
||||
* phyaddr - The device address where the PHY was discovered
|
||||
* regaddr - The address of the PHY register to be written
|
||||
* phydata - The data to write to the PHY register
|
||||
* phydata - The data to write to the PHY register
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
|
|
@ -1891,7 +1891,7 @@ static int lpc17_phymode(uint8_t phyaddr, uint8_t mode)
|
|||
* Initialize the PHY
|
||||
*
|
||||
* Parameters:
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
*
|
||||
* Returned Value:
|
||||
* None directly. As a side-effect, it will initialize priv->lp_phyaddr
|
||||
|
|
@ -1988,7 +1988,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
|
|||
#ifdef CONFIG_PHY_AUTONEG
|
||||
/* Setup the Auto-negotiation advertisement: 100 or 10, and HD or FD */
|
||||
|
||||
lpc17_phywrite(phyaddr, MII_ADVERTISE,
|
||||
lpc17_phywrite(phyaddr, MII_ADVERTISE,
|
||||
(MII_ADVERTISE_100BASETXFULL | MII_ADVERTISE_100BASETXHALF |
|
||||
MII_ADVERTISE_10BASETXFULL | MII_ADVERTISE_10BASETXHALF |
|
||||
MII_ADVERTISE_CSMA));
|
||||
|
|
@ -2146,7 +2146,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
|
|||
* Initialize the EMAC Tx descriptor table
|
||||
*
|
||||
* Parameters:
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
*
|
||||
* Returned Value:
|
||||
* None directory.
|
||||
|
|
@ -2202,7 +2202,7 @@ static inline void lpc17_txdescinit(struct lpc17_driver_s *priv)
|
|||
* Initialize the EMAC Rx descriptor table
|
||||
*
|
||||
* Parameters:
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
* priv - Pointer to EMAC device driver structure
|
||||
*
|
||||
* Returned Value:
|
||||
* None directory.
|
||||
|
|
@ -2278,7 +2278,7 @@ static void lpc17_macmode(uint8_t mode)
|
|||
if ((mode & LPC17_DUPLEX_MASK) == LPC17_DUPLEX_FULL)
|
||||
{
|
||||
/* Set the back-to-back inter-packet gap */
|
||||
|
||||
|
||||
lpc17_putreg(21, LPC17_ETH_IPGT);
|
||||
|
||||
/* Set MAC to operate in full duplex mode with CRC and Pad enabled */
|
||||
|
|
@ -2296,7 +2296,7 @@ static void lpc17_macmode(uint8_t mode)
|
|||
else
|
||||
{
|
||||
/* Set the back-to-back inter-packet gap */
|
||||
|
||||
|
||||
lpc17_putreg(18, LPC17_ETH_IPGT);
|
||||
|
||||
/* Set MAC to operate in half duplex mode with CRC and Pad enabled */
|
||||
|
|
|
|||
|
|
@ -211,14 +211,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG FS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -234,7 +234,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -242,9 +242,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -210,14 +210,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG FS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -233,7 +233,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -241,9 +241,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -210,14 +210,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG FS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -233,7 +233,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -241,9 +241,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -210,14 +210,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG FS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -233,7 +233,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -241,9 +241,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -210,14 +210,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG FS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_FS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -233,7 +233,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -241,9 +241,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -209,14 +209,14 @@ int stm32_usbhost_initialize(void)
|
|||
* Enable/disable driving of VBUS 5V output. This function must be provided be
|
||||
* each platform that implements the STM32 OTG HS host interface
|
||||
*
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
|
||||
* or, if 5 V are available on the application board, a basic power switch, must
|
||||
* be added externally to drive the 5 V VBUS line. The external charge pump can
|
||||
* be driven by any GPIO output. When the application decides to power on VBUS
|
||||
* using the chosen GPIO, it must also set the port power bit in the host port
|
||||
* control and status register (PPWR bit in OTG_HS_HPRT).
|
||||
*
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* "The application uses this field to control power to this port, and the core
|
||||
* clears this bit on an overcurrent condition."
|
||||
*
|
||||
* Input Parameters:
|
||||
|
|
@ -232,7 +232,7 @@ int stm32_usbhost_initialize(void)
|
|||
void stm32_usbhost_vbusdrive(int iface, bool enable)
|
||||
{
|
||||
DEBUGASSERT(iface == 0);
|
||||
|
||||
|
||||
if (enable)
|
||||
{
|
||||
/* Enable the Power Switch by driving the enable pin low */
|
||||
|
|
@ -240,9 +240,9 @@ void stm32_usbhost_vbusdrive(int iface, bool enable)
|
|||
stm32_gpiowrite(GPIO_OTGHS_PWRON, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
{
|
||||
/* Disable the Power Switch by driving the enable pin high */
|
||||
|
||||
|
||||
stm32_gpiowrite(GPIO_OTGHS_PWRON, true);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,11 +34,10 @@
|
|||
*
|
||||
****************************************************************************/
|
||||
|
||||
/** \file
|
||||
* \author Uros Platise
|
||||
* \brief ST LIS331DL I2C Device Driver
|
||||
**/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <assert.h>
|
||||
#include <stdlib.h>
|
||||
|
|
@ -49,9 +48,10 @@
|
|||
#include <nuttx/kmalloc.h>
|
||||
#include <nuttx/sensors/lis331dl.h>
|
||||
|
||||
/************************************************************************************
|
||||
* LIS331DL Internal Registers
|
||||
************************************************************************************/
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
/* LIS331DL Internal Registers **********************************************/
|
||||
|
||||
#define ST_LIS331DL_WHOAMI 0x0F /* who am I register */
|
||||
#define ST_LIS331DL_WHOAMI_VALUE 0x3B /* Valid result is 0x3B */
|
||||
|
|
@ -84,73 +84,100 @@
|
|||
#define ST_LIS331DL_OUT_Y 0x2B
|
||||
#define ST_LIS331DL_OUT_Z 0x2D
|
||||
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Private Data Types
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
struct lis331dl_dev_s {
|
||||
struct i2c_dev_s * i2c;
|
||||
|
||||
uint8_t address;
|
||||
struct lis331dl_vector_s a;
|
||||
uint8_t cr1;
|
||||
uint8_t cr2;
|
||||
uint8_t cr3;
|
||||
struct lis331dl_dev_s
|
||||
{
|
||||
struct i2c_dev_s *i2c;
|
||||
uint8_t address;
|
||||
struct lis331dl_vector_s a;
|
||||
uint8_t cr1;
|
||||
uint8_t cr2;
|
||||
uint8_t cr3;
|
||||
};
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/** LIS331DL Access with range check
|
||||
*
|
||||
* \param dev LIS331 DL Private Structure
|
||||
* \param subaddr LIS331 Sub Address
|
||||
* \param buf Pointer to buffer, either for read or write access
|
||||
* \param length when >0 it denotes read access, when <0 it denotes write access of -length
|
||||
* \return OK on success or errno is set.
|
||||
**/
|
||||
/****************************************************************************
|
||||
* LIS331DL Access with range check
|
||||
*
|
||||
* Input Parameters:
|
||||
* dev LIS331 DL Private Structure
|
||||
* subaddr LIS331 Sub Address
|
||||
* buf Pointer to buffer, either for read or write access
|
||||
* length When >0 it denotes read access, when <0 it denotes write access
|
||||
* of -length
|
||||
*
|
||||
* Returned Value:
|
||||
* Returns OK on success or errno is set.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int lis331dl_access(struct lis331dl_dev_s * dev, uint8_t subaddr,
|
||||
uint8_t *buf, int length)
|
||||
static int lis331dl_access(FAR struct lis331dl_dev_s *dev, uint8_t subaddr,
|
||||
FAR uint8_t *buf, int length)
|
||||
{
|
||||
uint16_t flags = 0;
|
||||
int retval;
|
||||
|
||||
if (length > 0) {
|
||||
flags = I2C_M_READ;
|
||||
uint16_t flags = 0;
|
||||
int retval;
|
||||
|
||||
if (length > 0)
|
||||
{
|
||||
flags = I2C_M_READ;
|
||||
}
|
||||
else {
|
||||
flags = I2C_M_NORESTART;
|
||||
length = -length;
|
||||
else
|
||||
{
|
||||
flags = I2C_M_NORESTART;
|
||||
length = -length;
|
||||
}
|
||||
|
||||
/* Check valid address ranges and set auto address increment flag */
|
||||
|
||||
if (subaddr == 0x0F) {
|
||||
if (length > 1) length = 1;
|
||||
/* Check valid address ranges and set auto address increment flag */
|
||||
|
||||
if (subaddr == 0x0f)
|
||||
{
|
||||
if (length > 1)
|
||||
{
|
||||
length = 1;
|
||||
}
|
||||
}
|
||||
else if (subaddr >= 0x20 && subaddr < 0x24) {
|
||||
if (length > (0x24 - subaddr) ) length = 0x24 - subaddr;
|
||||
else if (subaddr >= 0x20 && subaddr < 0x24)
|
||||
{
|
||||
if (length > (0x24 - subaddr))
|
||||
{
|
||||
length = 0x24 - subaddr;
|
||||
}
|
||||
}
|
||||
else if (subaddr >= 0x27 && subaddr < 0x2E) {
|
||||
if (length > (0x2E - subaddr) ) length = 0x2E - subaddr;
|
||||
else if (subaddr >= 0x27 && subaddr < 0x2e)
|
||||
{
|
||||
if (length > (0x2e - subaddr))
|
||||
{
|
||||
length = 0x2e - subaddr;
|
||||
}
|
||||
}
|
||||
else if (subaddr >= 0x30 && subaddr < 0x40) {
|
||||
if (length > (0x40 - subaddr) ) length = 0x40 - subaddr;
|
||||
else if (subaddr >= 0x30 && subaddr < 0x40)
|
||||
{
|
||||
if (length > (0x40 - subaddr))
|
||||
{
|
||||
length = 0x40 - subaddr;
|
||||
}
|
||||
}
|
||||
else {
|
||||
errno = EFAULT;
|
||||
return ERROR;
|
||||
else
|
||||
{
|
||||
errno = EFAULT;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
if (length > 1)
|
||||
{
|
||||
subaddr |= 0x80;
|
||||
}
|
||||
|
||||
if (length > 1) subaddr |= 0x80;
|
||||
|
||||
/* Create message and send */
|
||||
|
||||
struct i2c_msg_s msgv[2] = {
|
||||
|
||||
struct i2c_msg_s msgv[2] =
|
||||
{
|
||||
{
|
||||
.addr = dev->address,
|
||||
.flags = 0,
|
||||
|
|
@ -164,159 +191,185 @@ static int lis331dl_access(struct lis331dl_dev_s * dev, uint8_t subaddr,
|
|||
.length = length
|
||||
}
|
||||
};
|
||||
|
||||
if ( (retval = I2C_TRANSFER(dev->i2c, msgv, 2)) == OK )
|
||||
return length;
|
||||
|
||||
return retval;
|
||||
|
||||
if ((retval = I2C_TRANSFER(dev->i2c, msgv, 2)) == OK)
|
||||
{
|
||||
return length;
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
static int lis331dl_readregs(struct lis331dl_dev_s * dev)
|
||||
static int lis331dl_readregs(FAR struct lis331dl_dev_s *dev)
|
||||
{
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, 3) != 3) return ERROR;
|
||||
return OK;
|
||||
}
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, 3) != 3)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
struct lis331dl_dev_s * lis331dl_init(struct i2c_dev_s * i2c, uint16_t address)
|
||||
FAR struct lis331dl_dev_s *lis331dl_init(FAR struct i2c_dev_s *i2c,
|
||||
uint16_t address)
|
||||
{
|
||||
struct lis331dl_dev_s * dev;
|
||||
uint8_t retval;
|
||||
|
||||
ASSERT(i2c);
|
||||
ASSERT(address);
|
||||
|
||||
if ( (dev = kmalloc( sizeof(struct lis331dl_dev_s) )) == NULL ) {
|
||||
errno = ENOMEM;
|
||||
return NULL;
|
||||
FAR struct lis331dl_dev_s * dev;
|
||||
uint8_t retval;
|
||||
|
||||
ASSERT(i2c);
|
||||
ASSERT(address);
|
||||
|
||||
dev = kmalloc(sizeof(struct lis331dl_dev_s));
|
||||
if (dev == NULL)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
memset(dev, 0, sizeof(struct lis331dl_dev_s));
|
||||
dev->i2c = i2c;
|
||||
dev->address = address;
|
||||
|
||||
/* Probe device */
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_WHOAMI, &retval, 1) > 0) {
|
||||
|
||||
/* Check chip identification, in the future several more compatible parts
|
||||
* may be added here.
|
||||
*/
|
||||
|
||||
if (retval == ST_LIS331DL_WHOAMI_VALUE) {
|
||||
|
||||
/* Copy LIS331DL registers to our private structure and power-up device */
|
||||
|
||||
if (lis331dl_readregs(dev)==OK && lis331dl_powerup(dev)==OK) {
|
||||
|
||||
/* Normal exit point */
|
||||
errno = 0;
|
||||
return dev;
|
||||
|
||||
memset(dev, 0, sizeof(struct lis331dl_dev_s));
|
||||
dev->i2c = i2c;
|
||||
dev->address = address;
|
||||
|
||||
/* Probe device */
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_WHOAMI, &retval, 1) > 0)
|
||||
{
|
||||
/* Check chip identification, in the future several more compatible parts
|
||||
* may be added here.
|
||||
*/
|
||||
|
||||
if (retval == ST_LIS331DL_WHOAMI_VALUE)
|
||||
{
|
||||
/* Copy LIS331DL registers to our private structure and power-up device */
|
||||
|
||||
if (lis331dl_readregs(dev)==OK && lis331dl_powerup(dev) == OK)
|
||||
{
|
||||
/* Normal exit point */
|
||||
|
||||
errno = 0;
|
||||
return dev;
|
||||
}
|
||||
retval = errno;
|
||||
|
||||
retval = errno;
|
||||
}
|
||||
|
||||
/* Otherwise, we mark an invalid device found at given address */
|
||||
retval = ENODEV;
|
||||
|
||||
/* Otherwise, we mark an invalid device found at given address */
|
||||
|
||||
retval = ENODEV;
|
||||
}
|
||||
else {
|
||||
/* No response at given address is marked as */
|
||||
retval = EFAULT;
|
||||
else
|
||||
{
|
||||
/* No response at given address is marked as */
|
||||
|
||||
retval = EFAULT;
|
||||
}
|
||||
|
||||
/* Error exit */
|
||||
kfree(dev);
|
||||
errno = retval;
|
||||
return NULL;
|
||||
/* Error exit */
|
||||
|
||||
kfree(dev);
|
||||
errno = retval;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_deinit(struct lis331dl_dev_s * dev)
|
||||
int lis331dl_deinit(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
ASSERT(dev);
|
||||
|
||||
lis331dl_powerdown(dev);
|
||||
kfree(dev);
|
||||
|
||||
return OK;
|
||||
ASSERT(dev);
|
||||
|
||||
lis331dl_powerdown(dev);
|
||||
kfree(dev);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_powerup(struct lis331dl_dev_s * dev)
|
||||
int lis331dl_powerup(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
dev->cr1 = ST_LIS331DL_CR1_PD |
|
||||
ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
dev->cr2 = 0;
|
||||
dev->cr3 = 0;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -3) == 3) return OK;
|
||||
return ERROR;
|
||||
dev->cr1 = ST_LIS331DL_CR1_PD |
|
||||
ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
dev->cr2 = 0;
|
||||
dev->cr3 = 0;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -3) == 3)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_powerdown(struct lis331dl_dev_s * dev)
|
||||
int lis331dl_powerdown(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
dev->cr1 = ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
dev->cr2 = 0;
|
||||
dev->cr3 = 0;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -3) == 3) return OK;
|
||||
return ERROR;
|
||||
dev->cr1 = ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
dev->cr2 = 0;
|
||||
dev->cr3 = 0;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -3) == 3)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_setconversion(struct lis331dl_dev_s * dev, bool full, bool fast)
|
||||
int lis331dl_setconversion(FAR struct lis331dl_dev_s * dev, bool full, bool fast)
|
||||
{
|
||||
dev->cr1 = ST_LIS331DL_CR1_PD |
|
||||
(full ? ST_LIS331DL_CR1_FS : 0) | (fast ? ST_LIS331DL_CR1_DR : 0) |
|
||||
ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -1) == 1) return OK;
|
||||
return ERROR;
|
||||
dev->cr1 = ST_LIS331DL_CR1_PD |
|
||||
(full ? ST_LIS331DL_CR1_FS : 0) | (fast ? ST_LIS331DL_CR1_DR : 0) |
|
||||
ST_LIS331DL_CR1_ZEN | ST_LIS331DL_CR1_YEN | ST_LIS331DL_CR1_XEN;
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_CTRL_REG1, &dev->cr1, -1) == 1)
|
||||
{
|
||||
return OK;
|
||||
}
|
||||
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_getprecision(struct lis331dl_dev_s * dev)
|
||||
int lis331dl_getprecision(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
if (dev->cr1 & ST_LIS331DL_CR1_FS)
|
||||
return 9200/127; /* typ. 9.2g full scale */
|
||||
return 2300/127; /* typ. 2.3g full scale */
|
||||
if (dev->cr1 & ST_LIS331DL_CR1_FS)
|
||||
{
|
||||
return 9200/127; /* typ. 9.2g full scale */
|
||||
}
|
||||
|
||||
return 2300/127; /* typ. 2.3g full scale */
|
||||
}
|
||||
|
||||
|
||||
int lis331dl_getsamplerate(struct lis331dl_dev_s * dev)
|
||||
{
|
||||
if (dev->cr1 & ST_LIS331DL_CR1_DR)
|
||||
return 400;
|
||||
return 100;
|
||||
}
|
||||
|
||||
|
||||
const struct lis331dl_vector_s * lis331dl_getreadings(struct lis331dl_dev_s * dev)
|
||||
int lis331dl_getsamplerate(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
uint8_t retval[7];
|
||||
if (dev->cr1 & ST_LIS331DL_CR1_DR)
|
||||
{
|
||||
return 400;
|
||||
}
|
||||
|
||||
ASSERT(dev);
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_STATUS_REG, retval, 7) == 7) {
|
||||
|
||||
/* If result is not yet ready, return NULL */
|
||||
|
||||
if ( !(retval[0] & ST_LIS331DL_SR_ZYXDA) ) {
|
||||
errno = EAGAIN;
|
||||
return NULL;
|
||||
return 100;
|
||||
}
|
||||
|
||||
FAR const struct lis331dl_vector_s *
|
||||
lis331dl_getreadings(FAR struct lis331dl_dev_s * dev)
|
||||
{
|
||||
uint8_t retval[7];
|
||||
|
||||
ASSERT(dev);
|
||||
|
||||
if (lis331dl_access(dev, ST_LIS331DL_STATUS_REG, retval, 7) == 7)
|
||||
{
|
||||
/* If result is not yet ready, return NULL */
|
||||
|
||||
if (!(retval[0] & ST_LIS331DL_SR_ZYXDA))
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
dev->a.x = retval[2];
|
||||
dev->a.y = retval[4];
|
||||
dev->a.z = retval[6];
|
||||
return &dev->a;
|
||||
|
||||
dev->a.x = retval[2];
|
||||
dev->a.y = retval[4];
|
||||
dev->a.z = retval[6];
|
||||
return &dev->a;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ int close_blockdriver(FAR struct inode *inode)
|
|||
/* Verify that the inode is a block driver. */
|
||||
|
||||
if (!INODE_IS_BLOCK(inode))
|
||||
{
|
||||
{
|
||||
fdbg("inode is not a block driver\n");
|
||||
ret = -ENOTBLK;
|
||||
goto errout;
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ int find_blockdriver(FAR const char *pathname, int mountflags, FAR struct inode
|
|||
/* Verify that the inode is a block driver. */
|
||||
|
||||
if (!INODE_IS_BLOCK(inode))
|
||||
{
|
||||
{
|
||||
fdbg("%s is not a block driver\n", pathname);
|
||||
ret = -ENOTBLK;
|
||||
goto errout_with_inode;
|
||||
|
|
|
|||
|
|
@ -114,10 +114,10 @@ int umount(const char *target)
|
|||
/* Verify that the inode is a mountpoint */
|
||||
|
||||
if (!INODE_IS_MOUNTPT(mountpt_inode))
|
||||
{
|
||||
{
|
||||
errcode = EINVAL;
|
||||
goto errout_with_mountpt;
|
||||
}
|
||||
}
|
||||
|
||||
/* Unbind the block driver from the file system (destroying any fs
|
||||
* private data.
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@
|
|||
************************************************************************/
|
||||
|
||||
int sched_get_priority_min(int policy)
|
||||
{
|
||||
{
|
||||
if (policy != SCHED_FIFO && policy != SCHED_RR)
|
||||
{
|
||||
return ERROR;
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@
|
|||
int nxtk_drawlinetoolbar(NXTKWINDOW hfwnd, FAR struct nxgl_vector_s *vector,
|
||||
nxgl_coord_t width, nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
|
||||
|
||||
{
|
||||
{
|
||||
struct nxgl_trapezoid_s trap[3];
|
||||
struct nxgl_rect_s rect;
|
||||
int ret;
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@
|
|||
int nxtk_drawlinewindow(NXTKWINDOW hfwnd, FAR struct nxgl_vector_s *vector,
|
||||
nxgl_coord_t width, nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
|
||||
|
||||
{
|
||||
{
|
||||
struct nxgl_trapezoid_s trap[3];
|
||||
struct nxgl_rect_s rect;
|
||||
int ret;
|
||||
|
|
|
|||
|
|
@ -44,8 +44,8 @@ closedir(DIR);
|
|||
print(OUTPUT "#include <apps/netutils/httpd.h>\n\n");
|
||||
print(OUTPUT "#ifndef NULL\n#define NULL 0\n#endif\n\n");
|
||||
|
||||
foreach $file (@files) {
|
||||
|
||||
foreach $file (@files) {
|
||||
|
||||
if(-d $file && $file !~ /^\./) {
|
||||
print "Processing directory $file\n";
|
||||
opendir(DIR, $file);
|
||||
|
|
@ -75,8 +75,8 @@ foreach $file (@files) {
|
|||
printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
|
||||
}
|
||||
printf(OUTPUT "0x00,\n ");
|
||||
|
||||
$i = 0;
|
||||
|
||||
$i = 0;
|
||||
while(read(FILE, $data, 1)) {
|
||||
printf(OUTPUT "%#02x, ", unpack("C", $data));
|
||||
$i++;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue