drivers/net/ksz9477: Implement errata fixes
From the ksz9477 errata, setup the configuration which is tested to work. - Improve PHY receive performance - Disable EEE for ports 1-5 - Fix supply current values Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
This commit is contained in:
Jani Paalijarvi
Alan C. Assis
parent
47cd5ba279
commit
fcab00d3a8
2 changed files with 312 additions and 2 deletions
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@ -34,6 +34,9 @@
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* Pre-processor Definitions
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****************************************************************************/
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#define ERRATA_MOD1_REGS 7
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#define ERRATA_MOD9_REGS 13
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/****************************************************************************
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* Private Data
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****************************************************************************/
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@ -58,6 +61,13 @@ static uint8_t g_port_mirror_config[7] =
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#endif
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struct errata
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{
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uint8_t dev;
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uint16_t reg;
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uint16_t value;
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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@ -126,7 +136,6 @@ static int ksz9477_reg_write32(uint16_t reg, uint32_t data)
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return ksz9477_write(&write_msg);
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}
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#if 0 /* Enable when needed */
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static int ksz9477_reg_write16(uint16_t reg, uint16_t data)
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{
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int ret;
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@ -177,7 +186,6 @@ static int ksz9477_reg_write16(uint16_t reg, uint16_t data)
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return ksz9477_write(&write_msg);
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}
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#endif
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static int ksz9477_sgmii_read_indirect(uint32_t address, uint16_t *value,
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unsigned len)
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@ -213,6 +221,260 @@ static int ksz9477_sgmii_write_indirect(uint32_t address, uint16_t *value,
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return ret;
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}
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static int ksz9477_mmd_read_indirect(ksz9477_port_t port, uint16_t dev,
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uint16_t reg, uint16_t *value,
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uint16_t len)
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{
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int ret;
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/* Set up MMD device address */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_REGISTER | dev);
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if (ret != OK)
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{
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goto out;
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}
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/* Select register */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_DATA(port), reg);
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if (ret != OK)
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{
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goto out;
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}
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/* Set MMD operation mode */
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if (len <= 1)
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{
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/* no post increment */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_NO_INCREMENT | dev);
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if (ret != OK)
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{
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goto out;
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}
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}
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else
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{
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/* post increment on reads and writes */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_RW_INCREMENT | dev);
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if (ret != OK)
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{
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goto out;
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}
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}
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/* Read value */
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while (len-- && ret == OK)
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{
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ret = ksz9477_reg_read16(KSZ9477_PHY_MMD_DATA(port), value);
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value++;
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}
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out:
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return ret;
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}
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static int ksz9477_mmd_write_indirect(ksz9477_port_t port, uint8_t dev,
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uint16_t reg, const uint16_t *value,
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uint16_t len)
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{
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int ret;
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/* Set up MMD device address */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_REGISTER | dev);
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if (ret != OK)
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{
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goto out;
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}
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/* Select register */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_DATA(port), reg);
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if (ret != OK)
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{
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goto out;
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}
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/* Set MMD operation mode */
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if (len <= 1)
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{
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/* no post increment */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_NO_INCREMENT | dev);
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if (ret != OK)
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{
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goto out;
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}
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}
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else
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{
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/* post increment on reads and writes */
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_SETUP(port),
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KSZ9477_MMD_OP_MODE_RW_INCREMENT | dev);
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if (ret != OK)
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{
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goto out;
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}
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}
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/* Write value */
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while (len-- && ret == OK)
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{
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ret = ksz9477_reg_write16(KSZ9477_PHY_MMD_DATA(port), *value);
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value++;
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}
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out:
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return ret;
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}
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static int ksz9477_custom_error_fixes(ksz9477_port_t port)
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{
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int ret = OK;
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int j;
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uint16_t regval16;
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const struct errata err1[] = {
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xce, 0x0100},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xcc, 0x0ff0},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xca, 0x0141},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xcb, 0x0fcf},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xc8, 0x0010},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xd9, 0x0100},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xc9, 0x0280},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x8f, 0x6032},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x9d, 0x248c},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x75, 0x0060},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0xd3, 0x7777},
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};
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const struct errata err2[] = {
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x0, 0x9400},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x4, 0x00e2},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x6, 0x3100},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x9, 0xe01c},
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};
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const struct errata err3[] = {
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x79, 0x010a},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7a, 0x00ed},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7b, 0x00d3},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7c, 0x00bc},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7d, 0x00a8},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7e, 0x0096},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x7f, 0x0085},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x80, 0x0077},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x81, 0x006a},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x82, 0x005e},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x83, 0x0054},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x84, 0x004b},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x85, 0x0043},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x86, 0x003c},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x87, 0x0035},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x88, 0x002f},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x89, 0x002a},
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{KSZ9477_MMD_DEV_SIGNAL_QUALITY, 0x8a, 0x0026},
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};
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struct errata mod9[] = {
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x13, 0x6eff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x14, 0xe6ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x15, 0x6eff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x16, 0xe6ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x17, 0x00ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x18, 0x43ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x19, 0xc3ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x1a, 0x6fff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x1b, 0x07ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x1c, 0x0fff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x1d, 0xe7ff},
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{KSZ9477_MMD_DEV_QUIET_WIRE, 0x1e, 0xefff},
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};
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/* First turn off autoneg */
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ret = ksz9477_reg_write16(KSZ9477_PHY_CONTROL(port), 0x2100);
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if (ret != OK)
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{
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nerr("PHY Control register write failure, ret %d\n", ret);
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return ret ? ret : -EINVAL;
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}
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/* Set Remote Loopback register */
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ret = ksz9477_reg_write16(KSZ9477_PHY_REMOTE_LP(port), 0x00f0);
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if (ret != OK)
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{
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nerr("PHY Remote Loopback register write failure, ret %d\n", ret);
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return ret ? ret : -EINVAL;
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}
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/* Needed configurations for MMD Signal Quality */
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for (j = 0; ret == OK && j < 11; j++)
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{
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ret = ksz9477_mmd_write_indirect(port, err1[j].dev, err1[j].reg,
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&(err1[j].value), 1);
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}
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/* Needed configurations for MMD Quiet-WIRE */
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for (j = 0; ret == OK && j < 4; j++)
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{
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ret = ksz9477_mmd_write_indirect(port, err2[j].dev, err2[j].reg,
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&(err2[j].value), 1);
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}
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/* More configurations for MMD Signal Quality */
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for (j = 0x0; ret == OK && j < 18; j++)
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{
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ret = ksz9477_mmd_write_indirect(port, err3[j].dev, err3[j].reg,
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&(err3[j].value), 1);
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}
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/* Module 9: Set various registers to get correct supply current values */
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for (j = 0; ret == OK && j < 12; j++)
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{
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ret = ksz9477_mmd_write_indirect(port, mod9[j].dev, mod9[j].reg,
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&(mod9[j].value), 1);
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}
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/* Disable EEE */
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regval16 = 0x0;
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ret = ksz9477_mmd_write_indirect(port, KSZ9477_MMD_DEV_EEE_ADVERTISEMENT,
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0x3c, ®val16, 1);
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/* Turn on autoneg */
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ret = ksz9477_reg_write16(KSZ9477_PHY_CONTROL(port), 0x1140);
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if (ret != OK)
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{
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nerr("PHY Control register write failure, ret %d\n", ret);
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return ret ? ret : -EINVAL;
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -377,6 +639,34 @@ int ksz9477_init(ksz9477_port_t master_port)
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return ret ? ret : -EINVAL;
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}
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/* Check that indirect access to PHY MMD works.
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* Default value of MMD EEE ADVERTISEMENT REGISTER is 0x6
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*/
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ret = ksz9477_mmd_read_indirect(KSZ9477_PORT_PHY1,
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KSZ9477_MMD_DEV_EEE_ADVERTISEMENT,
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0x3c, ®val16, 1);
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if (ret != OK || regval16 != 0x6)
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{
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nerr("MMD access failure, ret %d\n", ret);
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return ret ? ret : -EINVAL;
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}
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/* Handle some erratas */
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for (i = KSZ9477_PORT_PHY1; i <= KSZ9477_PORT_PHY5; i++)
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{
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ret = ksz9477_custom_error_fixes(i);
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}
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if (ret != OK)
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{
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nerr("Errata handling failure, ret %d\n", ret);
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return ret ? ret : -EINVAL;
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}
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/* Set up SGMII port */
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if (master_port == KSZ9477_PORT_SGMII)
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{
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/* Set the switch's SGMII port into "PHY" mode and enable link */
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@ -61,6 +61,11 @@
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#define KSZ9477_PHY_CONTROL(p) KSZ9477_PORT_REG(p, 0x100)
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#define KSZ9477_PHY_STATUS(p) KSZ9477_PORT_REG(p, 0x102)
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#define KSZ9477_PHY_MMD_SETUP(p) KSZ9477_PORT_REG(p, 0x11A)
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#define KSZ9477_PHY_MMD_DATA(p) KSZ9477_PORT_REG(p, 0x11C)
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#define KSZ9477_PHY_REMOTE_LP(p) KSZ9477_PORT_REG(p, 0x122)
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/* Note! Unlike in data sheet, the indirect data register reads and
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* writes must be done with 32-bit accesses and the address is
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* 0x204
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@ -120,6 +125,21 @@
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#define SGMII_AUTONEG_CONTROL_TC_MASTER (1 << 3)
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#define SGMII_AUTONEG_CONTROL_LINK_STATUS (1 << 4)
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/* MMD device addresses */
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#define KSZ9477_MMD_DEV_SIGNAL_QUALITY 0x1
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#define KSZ9477_MMD_DEV_LED_MODE 0x2
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#define KSZ9477_MMD_DEV_EEE_ADVERTISEMENT 0x7
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#define KSZ9477_MMD_DEV_QUIET_WIRE 0x1C
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/* MMD operation modes */
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#define KSZ9477_MMD_OP_MODE_SHIFT 14
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#define KSZ9477_MMD_OP_MODE_REGISTER (0 << KSZ9477_MMD_OP_MODE_SHIFT)
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#define KSZ9477_MMD_OP_MODE_NO_INCREMENT (1 << KSZ9477_MMD_OP_MODE_SHIFT)
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#define KSZ9477_MMD_OP_MODE_RW_INCREMENT (2 << KSZ9477_MMD_OP_MODE_SHIFT)
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#define KSZ9477_MMD_OP_MODE_W_INCREMENT (3 << KSZ9477_MMD_OP_MODE_SHIFT)
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/* Port Mirroring Control Register */
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#define KSZ9477_PORT_MIRROR_CONTROL(p) KSZ9477_PORT_REG(p, 0x800)
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