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92 commits

Author SHA1 Message Date
lipengfei28
1013faac30 pci: epf test default a function 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2025-08-16 19:49:08 +08:00
lipengfei28
4fa6d4b791 drivers/pci: epc add dma heap 
The PCI inbound address space and the CPU cache need to maintain cache coherence

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2025-08-01 20:47:43 +08:00
p-szafonimateusz
880c8e5d26 drivers/net: add IGB network card support 
Add support for Intel IGB type of network cards.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2025-07-08 10:02:15 +02:00
Lars Kruse
3ce85ca54e style: fix spelling in code comments and strings 2025-05-23 10:48:41 +08:00
p-szafonimateusz
fab4f68b6f drivers/usbhost: add xHCI support 
add xHCI PCI driver (usbhost).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2025-05-15 21:58:57 +08:00
chao an
60636c4666 drivers/pci: fix typo addres -> address 
fix typo addres -> address

Signed-off-by: chao an <anchao@lixiang.com>
 2024-12-17 20:48:07 +08:00
p-szafonimateusz
7b8f01f2da drivers/can: add CTU CAN FD driver (qemu only) 
Add CTU CAN FD driver for qemu only:
https://www.qemu.org/docs/master/system/devices/can.html#ctu-can-fd-support-examples

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-12-13 11:19:22 +08:00
p-szafonimateusz
033f203e2a drivers/can: add Kvaser PCI card driver (qemu only) 
add Kvaser PCI card driver support, works only with QEMU now:

https://www.qemu.org/docs/master/system/devices/can.html#examples-how-to-use-can-emulation-for-sja1000-based-boards

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-12-13 11:19:22 +08:00
lipengfei28
aa1df4e9a9 pci: fix pci dev alloc bridge mem error 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-12-06 21:12:24 +08:00
lipengfei28
f589d5a4c7 pci: pci res have pci addr and cpu addr, ecam use map translation pci 
addr to cpuaddr

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
lipengfei28
b44fb53b61 pci:map bar should not be zaro len 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
lipengfei28
c2cd503f66 pci: add /dev/pci,used for pciutils 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-11-29 11:12:54 +08:00
Bowen Wang
eede50f465 pci_ivshmem: return back to polling mode when interrupt mode invalid 
Improve the pci ivshmem device compatibility, do not return error when
irq mode init failed, fallback to the polling mode as mush as possible.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-11-17 08:40:26 +01:00
raiden00pl
6fcfe7cf03 drivers/pci: fix style issues in function headers 
fix style issues in function headers, add missing new lines
 2024-11-15 01:04:10 +08:00
Alin Jerpelea
286d37026c drivers: migrate to SPDX identifier 
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2024-11-06 18:02:25 +08:00
ouyangxiangzhen
17c51c0667 userspace: Exclude nuttx/arch.h 
This patch fixed userspace headers conflict. Architecture-related definition and API should not be exposed to users.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
 2024-11-01 16:59:37 +08:00
YAMAMOTO Takashi
761ee81956 move readv/writev to the kernel 
currently, nuttx implements readv/writev on the top of read/write.
while it might work for the simplest cases, it's broken by design.
for example, it's impossible to make it work correctly for files
which need to preserve data boundaries without allocating a single
contiguous buffer. (udp socket, some character devices, etc)

this change is a start of the migration to a better design.
that is, implement read/write on the top of readv/writev.

to avoid a single huge change, following things will NOT be done in
this commit:

* fix actual bugs caused by the original readv-based-on-read design.
  (cf. https://github.com/apache/nuttx/pull/12674)

* adapt filesystems/drivers to actually benefit from the new interface.
  (except a few trivial examples)

* eventually retire the old interface.

* retire read/write syscalls. implement them in libc instead.

* pread/pwrite/preadv/pwritev (except the introduction of struct uio,
  which is a preparation to back these variations with the new
  interface.)
 2024-10-30 17:07:54 +08:00
yezhonghui
317d7a7f59 Fix make warn as error in pci drivers 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-10-21 15:35:39 +08:00
lipengfei28
e259aba31c fix build error shift-count-overflow 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-18 17:23:41 +08:00
yezhonghui
72e7935431 Fix disable msi when msi capability not exist issue 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-10-16 17:12:34 +08:00
Bowen Wang
143466baed drivers/pci: fix pci framework warning in 32bit chip 
In file included from pci/pci.c:30:
pci/pci.c: In function 'pci_setup_device':
pci/pci.c:449:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  449 |           pci_write_config_dword(dev, base_address_1, res->start >> 32);
      |                                                                  ^~
pci/pci.c: In function 'pci_presetup_bridge':
pci/pci.c:541:51: warning: right shift count >= width of type [-Wshift-count-overflow]
  541 |                              ctrl->mem_pref.start >> 32);
      |                                                   ^~
pci/pci.c: In function 'pci_postsetup_bridge':
pci/pci.c:604:57: warning: right shift count >= width of type [-Wshift-count-overflow]
  604 |                              (ctrl->mem_pref.start - 1) >> 32);
      |                                                         ^~
CC:  pthread/pthread_release.c pci/pci_ecam.c:71:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int *)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int *)'} [-Wincompatible-pointer-types]
   71 |   .read  = pci_ecam_read_config,
      |            ^~~~~~~~~~~~~~~~~~~~
pci/pci_ecam.c:71:12: note: (near initialization for 'g_pci_ecam_ops.read')
pci/pci_ecam.c:72:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int)'} [-Wincompatible-pointer-types]
   72 |   .write = pci_ecam_write_config,

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-13 02:28:32 +08:00
wangyongrong
ad2e6fb2ba pci_ivshmem.c: ivshmem_support_irq API support 
ivshmem based driver can use this api to judge weather current
ivshmem device support irq or not, and use polling mode or irq
mode to process the event.

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
 2024-10-12 12:13:23 +08:00
Bowen Wang
313d6df787 include/nuttx.h: replace all the align macros to nuttx version 
1. add IS_ALIGNED()  definitions for NuttX;
2. replace all the ALIGN_UP() and ALIGN_DOWN() to use common
   align implementation;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-11 16:55:43 +08:00
lipengfei28
15126945cd qemu_epc_get_msi: flag should use msi enable flag 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 15:07:37 +08:00
lipengfei28
42041a428c include/nuttx.h: add common align definitions for nuttx 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 13:52:01 +08:00
lipengfei28
4ebf830bbd userspace: Exclude nuttx/arch.h 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 13:52:01 +08:00
Bowen Wang
acbe19d744 pci_drivers: move qemu edu and test device header content to pci_drivers.h 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-10-09 13:52:01 +08:00
lipengfei28
1ce6ec7c65 declare pci_dev_register 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 13:52:01 +08:00
lipengfei28
bc6cd326b8 pci test drv is pci rc drv not pci ep drv 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-09 13:52:01 +08:00
yezhonghui
c90b654598 release msi/msix irq clean capability struct 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-10-08 23:47:45 +08:00
lipengfei28
fa5fef2b95 pci: msi and msix irq need release irq 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-10-08 18:04:13 +08:00
Xiang Xiao
0f918c8d4d pci/ivshmem: Check drv isn't NULL before calling remove 
since the device mayn't bind to the driver yet

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2024-10-05 12:05:13 -03:00
Xiang Xiao
6685fb5434 pci/ivshmem: Skip unregistering ivshmem driver 
since ivshmem device may insert again

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2024-10-05 12:05:13 -03:00
yezhonghui
85591fc360 pci alloc mis irq support new interface 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-09-30 15:41:28 +08:00
yezhonghui
6b3f51986d pci ep support msi/msi-x test 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-09-29 22:50:59 +02:00
yezhonghui
786dabfb13 QemuEPC multi function verify for pci 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-09-28 13:39:50 +08:00
yezhonghui
db19d00e64 QemuEPC support multi function for pci device 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-09-28 13:39:50 +08:00
lipengfei28
39ec3291ee armv7a pci irq support 
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-09-28 13:34:33 +08:00
Bowen Wang
6d4cab62fd pci/pci_ecam: add read_io/write_io for pci ecam 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-09-28 13:34:33 +08:00
yezhonghui
f6db814804 pci: add pci endpoint test driver 
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
 2024-09-28 13:13:37 +08:00
Bowen Wang
e706805c8b drivers/pci: one pci device should only associate with one driver 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-09-27 17:12:09 +08:00
Bowen Wang
d6f4d0a20a drivers/pci: change all devfn type to unsigned int 
Now all the type of devfn in pci framework are unsigned int

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-09-27 17:12:09 +08:00
Yongrong Wang
2756045b07 pci.c: fix compile warning 
pci/pci.c:1128:15: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~
      |                                               |
      |                                               uint32_t {aka long unsigned int}
pci/pci.c:1128:30: note: format string is defined here
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |                             ~^
      |                              |
      |                              unsigned int
      |                             %lx

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
 2024-09-27 17:12:09 +08:00
p-szafonimateusz
860bd3ad6f drivers/pci_qemu_test.c: fix compiler warning 
pci/pci_qemu_test.c:218:6: warning: ‘ops’ may be used uninitialized [-Wmaybe-uninitialized]
  218 |   ops->write(dev->bus, &hdr->test, num, sizeof(num));
      |   ~~~^~~~~~~
pci/pci_qemu_test.c: In function ‘pci_qemu_test_probe’:
pci/pci_qemu_test.c:286:41: note: ‘ops’ was declared here
  286 |   FAR const struct pci_qemu_test_ops_s *ops;
      |

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
 2024-09-27 17:12:09 +08:00
wangyongrong
e4be747cf5 pci.c: fix pci 32bit warning 
pci/pci.c:863:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  863 |       pci_write_config_dword(dev, msi + PCI_MSI_ADDRESS_HI, (mar >> 32));

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
 2024-09-27 17:12:09 +08:00
Bowen Wang
0f3feefa85 drivers/pci/pci.c: fix warning when CONFIG_PCI_ASSIGN_ALL_BUSES=n 
pci/pci.c:415:34: warning: variable ‘res’ set but not used [-Wunused-but-set-variable]
  415 |       FAR struct pci_resource_s *res;
      |                                  ^~~
pci/pci.c: In function ‘pci_scan_bus’:
pci/pci.c:663:32: warning: unused variable ‘ctrl’ [-Wunused-variable]
  663 |   FAR struct pci_controller_s *ctrl = bus->ctrl;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-09-27 17:12:09 +08:00
Bowen Wang
fd182dad64 drivers/pci: add error handle for pci_alloc_bus/device() 
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
 2024-09-27 14:12:11 +08:00
wangyongrong
e8f6b1e695 pci.c: fix judge err in pci_connect_irq 
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
 2024-09-27 14:12:11 +08:00
wangyongrong
6cec175c9d pci.c：fix ops not implement after calling panic err 
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
 2024-09-27 14:12:11 +08:00
lipengfei28
8e3c024bdb msi_set:Message Control Register for MSI:bit3:bit1 used for 
Multiple Message Capable

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
 2024-09-27 10:37:31 +08:00