Commit graph

44 commits

Author SHA1 Message Date
lipengfei28
4fa6d4b791 drivers/pci: epc add dma heap
The PCI inbound address space and the CPU cache need to maintain cache coherence

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2025-08-01 20:47:43 +08:00
Lars Kruse
3ce85ca54e style: fix spelling in code comments and strings 2025-05-23 10:48:41 +08:00
lipengfei28
aa1df4e9a9 pci: fix pci dev alloc bridge mem error
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-12-06 21:12:24 +08:00
lipengfei28
f589d5a4c7 pci: pci res have pci addr and cpu addr, ecam use map translation pci
addr to cpuaddr

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-11-29 11:12:54 +08:00
raiden00pl
6fcfe7cf03 drivers/pci: fix style issues in function headers
fix style issues in function headers, add missing new lines
2024-11-15 01:04:10 +08:00
ouyangxiangzhen
17c51c0667 userspace: Exclude nuttx/arch.h
This patch fixed userspace headers conflict. Architecture-related definition and API should not be exposed to users.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2024-11-01 16:59:37 +08:00
Bowen Wang
143466baed drivers/pci: fix pci framework warning in 32bit chip
In file included from pci/pci.c:30:
pci/pci.c: In function 'pci_setup_device':
pci/pci.c:449:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  449 |           pci_write_config_dword(dev, base_address_1, res->start >> 32);
      |                                                                  ^~
pci/pci.c: In function 'pci_presetup_bridge':
pci/pci.c:541:51: warning: right shift count >= width of type [-Wshift-count-overflow]
  541 |                              ctrl->mem_pref.start >> 32);
      |                                                   ^~
pci/pci.c: In function 'pci_postsetup_bridge':
pci/pci.c:604:57: warning: right shift count >= width of type [-Wshift-count-overflow]
  604 |                              (ctrl->mem_pref.start - 1) >> 32);
      |                                                         ^~
CC:  pthread/pthread_release.c pci/pci_ecam.c:71:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int *)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t *)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int *)'} [-Wincompatible-pointer-types]
   71 |   .read  = pci_ecam_read_config,
      |            ^~~~~~~~~~~~~~~~~~~~
pci/pci_ecam.c:71:12: note: (near initialization for 'g_pci_ecam_ops.read')
pci/pci_ecam.c:72:12: warning: initialization of 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, unsigned int,  int,  int,  long unsigned int)'} from incompatible pointer type 'int (*)(struct pci_bus_s *, uint32_t,  int,  int,  uint32_t)' {aka 'int (*)(struct pci_bus_s *, long unsigned int,  int,  int,  long unsigned int)'} [-Wincompatible-pointer-types]
   72 |   .write = pci_ecam_write_config,

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-13 02:28:32 +08:00
wangyongrong
24b0fa0072 pci.h: add pci_write/read_mmio_qword support
1. optimize the macro, add () for the marco arguments;
2. add pci_write_mmio_qword() and pci_read_mmio_qword() api;

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-12 12:16:25 +08:00
wangyongrong
ad2e6fb2ba pci_ivshmem.c: ivshmem_support_irq API support
ivshmem based driver can use this api to judge weather current
ivshmem device support irq or not, and use polling mode or irq
mode to process the event.

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-12 12:13:23 +08:00
Bowen Wang
acbe19d744 pci_drivers: move qemu edu and test device header content to pci_drivers.h
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-09 13:52:01 +08:00
Alin Jerpelea
cd2fcf5252 include: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-10-04 08:18:42 +08:00
yezhonghui
85591fc360 pci alloc mis irq support new interface
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-30 15:41:28 +08:00
yezhonghui
db19d00e64 QemuEPC support multi function for pci device
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:39:50 +08:00
Bowen Wang
0e3a96a398 include/pci.h: sync the subvendor/subdevice type in id table and pci_device_s
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-28 13:34:33 +08:00
yezhonghui
f6db814804 pci: add pci endpoint test driver
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:13:37 +08:00
yanghuatao
41d0eaa892 toolchain/ghs: Fix ?? "trigraphs not allowed" warnings
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 263: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
                                                                    ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 264: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
                                                                   ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 266: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
                                                                               ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 267: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
                                                                                 ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 268: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
                                                                                       ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 269: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_DATA_REGISTER              7       /* (??) */

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
97740fca2c include/pci_regs: add PCI_STD_NUM_BARS macro
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
lipengfei28
0bf2c9c514 pci_epf_driver_s use FAR const struct pci_epf_ops_s *ops
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
9d425eb521 pci epc mem use virtual mem
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
aa3568f353 pci epf use epc_node link to epc
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
06a5103838 pci_epf_device_s and pci_epc_ctrl_s add priv data
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 10:37:31 +08:00
lipengfei28
57d736b149 add epf test drv
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 08:52:59 +08:00
lipengfei28
56f57e5f9b add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-27 00:10:19 +08:00
lipengfei28
1eb151bef6 add pci_bus_map_region and pci_map_region macro
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-26 16:23:18 +08:00
wangyongrong
3b09de844f pci.h: add pci_map_bar_region support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-26 16:23:18 +08:00
wangyongrong
381e7f225d pci.c: add pci_read/write_io_qword support
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-09-26 00:00:03 +08:00
yangshuyong
a537ecdd0f Support nuttx pci endpoint driver framework
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
p-szafonimateusz
51909ed59f drivers: fix gcc14 errors for PCI
fix gcc14 errors for PCI

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
Xiang Xiao
1d586c3bee pci: Add driver_data to pci_device_id_s
so driver writer could save the private data here
and get it back in the probe function.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
db6d0bd356 drivers/pci: add MSI/MSI-X support
Add support for MSI and MSI-X in PCI framework

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
Bowen Wang
218210d26e pci/pci_ivshmem: add pci ivshmem driver support
Add common ivshmem driver, provide the ivshmem bus mechisam, so
many ivshmem based driver can change to pci_ivshmem based

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-10 14:34:31 +08:00
lipengfei28
dba7700813 pci: add rom addr and rom size to resource
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
3250625a15 pci: add find device from bus
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
9dc9500aaf pci add register drivers
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
c25f839b06 pci: add pci bus find capability interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
45f1597562 pci: add pci read/write config/io space interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
d9c8838319 pci: use g_pci_ctrl_list replace g_root_bus_list
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
75f8c72dbb drivers/pci/pci_qemu_edu: update qemu edu driver code
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
9c07b369e9 drivers/pci/pci_qemu_test: update qemu pci test code
Change the qmeu pci test code for new pci driver framework

Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
7cbb7d36d8 Changed the x86 64 pci driver
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
125884ae95 Changed the pci bus for arm architecture
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
simbit18
360c2fc44c fix nxstyle
Remove TABs
fix Relative file path does not match actual file.
2024-05-15 21:53:59 +08:00
raiden00pl
a12fdd8876 cosmetic changes after pci code rebase 2024-01-25 09:09:30 -08:00
Brennan Ashton
69ed5bb67d Various fixes for PCI work
Squashed commits:

1. Porting prior PCI work in place of jailhouse code

At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.

Running QEMU with this configuration we see the bridge and the
device on the bridge.  It also detected the qemu test device

qemu-system-x86_64 \
  -cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
  --enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
  -device pci-testdev \
  -device pci-bridge,id=bridge0,chassis_nr=2 \
  -device e1000,bus=bridge0,addr=0x3

qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000

2. Remove unused CONFIG_PCI_MAX_BDF option

3. Add a workaround for Jailhouse pci scanning

4. Extend BAR parsing and handle PIO and MMIO for pci-testdev

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

5. PCI: Add initial support for QEMU 'edu' test device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

6. Bring up PCI later in boot process

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

7. Add ISR and DMA support to QEMU edu test pci device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

8. Fix bad function prototype definition in qemu_edu

9. intel64:  Add a pci test configuration and instructions

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

10. PCI: Fix issue in identification of 64bit bar

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2024-01-25 09:09:30 -08:00