Commit graph

23890 commits

Author SHA1 Message Date
wangchengdong
b92e0b6730 arch: fix alignment bug for archs that need stack alignment
These archs only align the size of the stack, forgeting to do the
 stack start addr alignment, this patch fixes it.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-18 11:11:32 -03:00
Michal Lenc
6ec759706d arch/arm/samv7: enable USART peripherals for SAMx7xJ series
SAME70J and SAMV70J series (64 pin packages) have two USART peripherals
and three UART peripherals. Ensure USART peripherals are enabled.

This is consistent with datasheet, USART0 also physically tested
on SAME70J21 MCU.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-09-18 11:05:56 +02:00
Sergey Rzhevsky
59f3a37b83 cmake/stm32h7: Add LTDC support to CMakeLists.txt
Adds conditional compilation of the stm32_ltdc.c file to the source list
(SRCS) for STM32H7 architecture when the CONFIG_STM32H7_LTDC option is
enabled in the configuration.

Signed-off-by: Sergey Rzhevsky <rzsa@yandex.ru>
2025-09-18 10:14:24 +02:00
wangchengdong
49bb96bd3a arch: fix stack alignment bug for arm and tricore arch
The stack alignment operation in tricore and arm porting
   only aligns the size of the stack, forget to align the start addr
   of the stack, this patch fixes it.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-18 13:45:38 +08:00
wangchengdong
5d80cf7b83 arch/tricore: remove magic number in tricore_checkstack.c
before:
  |   start = (alloc + 3) & ~3;
  |   end   = (alloc + size) & ~3;
  after:
  |   start = STACK_ALIGN_UP((uintptr_t)alloc);
  |   end   = STACK_ALIGN_DOWN((uintptr_t)alloc + size);

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-16 09:18:30 -03:00
wangchengdong
d4efae2494 arch/Kconfig: Add condition checking in Kconfig source statement
Add condition checking in Kconfig source statement, for example:

    source "arch/arm/Kconfig" is updated to:

    if ARCH_ARM
    source "arch/arm/Kconfig"
    endif

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-16 09:34:56 +02:00
Jukka Laitinen
36168dd244 arch/risc-v/mpfs: Add ARCH_HAVE_ELF_EXECUTABLE for MPFS
This enables compiling fully linked apps for mpfs in CONFIG_BUILD_KERNEL

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-09-15 11:29:01 -04:00
Jukka Laitinen
724c44b1e9 arch/arm64/imx9: Add ARCH_HAVE_ELF_EXECUTABLE for IMX9
This enables compiling fully linked apps for imx9 in CONFIG_BUILD_KERNEL

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-09-15 11:29:01 -04:00
wangchengdong
71f558765c arch/tricore: add tasking compiler support to gen raw/hex binary
tasking compiler toolset does not provide binary generate tool,
  but the open source gcc compiler is able to do this, this patch will
  use tricore-elf-objcopy to generate raw binary and hex file when using
  tasking compiler to do the compiling and linking.

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-15 01:44:39 +08:00
Filipe Cavalcanti
662c1e0bbb boards/xtensa: update board and defconfigs for Wi-Fi on ESP32|S2|S3
Updates the defconfigs and board source to support driver refactor.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
Filipe Cavalcanti
20ff68bd65 arch/xtensa: refactor Wi-Fi driver for ESP32|S2|S3
Fixes low and inconsistent bandwidth issues.
Adds new configuration options for buffer management.
Moves code around to make the implementation cleaner and easier to debug.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
Matteo Golin
903b6b168e bcm2711/i2c: Implement I2C support for all user-accessible interfaces
Initial I2C implementation such that I2C sending and receiving now
works well enough to use the BMP280 driver for a BMP280 device connected
to any of I2C0-I2C6 on the default pins. I2CTOOL also works for these
interfaces.

Functionality for "no stop" and "no start" options is not present.
Implementing that is not clear from the peripheral datasheet and will be
a challenge.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2025-09-14 10:40:36 +08:00
wangchengdong
778f3fa39c arch/tricore: allow user defined compiler path
prefix compiler with ${TOOLCHAIN_PREFIX}

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-12 10:08:45 +02:00
chao an
3c4b099189 arch/arm/armv8-m: stack pointer should be 8-byte aligned in signal context
Since the alignment of the signal context is affected by XCPTCONTEXT_SIZE in
different Kconfig,  sometimes the stack pointer is not aligned to 8 bytes, this
is not what the software and compiler expect, for example,  if va_list() obtains
wide data of type long long, the offset will be wrong, So in this commit, we set
stack-aligned the base offset so that the correct offset will be set during context
restoration.

1. test code:
|            void signal_handler(int signo, siginfo_t *info, void *context) {
|                long long ttt = 1024000;
|                printf("%lld\n", ttt);
|            }
|
|            struct itimerspec its = {   .it_value.tv_sec  = 1,
|                .it_value.tv_nsec = 0,
|                .it_interval.tv_sec  = 1,
|                .it_interval.tv_nsec = 0
|            };
|
|            int main(int argc, FAR char *argv[])
|            {
|                struct sigevent evp;
|                timer_t timer_id;
|
|                memset(&evp, 0, sizeof(evp));
|                evp.sigev_notify          = SIGEV_SIGNAL | SIGEV_THREAD_ID;
|                evp.sigev_signo           = SIGALRM;
|                evp.sigev_notify_thread_id = gettid();
|
|                timer_create(CLOCK_REALTIME, &evp, &timer_id);
|
|
|                struct sigaction sa;
|                memset(&sa, 0, sizeof(sa));
|                sa.sa_sigaction = signal_handler;
|                sa.sa_flags = SA_SIGINFO;
|                sigemptyset(&sa.sa_mask);
|
|                sigaction(SIGALRM, &sa, NULL);
|
|                timer_settime(timer_id, 0, &its, NULL);
|
|                while (1)
|                    sleep(1);
|
|                return 0;
|            }

2. before this change:

|            NuttShell (NSH) NuttX-12.10.0
|            nsh> hello
|            4398046527890440
|            4398046527890472
|            4398046527890504
|            4398046527890536

3. after this change:

|            NuttShell (NSH) NuttX-12.10.0
|            nsh> hello
|            1024000
|            1024000
|            1024000
|            1024000

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-09-11 11:21:30 -03:00
nuttxs
a5b810bdb1 Kconfig: Add configurable Stack Canaries protection levels.
Introduce a configurable stack-protection level for the existing
CONFIG_STACK_CANARIES, instead of hard-coding -fstack-protector-all.
Add Kconfig choice STACK_CANARIES_LEVEL four selectable levels:

 -fstack-protector
 -fstack-protector-strong
 -fstack-protector-all (default)
 -fstack-protector-explicit

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-09-11 19:56:42 +08:00
Eren Terzioglu
e148048ac2 arch/risc-v/esp32c6: Add RTC GPIO support for esp32c6
Add RTC GPIO support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-09-11 10:57:18 +02:00
Eren Terzioglu
70dc59a5e6 arch/risc-v/esp32c6: Add lpcore support
Add lpcore support for esp32c6

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-09-11 10:57:18 +02:00
wangchengdong
abf7a74e6a arch/tricore: fix tasking compiler linking error
Add "add_link_options(--no-default-libraries)" ToolchainTasking.cmake
  Add "LDFLAGS += --no-default-libraries" in ToolchainTasking.defs

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-10 12:18:53 +08:00
Lars Kruse
4db757c9a6 arch/arm/rp2040: merge conflicting definitions of hw_* functions
The functions `hw_write_masked` and `hw_xor_bits` (as defined in
pico-sdk) were defined in NuttX twice.
Additionally these definitions were in conflict (one lacked the
`volatile` modifier).

Now these functions and their dependencies are defined in a new header
file.
Its name is based on the filename of the original definition in
pico-sdk:

  src/rp2_common/hardware_base/include/hardware/address_mapped.h

This change should fix the potential issue of GPIO operations failing
due to compiler optimizations caused by the absence of `volatile`.

Signed-off-by: Lars Kruse <devel@sumpfralle.de>
2025-09-10 09:46:04 +08:00
wangchengdong
e272181007 arm/armv8-r: remove redundant and misleading pointer in arm_syscall()
replace **running_task with *running_task, and updated several other places
 accordingly

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-09 23:49:17 +08:00
raiden00pl
40690a9951 arch/sim/sim_canchar.c: fix CAN flags decoding for message
fix CAN flags decoding for SIM CAN

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-09-08 21:47:48 +08:00
raiden00pl
67eb2bfd29 arch/sim/can: add loopback support for CAN character dev
add loopback support for sim CAN character dev

Signed-off-by: raiden00pl <raiden00@railab.me>
2025-09-08 21:41:18 +08:00
wangchengdong
df9b525174 arch/tricore: remove duplicated local variable in tricore_doirq()
remove duplicated tcb loval variable in tricore_doirq()

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-08 19:36:16 +08:00
wangchengdong
627729635b arch/tricore: remove redundant and misleading pointer usage in tricore_doirq()
'struct tcb_s **running_task = &g_running_tasks[this_cpu()];'
  was updated to
 'struct tcb_s *running_task = g_running_tasks[this_cpu()];'

  'if (*running_task != NULL)
    {
     ( *running_task)->xcp.regs = regs;
    }'

    was updated to

  'if (running_task != NULL)
    {
      running_task->xcp.regs = regs;
    }'

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-07 13:17:57 -04:00
Filipe Cavalcanti
ed751889de arch/xtensa/esp32: Update E-Fuse driver
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
65d5f9bc8f arch/xtensa/esp32s2: Update E-Fuse driver
Updates E-Fuse driver for ESP32S2, sharing a common implementation for Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
23faaa29f7 arch/xtensa/esp32s3: Update E-Fuse driver
Updates E-Fuse driver for ESP32S3, now sharing a common implementation across
Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
d5f674d967 arch/xtensa: add common driver for E-Fuse on Espressif devices
Adds a common E-Fuse driver to be used by Espressif Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
1d51cfbda7 arch/xtensa: add sys_startup_fn call
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
wangchengdong
c36c9f87d8 arch/tricore: add one_shot .tick_start implementation
.tick_start is better in terms of performance than .start for one shot,
  so provide this .tick_start implementation

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-04 08:35:14 -03:00
Filipe Cavalcanti
42254ffcbe arch/risc-v: improve E-Fuse support for ESP32-C3|C6|H2
This commit fixes E-Fuse driver to get proper block and bit offset.
Also adds support for virtual and flash E-Fuses.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-03 09:01:44 -03:00
wangchengdong
f44766611a arch/tricore: fix tricore_doirq function local var "regs" not initialized issue
In tricore_doirq, local variable regs is firstly used without initiazlied, this is a bug

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2025-09-03 00:52:38 +08:00
hujun5
f59510ec62 armv[7/8]-r: add ARM_BUSY_WAIT
On a system with multiple CPU cores, when the system is powered on,
multiple cores may start running simultaneously. In this case, software
is required to handle the startup logic for multi-core synchronization.
One approach is to use global variables.
however, the global variable region may not have been initialized yet.
In such scenarios, we can use a busywait flag to
implement the synchronization strategy.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2025-09-01 22:58:36 +08:00
hujun5
c0db55f453 armv7a: change ARMV7A_SMP_BUSY_WAIT to ARM_BUSY_WAIT
On a system with multiple CPU cores, when the system is powered on,
multiple cores may start running simultaneously. In this case, software
is required to handle the startup logic for multi-core synchronization.
One approach is to use global variables.
however, the global variable region may not have been initialized yet.
In such scenarios, we can use a busywait flag to
implement the synchronization strategy.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2025-09-01 22:58:36 +08:00
Alan Carvalho de Assis
0547aa5c6c arch/arm/imxrt: Modify USB EHCI driver to support two USBs
Some iMXRT chips like iMXRT-1050 has two USB controllers, but until
now only USB1 was supported. This patch modify the driver to support
both USBs.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-09-01 22:58:01 +08:00
adriendesp
8fea354a0f arch/xmc4 : fix serial buffer size for unused channel
Give the user the full control over the USIC FIFO buffer even if USIC channel 0 is disabled.
When USICx_CHAN0 is not an UART but USICx_CHAN1 is, the user can set the desired FIFO buffer offsets in CHAN1 config.
2025-08-29 12:43:52 -03:00
Serg Podtynnyi
52d1877e2e boards/arm/rp23xx/common: update board reset via BOOTROM functions
Update board reset with BOOTROM functions calls
 - normal reboot
 - reboot to bootloader

normal reboot and reboot bootloader now possible from nsh

Port of https://github.com/apache/nuttx/pull/16848

Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
2025-08-28 11:04:08 -03:00
Filipe Cavalcanti
1f7c3a32e5 arch/risc-v: refactor Wi-Fi driver for ESP32-C3|C6
Fixes low and inconsistent bandwidth issues.
Adds new configuration options for buffer management.
Moves code around to make the implementation cleaner and easier to debug.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-08-28 21:52:03 +08:00
wangchengdong
a3e5ae9600 arch/tricore/src/common/tricore_irq.c: add up_affinity_irq
Add up_affinity_irq to tricore arch
2025-08-28 15:21:39 +08:00
v-tangmeng
fec6e248b9 fix ld unrecognized option '-g3'
ld: unrecognized option '-g3'
ld: use the --help option for usage information

Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
2025-08-28 15:21:05 +08:00
Michal Lenc
47cd5ba279 arch/arm/src/samv7/sam_emac.c: fix compile warning
The following warning occurred if ARCH_CHIP_PIC32CZCA70 option was
selected. The variable is not used in case of PIC32CZ CA70 series.

CC:  task/task_getgroup.c chip/sam_emac.c: In function ‘sam_emac_initialize’:
chip/sam_emac.c:4758:12: warning: unused variable ‘regval’ [-Wunused-variable]
 4758 |   uint32_t regval;
      |

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-08-26 14:02:13 +02:00
Jukka Laitinen
5c7c7f8ca3 arch/arm/src/stm32f7/stm32_ethernet.c: Fix "unused variable" warning
Fix build warning when CONFIG_STM32F7_AUTONEG is not set

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2025-08-26 14:01:47 +02:00
wangchengdong
28206007e0 board/tricore: rename tc397 chip board name
"tc397" is a chip name which is not appropriate to act as a board name.
 the board supported here is actually "a2g-tc397-5v-tft".
 The correct definition is : tricore is arch name, tc3xx is arch family
 name, tc397 is chip name and the borad name is a2g-tc397-5v-tft
2025-08-26 16:09:34 +08:00
Jukka Laitinen
3cf28dd0b2 arch/arm64/src/imx9/imx9_lpi2c.c: Fix bus reset
imx9_lpi2c_reset didn't quite work. It tried to toggle scl line as GPIO, but the line was not even muxed properly.

Instead, set the bus to relaxed mode, and drive address 0 to the bus. This toggles the clock, and also generates start and stop sequences on the bus.

"Relaxed mode" is a new feature on the LPI2C block used in imx93.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2025-08-26 09:39:33 +08:00
Michal Lenc
5d21aa823e arch/arm/src/samv7: support progmem for pic32czca70 series
There were missing ifdef conditions for pic32czca70 series.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2025-08-25 16:44:24 -03:00
Jukka Laitinen
4baad0aa22 arch/risc-v/src/mpfs/mpfs_clockconfig.c: Flag out code only used in bootloader
This removes the need to have all the DDR/clock configuration related
"LIBERODEFS" flags defined, when not building a standalone/coldboot
configuration

All of this code is unused when not building with CONFIG_MPFS_BOOTLOADER

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2025-08-25 23:37:55 +08:00
Thiago Finelon
e87c43b798 arch/xtensa/esp32s3: Add EXT1 wakeup support in power management
Introduce EXT1 wakeup functionality to the ESP32-S3 power management
subsystem. With this feature, the ESP32-S3 can wake up from PM_STANDBY
or PM_SLEEP when one or more RTC GPIOs trigger the EXT1 condition.

Changes include:
- Added EXT1 wakeup configuration and preparation logic in rtc code.
- Integrated EXT1 handling in pmstandby() and pmsleep().
- New board-level Kconfig options under ESP32-S3 DevKit menu:
  - CONFIG_PM_EXT1_WAKEUP: enable EXT1 wakeup support
  - CONFIG_PM_EXT1_WAKEUP_RTC_GPIO<n>: select RTC GPIOs as wake sources
  - CONFIG_PM_EXT1_WAKEUP_TRIGGER_MODE: choose wakeup on HIGH or LOW level
- Fixing Kconfig style
- Fixing comments standard
- Adding PM documentation for esp32s3-devkit

Impact:
- No build impact unless CONFIG_PM_EXT1_WAKEUP is enabled.
- When enabled, ESP32-S3 can wake from low-power states via RTC GPIOs.
- No new public API introduced; controlled via board Kconfig.

Tested on ESP32-S3 DevKit:
- Configured GPIO4 and GPIO5 as EXT1 wake sources.
- Verified wakeup from light sleep and deep sleep on external signals.
- Wakeup reason correctly reported as EXT1.

Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
2025-08-24 11:32:10 -03:00
Jukka Laitinen
67d0b975a5 arch/arm64/gicv3: Improve initialization in warm reboot case
- In case of warm reboot, clear active and pending interrupts from GICv3
and also from the CPU interface.
- Fix default IGROUPMODR to the reset value (0)
- Move gic_wait_rwp calls to after modifying ICENABLER
- Improve some comments

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-08-24 11:31:37 -03:00
Jukka Laitinen
80cb2cf9c6 arch/xtensa/esp32,esp32s3: Start the "spiflash_op" thread with correct affinity
Set the affinity of the task before activating it. There is no parameter
or other interface in "kthread_create" to set the affinity mask,
like in "pthread_create".

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-08-22 15:46:47 -03:00
lipengfei28
d45dfb8a9e arch/arm64: porting config iomux use scmi form arm imx95
pinctrl use same format scmi and config regs

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2025-08-22 20:54:05 +08:00