Commit graph

5807 commits

Author SHA1 Message Date
Bowen Wang
280538adc6 virtio/virtio.h: add virtqueue lock api for better use
Later, we will change all virtio driver to use the new api

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-06 08:37:53 +08:00
Bowen Wang
84d2aae63b virtio-mmio: add secure virtio mmio device register api
In secure state, call virtio_register_mmio_device_secure() to
register the secure virtio mmio device;
In non-secure state, call virtio_register_mmio_device() to
register the non-secure virtio mmio device;
Board should ensure not mixed use the secure and non-seucre mmio
device.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-06 08:37:53 +08:00
anjiahao
a613bcb7cb modlib:add new dump api to modlib
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-05 15:22:02 +08:00
anjiahao
a9cb28cd23 modlib:Standardized module loading method
1. use '__attribute__((constructor))' mark initialize function
2. use '__attribute__((destructor))' mark uninitialize function
3. compile module with -fvisibility=hidden. use `__attribute__((visibility("default")))`
mark is need export symbol.so not need module_initialize to initialize export symbol.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-05 15:22:02 +08:00
hujun5
b4cc9fb11b sched: change nxsched_islocked_global to nxsched_islocked_tcb
reason:
1 To improve efficiency, we mimic Linux's behavior where preemption disabling is only applicable to the current CPU and does not affect other CPUs.
2 In the future, we will implement "spinlock+sched_lock", and use it extensively. Under such circumstances, if preemption is still globally disabled, it will seriously impact the scheduling efficiency.
3 We have removed g_cpu_lockset and used irqcount in order to eliminate the dependency of schedlock on critical sections in the future, simplify the logic, and further enhance the performance of sched_lock.
4 We set lockcount to 1 in order to lock scheduling on all CPUs during startup, without the need to provide additional functions to disable scheduling on other CPUs.
5 Cpu1~n must wait for cpu0 to enter the idle state before enabling scheduling because it prevents CPUs1~n from competing with cpu0 for the memory manager mutex, which could cause the cpu0 idle task to enter a wait state and trigger an assert.

size nuttx
before:
   text    data     bss     dec     hex filename
 265396   51057   63646  380099   5ccc3 nuttx
after:
   text    data     bss     dec     hex filename
 265184   51057   63642  379883   5cbeb nuttx

size -216

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
   -machine virt,virtualization=on,gic-version=3 \
   -net none -chardev stdio,id=con,mux=on -serial chardev:con \
   -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-05 13:49:55 +08:00
Alin Jerpelea
cd2fcf5252 include: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-10-04 08:18:42 +08:00
Bowen Wang
7afbcc1a62 drivers/vhost: add vhost framework for NuttX
virtio is a framework to implement the virtio drivers
vhost (Virtual Host) is a framework to implement the virtio devices
With the virtio and vhost framework, we can use the virtio drivers
and vhost drivers to implement the cross-core communication.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-03 17:37:40 +08:00
Yongrong Wang
d0e4c4436e rpmsg_virtio: move rpmsg virtio cmd definition before the resource table
use reserved[2] in struct resource_table as the command, avoid the
resource table format do not follow the standard.

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-10-03 09:37:24 +08:00
zhaohaiyang1
534114395e char driver CAN: add tx_confirm function in upperCAN driver.
add tx_confirm function in upperCAN driver1

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-02 21:22:07 +08:00
dongjiuzhu1
a367657d2d sched/semaphore: support recursive write for same process in sem_rw lock
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-10-02 01:56:46 +08:00
zhaohaiyang1
2ebfdf737c add the ability that control CAN transceiver state.
add the ability that control CAN transceiver state in nuttx.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-01 21:48:50 +08:00
zhaohaiyang1
3382752b40 nuttx/can: add can controller state setting and getting in uppercan.
add can controller state setting and getting in uppercan.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-01 21:48:50 +08:00
anjiahao
f2bdfa43e1 coredump:Add a coreudmp api to watch custom variables
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-01 20:40:28 +08:00
anjiahao
60796a7063 coredump:add const to memory region struct ptr
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-01 20:40:28 +08:00
zhaohaiyang1
32b25849fe chardriver upperCAN: support to independent set TX/RX FIFO size.
support to independent set TX/RX FIFO size.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-01 20:38:31 +08:00
xuxingliang
7044b10c88 task: use get_task_name where possible
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-10-01 20:38:06 +08:00
buxiasen
43176bbade pm: pm_idle add support for SMP
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-09-30 20:23:11 +08:00
xuxingliang
6d0180f12e assert: cleanup assert handler
1. extract dump from assert main flow
2. use OSINIT_PANIC for fatal error.
3. fix the method to judge kernel thread.

Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
2024-09-30 18:43:35 +08:00
anjiahao
ee07a269af fs/ioctl:add FIOC_XIPBASE to get file xip address
in tmpfs/romfs, we can get file real xip address to execute program

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-09-30 18:25:46 +08:00
yangsong8
7d570182be usbdev: add usb APIs for polling mode
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2024-09-30 16:27:21 +08:00
yangsong8
b319c27f03 serial: Added APIs for receiving and sending multiple chars
Signed-off-by: yangsong8 <yangsong8@xiaomi.com>
2024-09-30 16:27:21 +08:00
zhangkai25
bf50899637 Allocate fifosize on demand to optimize memory
Signed-off-by: zhangkai25 <zhangkai25@xiaomi.com>
2024-09-30 15:46:58 +08:00
yezhonghui
85591fc360 pci alloc mis irq support new interface
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-30 15:41:28 +08:00
dulibo1
f1fc53d7da gpio:add feature for gpio wakeup
1.add pin type to cfg gpio as wake up source
2.add IOEXPANDER_OPTION_WAKEUPCFG for set wake up option

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-09-30 08:45:37 +08:00
yangyalei
3e6ba4c17c audio: add AUDIO_MSG_IOERR msg to meida service
Signed-off-by: yangyalei <yangyalei@xiaomi.com>
2024-09-30 08:43:22 +08:00
anjiahao
29e4e71167 modlib/dlfcn:unify same code
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-09-29 15:06:54 +08:00
dongjiuzhu1
fc1aefbeb3 libc/modlib: free memory resource when rmmod elf
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-29 15:06:54 +08:00
dongjiuzhu1
1f1d90de1c binfmt/modlib: support loading each sections to different memory for Relocate object
The feature depends on ARCH_USE_SEPARATED_SECTION
the different memory area has different access speed and cache
capability, so the arch can custom allocate them based on
section names to achieve performance optimization

test:
sim:elf
sim:sotest

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-29 15:06:54 +08:00
hujun5
9de9f8168d sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-29 08:54:51 +08:00
hujun5
4c69bb8cc7 arch: inline up_switch_context,in arm arm64
reason:
when a context switch occurs, up_switch_context is executed.
In order to reduce the time taken for context switching,
we inline the up_switch_context function.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-28 19:08:15 +08:00
chenxiaoyi
065046b2a2 serial: use hostfs read/write on stdio as uart
This is used to implement serial console on instruction set simulator (ISS).

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2024-09-28 13:53:06 +08:00
yezhonghui
db19d00e64 QemuEPC support multi function for pci device
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:39:50 +08:00
Bowen Wang
0e3a96a398 include/pci.h: sync the subvendor/subdevice type in id table and pci_device_s
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-28 13:34:33 +08:00
yezhonghui
f6db814804 pci: add pci endpoint test driver
Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
2024-09-28 13:13:37 +08:00
yangguangcai
9a84484df5 capture:add multiple register.
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2024-09-28 13:11:52 +08:00
yangguangcai
fd47add2a3 capture:add CAPIOC_ALL for ioctl.
When monitoring multiple capture channels, the `ioctl` function
is called three times, leading to significant overhead mainly due
to VFS and `nxmutex_lock/unlock`. Adding a new interface can save
the overhead of two `ioctl` calls.

Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2024-09-28 13:11:52 +08:00
Bowen Wang
23a4a23397 devicetree/fdt_pci: implement the fdt_pci_ecam_register()
So the borad level do not need implement the
pci_ecam_register_from_fdt() again and again.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-28 11:51:33 +08:00
nuttxs
c0403ed768 1.xtensa/esp32s3: configure the number of universal management
(IEEE) MAC addresses when there are multipleinterfaces.
2.Optimize Lan9250 to adapt to ESP32S3 universalMAC address.
2024-09-28 11:47:24 +08:00
dulibo1
9d8991dd29 power:add BATIO_OPRTN_CHARGER_STATE for gauge sync charger state.
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 11:25:17 +08:00
liangdongdong
5238f2c200 feature: charge: Add battery operate
Signed-off-by: liangdongdong<liangdongdong@xiaomi.com>
2024-09-28 11:25:17 +08:00
dulibo1
797df22802 power:add default protocol for the driver which not impl get_protocol
add default protocol for the driver which not impl get_protocol

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 11:25:17 +08:00
yinshengkai
d888df9673 note: add ringbuffer aligned access handle
Fix ubsan warning that writes need to be aligned to memory boundaries when writing data

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-09-28 11:08:39 +08:00
dulibo1
e5e4e3030e power:add extern for public function prototypes
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-09-28 11:03:48 +08:00
dulibo1
347154c01e clk:optimized the clk_set_rate for mux
clk_mux_determine_rate->clk_get_parent_by_index

this path consume time too much

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2024-09-28 10:38:55 +08:00
yanghuatao
ae4865cf54 nuttx/timers: Fix green hills build timer.h error
"/mnt/yang/qixinwei_commit/nuttx/include/nuttx/timers/timer.h", line 257: error #223-D:
          function DEBUGASSERT declared implicitly
    DEBUGASSERT(lower->ops->tick_getstatus);

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-27 23:45:27 +08:00
guoshichao
03cabdb102 armv7-m/irq: fix the greenhills compiler compile error
CXX:  libcxxmini/libxx_new.cxx "/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

make[1]: *** [Makefile:69: libxx_delete_sized.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make[1]: *** [Makefile:69: libxx_deletea_sized.o] Error 1
make[1]: *** [Makefile:69: libxx_new.o] Error 1
"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

"/home/guoshichao/work_profile/vela_os/vela_qemu_1/nuttx/include/arch/armv7-m/irq.h", line 594: error #3422:
          use of the "register" storage class specifier is not allowed
    register uint32_t sp;
    ^

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-09-27 19:37:24 +08:00
yanghuatao
41d0eaa892 toolchain/ghs: Fix ?? "trigraphs not allowed" warnings
"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 263: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SEL_MASK        0x1e00  /* Data select (??) */
                                                                    ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 264: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_CTRL_DATA_SCALE_MASK      0x6000  /* Data scale (??) */
                                                                   ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 266: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_PPB_EXTENSIONS             6       /* PPB support extensions (??) */
                                                                               ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 267: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_PPB_B2_B3                 0x40    /* Stop clock when in D3hot (??) */
                                                                                 ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 268: warning #1695-D:
          trigraphs not allowed
  #define  PCI_PM_BPCC_ENABLE               0x80    /* Bus power/clock control enable (??) */
                                                                                       ^

"/mnt/yang/qixinwei_vela_warnings_04_23/nuttx/include/nuttx/pci/pci_regs.h", line 269: warning #1695-D:
          trigraphs not allowed
  #define PCI_PM_DATA_REGISTER              7       /* (??) */

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-27 17:12:09 +08:00
Bowen Wang
97740fca2c include/pci_regs: add PCI_STD_NUM_BARS macro
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-27 17:12:09 +08:00
zhangkai25
bfd6185f4a add adc_receive_all just for adc_dma
Description: No longer transmitting data to fifo in a loop, complete transmission in one go

Signed-off-by: zhangkai25 <zhangkai25@xiaomi.com>
2024-09-27 14:42:45 +08:00
zhangkai25
b584b38983 add adc_fifo_size when it over 300
Signed-off-by: zhangkai25 <zhangkai25@xiaomi.com>
2024-09-27 14:42:45 +08:00