Commit graph

6 commits

Author SHA1 Message Date
Lup Yuen Lee
9c1e0d3d64 CI: Split the Build Jobs for Arm64 and x86_64
This PR creates the new CI Build Jobs `arm64-01` and `x86_64-01`. The new jobs will split and offload the Arm64 and x86_64 Build Targets from `other`. This will reduce our usage of GitHub Runners, to comply with the ASF Policy for GitHub Actions. (Recently we see more PRs for Arm64 and x86_64)

Before the Split: Simple PRs (One Arch and/or One Board) for Arm64 and x86_64 require almost 1 hour for CI Build
- `other` (57 mins): AVR, SPARC, x86, PinePhone, QEMU Arm64, QEMU x86_64

After the Split: Simple PRs for Arm64 and x86_64 will complete under 30 mins
- `other` (24 mins): AVR, SPARC, x86
- `arm64-01` (29 mins): PinePhone, QEMU Arm64
- `x86_64-01` (9 mins): QEMU x86_64

To skip more unnecessary builds: Our Build Rules `arch.yml` shall ignore the label "Area: Documentation", so that a Simple PR + Docs is still a Simple PR. Previously we experienced longer CI Build Times, just because we added docs to our Simple PR. (Now our PR shall be built exactly like a Simple PR)

The updated CI code is explained here: https://github.com/apache/nuttx/issues/13775
2024-10-20 09:49:13 +08:00
simbit18
2f8560e838 tools/ci: enable avr32dev1 build
removed in the tools/ci/testlist/other.dat file the entries
 -avr32dev1:nsh
 -avr32dev1:ostest

avr32_bringup.c
Fix  Error: ./avr32_bringup.c:54:4: error: #warning "Not Implemented"

comment out directive '#warning'
/* #warning "Not Implemented" */

avr_doirq.c

fix avr32/avr_doirq.c:117: error: assignment discards qualifiers from pointer target type
  regs = g_current_regs; -> regs = (uint32_t *)g_current_regs;
2024-07-12 00:39:21 +08:00
xuxin19
7207e5d1e9 tools/ci:enable arm64 CMake ci build
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-27 07:27:17 -08:00
qinwei1
e77b06721b arch: arm64: ARMv8-A support for NuttX
N/A

Summary:

Arm64 support for NuttX, Features supported:

1. Cortex-a53 single core and SMP support: it's can run into nsh shell at
   qemu virt machine.

2. qemu-a53 board configuration support: it's only for evaluate propose

3. FPU support for armv8-a: FPU context switching at NEON/floating-point
  TRAP is supported.

4. psci interface, armv8 cache operation(data cache) and smccc support.

5. fix mass code style issue, thank for @xiaoxiang781216, @hartmannathan @pkarashchenko

Please refer to boards/arm64/qemu/qemu-a53/README.txt for detail

Note:
1. GCC MACOS issue
The GCC 11.2 toolchain for MACOS may get crash while compiling
float operation function, the following link describe the issue
and give analyse at the issue:

https://bugs.linaro.org/show_bug.cgi?id=5825

it's seem GCC give a wrong instruction at certain machine which
without architecture features

the new toolchain is not available still, so just disable the MACOS
cibuild check at present

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2022-07-14 09:35:49 -04:00
zouboan
ad3f16358e enable sparc's daily ci and eliminate some warnings 2022-02-03 14:43:21 +01:00
Brennan Ashton
15b99d1f4b CI: Migrate ci tooling from testing repository to main os repo 2021-04-05 01:22:48 -05:00