989 lines
26 KiB
C
989 lines
26 KiB
C
/****************************************************************************
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* arch/arm/src/cxd32xx/cxd32_serial.c
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#ifdef CONFIG_SERIAL_TERMIOS
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# include <termios.h>
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#endif
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial/serial.h>
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#include <nuttx/spinlock.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "arm_internal.h"
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#include "hardware/cxd32_uart.h"
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#include "cxd32_config.h"
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#include "cxd32_serial.h"
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#include "cxd32_uart.h"
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/****************************************************************************
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* Pre-processor definitions
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****************************************************************************/
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/* If we are not using the serial driver for the console, then we still must
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* provide some minimal implementation of up_putc.
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*/
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#if defined(USE_SERIALDRIVER) && defined(HAVE_UART)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uintptr_t uartbase; /* Base address of UART registers */
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uint32_t basefreq; /* Base frequency of input clock */
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uint32_t baud; /* Configured baud */
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uint32_t ier; /* Saved IER value */
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uint8_t id; /* ID=0,1,2,3 */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (5,6,7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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bool iflow; /* input flow control (RTS) enabled */
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#endif
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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bool oflow; /* output flow control (CTS) enabled */
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#endif
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#ifdef HAVE_RS485
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bool dtrdir; /* DTR pin is the direction bit */
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#endif
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void *pmhandle;
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spinlock_t lock;
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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static void up_set_format(struct uart_dev_s *dev);
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#endif
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupt(int irq, void *context, void *arg);
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static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int up_receive(struct uart_dev_s *dev, unsigned int *status);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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static bool up_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.ioctl = up_ioctl,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.rxflowcontrol = NULL,
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#endif
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txempty,
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};
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/* I/O buffers */
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#ifdef CONFIG_CXD32_UART0
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static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
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static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
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#endif
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/* This describes the state of the CXD32xx uart0 port. */
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#ifdef CONFIG_CXD32_UART0
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static struct up_dev_s g_uart0priv =
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{
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.uartbase = CXD32_UART0_BASE,
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.basefreq = CXD32_UART_BASEFREQ,
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.baud = CONFIG_UART0_BAUD,
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.id = 1,
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.irq = CXD32_IRQ_UART0,
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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.stopbits2 = CONFIG_UART0_2STOP,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.iflow = false, /* flow control is not supported */
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#endif
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#ifdef CONFIG_SERIAL_OFLOWCONTROL
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.oflow = false, /* flow control is not supported */
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#endif
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};
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static uart_dev_t g_uart0port =
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{
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.recv =
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{
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart0priv,
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};
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# define TTYS0_DEV g_uart0port /* UART0=ttyS0 */
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#endif
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/* Which UART with be tty0/console and which tty1? tty2? tty3? */
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#ifdef HAVE_CONSOLE
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# if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port /* UART0=console */
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# endif
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#endif /* HAVE_CONSOLE */
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_serialin
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****************************************************************************/
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static inline uint32_t up_serialin(struct up_dev_s *priv, int offset)
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{
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return getreg32(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout
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****************************************************************************/
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static inline void up_serialout(struct up_dev_s *priv, int offset,
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uint32_t value)
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{
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putreg32(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_disableuartint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv,
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uint32_t *ier)
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{
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irqstate_t flags;
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flags = spin_lock_irqsave(&priv->lock);
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if (ier)
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{
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*ier = priv->ier & UART_INTR_ALL;
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}
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priv->ier &= ~UART_INTR_ALL;
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up_serialout(priv, CXD32_UART_IMSC, priv->ier);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t ier)
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{
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irqstate_t flags;
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flags = spin_lock_irqsave(&priv->lock);
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priv->ier |= ier & UART_INTR_ALL;
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up_serialout(priv, CXD32_UART_IMSC, priv->ier);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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/****************************************************************************
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* Name: up_enablebreaks
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****************************************************************************/
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static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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{
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uint32_t lcr = up_serialin(priv, CXD32_UART_LCR_H);
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if (enable)
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{
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lcr |= UART_LCR_BRK;
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}
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else
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{
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lcr &= ~UART_LCR_BRK;
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}
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up_serialout(priv, CXD32_UART_LCR_H, lcr);
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}
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/****************************************************************************
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* Name: up_set_format
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*
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* Description:
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* Set the serial line format and speed.
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*
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****************************************************************************/
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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static void up_set_format(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t lcr;
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uint32_t cr;
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uint32_t cr_en;
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irqstate_t flags;
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flags = spin_lock_irqsave(&priv->lock);
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/* Get the original state of control register */
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cr = up_serialin(priv, CXD32_UART_CR);
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cr_en = cr & UART_CR_EN;
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cr &= ~UART_CR_EN;
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/* Disable until the format bits and baud rate registers are updated */
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up_serialout(priv, CXD32_UART_CR, cr);
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/* Set the BAUD divisor */
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cxd32_setbaud(priv->uartbase, priv->basefreq, priv->baud);
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/* Set up the LCR */
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lcr = up_serialin(priv, CXD32_UART_LCR_H);
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lcr &= ~(UART_LCR_WLEN(8) | UART_LCR_STP2 | UART_LCR_EPS | UART_LCR_PEN);
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if ((5 <= priv->bits) && (priv->bits < 8))
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{
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lcr |= UART_LCR_WLEN(priv->bits);
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}
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else
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{
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lcr |= UART_LCR_WLEN(8);
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}
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if (priv->stopbits2)
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{
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lcr |= UART_LCR_STP2;
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}
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if (priv->parity == 1)
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{
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lcr |= (UART_LCR_PEN);
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}
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else if (priv->parity == 2)
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{
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lcr |= (UART_LCR_PEN | UART_LCR_EPS);
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}
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up_serialout(priv, CXD32_UART_LCR_H, lcr);
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/* CXD32 does not have CTS/RTS pin, so these are disabled */
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cr &= ~(UART_CR_RTSEN | UART_CR_CTSEN);
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up_serialout(priv, CXD32_UART_CR, cr | cr_en);
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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#endif /* CONFIG_SUPPRESS_UART_CONFIG */
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/****************************************************************************
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* Name: up_setup
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*
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* Description:
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* Configure the UART baud, bits, parity, fifos, etc. This method is
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* called the first time that the serial port is opened.
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*
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t lcr;
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uint32_t cr;
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cxd32_uart_setup(priv->id);
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/* Init HW */
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up_serialout(priv, CXD32_UART_CR, 0);
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up_serialout(priv, CXD32_UART_LCR_H, 0);
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up_serialout(priv, CXD32_UART_DMACR, 0);
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up_serialout(priv, CXD32_UART_RSR_ECR, 0xf);
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/* Set up the IER */
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priv->ier = up_serialin(priv, CXD32_UART_IMSC);
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/* Configure the UART line format and speed. */
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up_set_format(dev);
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/* Set interrupt FIFO level */
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up_serialout(priv, CXD32_UART_IFLS, 0);
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/* Clear all interrupts */
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up_serialout(priv, CXD32_UART_ICR, 0x7ff);
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/* Enable FIFO and UART in the last */
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lcr = up_serialin(priv, CXD32_UART_LCR_H);
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lcr |= UART_LCR_FEN;
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up_serialout(priv, CXD32_UART_LCR_H, lcr);
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cr = up_serialin(priv, CXD32_UART_CR);
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cr |= UART_CR_RXE | UART_CR_TXE | UART_CR_EN;
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up_serialout(priv, CXD32_UART_CR, cr);
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#endif
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return OK;
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}
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/****************************************************************************
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* Name: up_shutdown
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*
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* Description:
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* Disable the UART. This method is called when the serial port is closed
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*
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****************************************************************************/
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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/* Disable further interrupts from the UART */
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up_disableuartint(priv, NULL);
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/* Put the UART hardware back its reset state */
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switch (priv->id)
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{
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case 0:
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case 1:
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case 2:
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break;
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default:
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break;
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}
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}
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/****************************************************************************
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* Name: up_attach
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*
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* Description:
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* Configure the UART to operation in interrupt driven mode.
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* This method is called when the serial port is opened.
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* Normally, this is just after the the setup() method is called,
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* however, the serial console may operate in a non-interrupt driven mode
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* during the boot phase.
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*
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* RX and TX interrupts are not enabled when by the attach method (unless
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* the hardware supports multiple levels of interrupt enabling).
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* The RX and TX interrupts are not enabled until the txint() and rxint()
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* methods are called.
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*
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****************************************************************************/
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static int up_attach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int ret;
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/* Attach and enable the IRQ */
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ret = irq_attach(priv->irq, up_interrupt, dev);
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if (ret == OK)
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{
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/* Enable the interrupt (RX and TX interrupts are still disabled
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* in the UART
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*/
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up_enable_irq(priv->irq);
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}
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return ret;
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}
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/****************************************************************************
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* Name: up_detach
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*
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* Description:
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* Detach UART interrupts. This method is called when the serial port is
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* closed normally just before the shutdown method is called.
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* The exception is the serial console which is never shutdown.
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*
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****************************************************************************/
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static void up_detach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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}
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/****************************************************************************
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* Name: up_rxflowcontrol
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*
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* Description:
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* Called when Rx buffer is full (or exceeds configured watermark levels
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* if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is defined).
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* Return true if UART activated RX flow control to block more incoming
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* data
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*
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* Input parameters:
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* dev - UART device instance
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* nbuffered - the number of characters currently buffered
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* (if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is
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* not defined the value will be 0 for an empty buffer or the
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* defined buffer size for a full buffer)
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* upper - true indicates the upper watermark was crossed where
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* false indicates the lower watermark has been crossed
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*
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* Returned Value:
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* true if RX flow control activated.
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*
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****************************************************************************/
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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static bool up_rxflowcontrol(struct uart_dev_s *dev,
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unsigned int nbuffered, bool upper)
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{
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up_rxint(dev, !upper);
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return true;
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}
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#endif /* CONFIG_SERIAL_IFLOWCONTROL */
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/****************************************************************************
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* Name: up_interrupt
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*
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* Description:
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* This is the UART interrupt handler. It will be invoked when an
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* interrupt is received on the 'irq'. It should call uart_xmitchars or
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* uart_recvchars to perform the appropriate data transfers. The
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* interrupt handling logic must be able to map the 'arg' to the
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* appropriate uart_dev_s structure in order to call these functions.
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*
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****************************************************************************/
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static int up_interrupt(int irq, void *context, void *arg)
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{
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struct uart_dev_s *dev = (struct uart_dev_s *)arg;
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struct up_dev_s *priv;
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uint32_t status;
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int passes;
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priv = (struct up_dev_s *)dev->priv;
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/* Loop until there are no characters to be transferred or,
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* until we have been looping for a long time.
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*/
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for (passes = 0; passes < 256; passes++)
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{
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/* Get the current UART status and check for loop
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* termination conditions
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*/
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status = up_serialin(priv, CXD32_UART_MIS);
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if (status == 0)
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{
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return OK;
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}
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up_serialout(priv, CXD32_UART_ICR, status);
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if (status & UART_INTR_RI)
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{
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}
|
|
|
|
if (status & UART_INTR_CTS)
|
|
{
|
|
}
|
|
|
|
if (status & UART_INTR_DCD)
|
|
{
|
|
}
|
|
|
|
if (status & UART_INTR_DSR)
|
|
{
|
|
}
|
|
|
|
if (status & (UART_INTR_RX | UART_INTR_RT))
|
|
{
|
|
uart_recvchars(dev);
|
|
}
|
|
|
|
if (status & UART_INTR_TX)
|
|
{
|
|
uart_xmitchars(dev);
|
|
}
|
|
|
|
if (status & UART_INTR_FE)
|
|
{
|
|
}
|
|
|
|
if (status & UART_INTR_PE)
|
|
{
|
|
}
|
|
|
|
if (status & UART_INTR_BE)
|
|
{
|
|
}
|
|
|
|
if (status & UART_INTR_OE)
|
|
{
|
|
}
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_ioctl
|
|
*
|
|
* Description:
|
|
* All ioctl calls will be routed through this method
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|
{
|
|
struct inode *inode = filep->f_inode;
|
|
struct uart_dev_s *dev = inode->i_private;
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
int ret = OK;
|
|
|
|
switch (cmd)
|
|
{
|
|
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
|
|
case TIOCSERGSTRUCT:
|
|
{
|
|
struct up_dev_s *user = (struct up_dev_s *)arg;
|
|
if (!user)
|
|
{
|
|
ret = -EINVAL;
|
|
}
|
|
else
|
|
{
|
|
memcpy(user, dev, sizeof(struct up_dev_s));
|
|
}
|
|
}
|
|
break;
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_TERMIOS
|
|
case TCGETS:
|
|
{
|
|
struct termios *termiosp = (struct termios *)arg;
|
|
irqstate_t flags;
|
|
|
|
if (!termiosp)
|
|
{
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
|
|
termiosp->c_cflag = ((priv->parity != 0) ? PARENB : 0) |
|
|
((priv->parity == 1) ? PARODD : 0) |
|
|
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
|
((priv->oflow) ? CCTS_OFLOW : 0) |
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
|
((priv->iflow) ? CRTS_IFLOW : 0) |
|
|
#endif
|
|
((priv->stopbits2) ? CSTOPB : 0);
|
|
|
|
cfsetispeed(termiosp, priv->baud);
|
|
|
|
switch (priv->bits)
|
|
{
|
|
case 5:
|
|
termiosp->c_cflag |= CS5;
|
|
break;
|
|
|
|
case 6:
|
|
termiosp->c_cflag |= CS6;
|
|
break;
|
|
|
|
case 7:
|
|
termiosp->c_cflag |= CS7;
|
|
break;
|
|
|
|
case 8:
|
|
default:
|
|
termiosp->c_cflag |= CS8;
|
|
break;
|
|
}
|
|
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
break;
|
|
|
|
case TCSETS:
|
|
{
|
|
struct termios *termiosp = (struct termios *)arg;
|
|
irqstate_t flags;
|
|
|
|
if (!termiosp)
|
|
{
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
|
|
switch (termiosp->c_cflag & CSIZE)
|
|
{
|
|
case CS5:
|
|
priv->bits = 5;
|
|
break;
|
|
|
|
case CS6:
|
|
priv->bits = 6;
|
|
break;
|
|
|
|
case CS7:
|
|
priv->bits = 7;
|
|
break;
|
|
|
|
case CS8:
|
|
default:
|
|
priv->bits = 8;
|
|
break;
|
|
}
|
|
|
|
if ((termiosp->c_cflag & PARENB) != 0)
|
|
{
|
|
priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2;
|
|
}
|
|
else
|
|
{
|
|
priv->parity = 0;
|
|
}
|
|
|
|
priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0;
|
|
|
|
#ifdef CONFIG_SERIAL_OFLOWCONTROL
|
|
priv->oflow = (termiosp->c_cflag & CCTS_OFLOW) != 0;
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
|
priv->iflow = (termiosp->c_cflag & CRTS_IFLOW) != 0;
|
|
#endif
|
|
priv->baud = cfgetispeed(termiosp);
|
|
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
|
|
/* Configure the UART line format and speed. */
|
|
|
|
up_set_format(dev);
|
|
}
|
|
break;
|
|
#endif
|
|
|
|
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
|
|
{
|
|
irqstate_t flags = spin_lock_irqsave(&priv->lock);
|
|
up_enablebreaks(priv, true);
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
break;
|
|
|
|
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
|
|
{
|
|
irqstate_t flags;
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
up_enablebreaks(priv, false);
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
break;
|
|
|
|
case TCFLSH: /* Flush TX fifo etc. */
|
|
{
|
|
while (!up_txempty(dev));
|
|
}
|
|
break;
|
|
|
|
default:
|
|
ret = -ENOTTY;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_receive
|
|
*
|
|
* Description:
|
|
* Called (usually) from the interrupt level to receive one
|
|
* character from the UART. Error bits associated with the
|
|
* receipt are provided in the return 'status'.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_receive(struct uart_dev_s *dev, unsigned int *status)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
uint32_t rbr;
|
|
|
|
rbr = up_serialin(priv, CXD32_UART_DR);
|
|
*status = rbr & 0xf00;
|
|
return rbr & 0xff;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable RX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
irqstate_t flags;
|
|
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= (UART_INTR_RX | UART_INTR_RT);
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
priv->ier &= ~(UART_INTR_RX | UART_INTR_RT);
|
|
}
|
|
|
|
up_serialout(priv, CXD32_UART_IMSC, priv->ier);
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxavailable
|
|
*
|
|
* Description:
|
|
* Return true if the receive fifo is not empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_rxavailable(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, CXD32_UART_FR) & UART_FLAG_RXFE) == 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_send
|
|
*
|
|
* Description:
|
|
* This method will send one byte on the UART
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_send(struct uart_dev_s *dev, int ch)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_serialout(priv, CXD32_UART_DR, (uint32_t)ch);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable TX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_txint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
irqstate_t flags;
|
|
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= UART_INTR_TX;
|
|
up_serialout(priv, CXD32_UART_IMSC, priv->ier);
|
|
|
|
/* Fake a TX interrupt here by just calling uart_xmitchars() with
|
|
* interrupts disabled (note this may recurse).
|
|
*/
|
|
|
|
# ifdef CONFIG_SMP
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
# endif
|
|
uart_xmitchars(dev);
|
|
# ifdef CONFIG_SMP
|
|
flags = spin_lock_irqsave(&priv->lock);
|
|
# endif
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
priv->ier &= ~UART_INTR_TX;
|
|
up_serialout(priv, CXD32_UART_IMSC, priv->ier);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&priv->lock, flags);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txready
|
|
*
|
|
* Description:
|
|
* Return true if the tranmsit fifo is not full
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txready(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, CXD32_UART_FR) & UART_FLAG_TXFF) == 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txempty
|
|
*
|
|
* Description:
|
|
* Return true if the transmit fifo is empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txempty(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
uint32_t rbr = 0;
|
|
rbr = up_serialin(priv, CXD32_UART_FR);
|
|
return (((rbr & UART_FLAG_TXFE) != 0) && ((rbr & UART_FLAG_BUSY) == 0));
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: arm_serialinit
|
|
*
|
|
* Description:
|
|
* Performs the low level UART initialization early in debug so that the
|
|
* serial console will be available during boot up. This must be called
|
|
* before arm_serialinit.
|
|
*
|
|
* NOTE: Configuration of the CONSOLE UART was performed by up_lowsetup()
|
|
* very early in the boot sequence.
|
|
*
|
|
****************************************************************************/
|
|
|
|
#ifdef USE_EARLYSERIALINIT
|
|
void arm_earlyserialinit(void)
|
|
{
|
|
/* Configuration whichever one is the console */
|
|
|
|
# ifdef CONSOLE_DEV
|
|
CONSOLE_DEV.isconsole = true;
|
|
up_setup(&CONSOLE_DEV);
|
|
# endif
|
|
}
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: arm_serialinit
|
|
*
|
|
* Description:
|
|
* Register serial console and serial ports. This assumes that
|
|
* arm_earlyserialinit was called previously.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void arm_serialinit(void)
|
|
{
|
|
#ifdef CONSOLE_DEV
|
|
uart_register("/dev/console", &CONSOLE_DEV);
|
|
#endif
|
|
#ifdef TTYS0_DEV
|
|
uart_register("/dev/ttyS0", &TTYS0_DEV);
|
|
#endif
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
void up_putc(int ch)
|
|
{
|
|
#ifdef HAVE_CONSOLE
|
|
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
|
|
uint32_t ier;
|
|
up_disableuartint(priv, &ier);
|
|
#endif
|
|
|
|
arm_lowputc(ch);
|
|
#ifdef HAVE_CONSOLE
|
|
up_restoreuartint(priv, ier);
|
|
#endif
|
|
}
|
|
|
|
#endif /* USE_SERIALDRIVER */
|