d1c01e1135
In addition to the problems that were previously identified there were a few other bits and pieces outstanding;
* Timing was dependent on CPU speed rather than absolute time
* End of transfer handling was a bit mixed up
* It's possible for data to still be in the FIFO (i.e. not have reached
the card) when a next write is requested, so we need to wait for that to
complete
* Interrupt Status could be carried over from one transfer episode to the
next, corrupting progress
* Multi-descriptor DMA writing simply wasn't implemented, but there were no
indications ... it just failed silently
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| .. | ||
| Kconfig | ||
| Make.defs | ||
| mmcsd.h | ||
| mmcsd_csd.h | ||
| mmcsd_debug.c | ||
| mmcsd_sdio.c | ||
| mmcsd_sdio.h | ||
| mmcsd_spi.c | ||
| mmcsd_spi.h | ||