2e7f75f6e0
Chip name : rp23xx-rv Board name : raspberrypi-pico-2-rv Arch : risc-v Changes from ARM rp23xx impl - Linker script update - ASM head start - Update chip start - New Hazard3 registers - Remove rp23xx chip hw spinlocks/testset - New irq handling (external IRQ interrupt Hazard3) - New timerisr based on RISC-V std MTIME and alarm arch - No SMP yet - Tickless option - Double size for idle, irq and main stacks - Board reset via watchdog trigger Signed-off-by: Serg Podtynnyi <serg@podtynnyi.com>
164 lines
4.7 KiB
C
164 lines
4.7 KiB
C
/****************************************************************************
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* arch/risc-v/include/arch.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/arch.h
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*/
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#ifndef __ARCH_RISCV_INCLUDE_ARCH_H
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#define __ARCH_RISCV_INCLUDE_ARCH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stddef.h>
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#endif
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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#ifdef CONFIG_PIC
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#define PIC_REG x29
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#define PIC_REG_STRING "x29"
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#define up_getpicbase(ppicbase) \
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do { \
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uintptr_t picbase; \
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__asm__ volatile \
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( \
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"mv %0, " PIC_REG_STRING \
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: "=r"(picbase) \
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: \
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: \
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); \
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*(uintptr_t *)ppicbase = picbase; \
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} while (0)
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#define up_setpicbase(picbase) \
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do { \
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uintptr_t _picbase = (uintptr_t)picbase; \
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__asm__ volatile \
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( \
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"mv " PIC_REG_STRING ", %0" \
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: \
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: "r"(_picbase) \
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: PIC_REG_STRING \
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); \
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} while (0)
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#endif /* CONFIG_PIC */
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Provide the maximum amount of page table levels per MMU type */
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#ifdef CONFIG_ARCH_MMU_TYPE_SV39
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# define ARCH_PGT_MAX_LEVELS (3)
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#elif CONFIG_ARCH_MMU_TYPE_SV32
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# define ARCH_PGT_MAX_LEVELS (2)
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#endif
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/* Amount of static page tables allocated for an address environment */
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#ifdef CONFIG_ARCH_ADDRENV
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# define ARCH_SPGTS (ARCH_PGT_MAX_LEVELS - 1)
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifdef CONFIG_ARCH_ADDRENV
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#ifndef __ASSEMBLY__
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/* A task group must have its L1 table in memory always, and the rest can
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* be dynamically committed to memory (and even swapped).
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*
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* In this implementation level tables except the final level N are always
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* kept in static memory, while the level N tables are always dynamically
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* allocated. There is one static page per level in `spgtables[]`.
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*
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* The implications ? They depend on the MMU type.
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*
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* For Sv32 this means that:
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* - A task can not have more than 4GB of memory allocated.
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* - The minimum amount of memory needed for page tables per task is 8K,
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* which gives access to 4MB of memory. This is plenty for many tasks.
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*
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* For Sv39 this means that:
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* - A task can not have more than 1GB of memory allocated. This should be
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* plenty enough...
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* - The minimum amount of memory needed for page tables per task is 12K,
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* which gives access to 2MB of memory. This is plenty for many tasks.
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*/
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struct arch_addrenv_s
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{
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/* Physical addresses of the static page tables (levels N-1) here, these
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* are allocated when a task is created.
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*/
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uintptr_t spgtables[ARCH_SPGTS];
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/* The text, data, heap bases and heap size here */
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uintptr_t textvbase;
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uintptr_t datavbase;
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uintptr_t heapvbase;
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size_t heapsize;
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/* The page directory root (satp) value */
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uintptr_t satp;
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};
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typedef struct arch_addrenv_s arch_addrenv_t;
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_ARCH_ADDRENV */
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ARCH_RISCV_INCLUDE_ARCH_H */
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